Abstract: A control method in use of a flyback power converter is disclosed to provide an operation power source supplying power to a power controller controlling a main power switch. The flyback power converter has a transformer with a primary winding and an auxiliary winding. The main power switch and the primary winding are connected in series. A chopper switch and a buffer inductor are connected in series between the auxiliary winding and the power controller. The power controller turns ON the main power switch for an ON time to energize the transformer, and turns ON the chopper switch for at least a time period during the ON time, so that during the time period the buffer inductor conducts an induced current flowing from the auxiliary winding and through the chopper switch, to build up the operation power source.

Abstract: A manufacturing method of an electronic device is disclosed by the present disclosure. The manufacturing method includes providing a substrate, wherein the substrate includes a plurality of working areas, and each of the plurality of working areas includes a plurality of first recesses and a plurality of second recesses; disposing a plurality of first electronic units in the plurality of first recesses of the plurality of working areas through fluid transfer; identifying a defective working area from the plurality of working areas, wherein at least one of the plurality of first recesses of the defective working area has no electronic unit or a defective first electronic unit disposed therein; and disposing at least one repairing electronic unit in at least one of the plurality of second recesses of the defective working area through laser transfer.

Abstract: A method for manufacturing a semiconductor device includes: forming a first waveguide structure and a second waveguide structure on a substrate in which the first waveguide structure and the second waveguide structure is spaced apart from each other by a recess; conformally forming an un-doped dielectric layer to cover the first and second waveguide structures and to form a gap between two corresponding portions of the un-doped dielectric layer laterally covering the first waveguide structure and the second waveguide structure, respectively; and forming a doped filling layer to fill the gap.

Abstract: A semiconductor device with different configurations of gate structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a gate opening on the fin structure, forming a metallic oxide layer within the gate opening, forming a first dielectric layer on the metallic oxide layer, forming a second dielectric layer on the first dielectric layer, forming a work function metal (WFM) layer on the second dielectric layer, and forming a gate metal fill layer on the WFM layer. The forming the first dielectric layer includes depositing an oxide material with an oxygen areal density less than an oxygen areal density of the metallic oxide layer.

Abstract: A cholesteric liquid crystal display device and a driving method for improving non-uniform image quality of the cholesteric liquid crystal display device. The cholesteric liquid crystal display device includes a cholesteric liquid crystal display panel and a liquid crystal drive unit. The cholesteric liquid crystal display panel is composed of multiple row circuit structures and multiple column circuit structures. The liquid crystal driving unit sequentially outputs column driving voltages to a plurality of column circuit structures in a scanning manner. After scanning the multiple column circuit structures, the liquid crystal driving unit applies an unselected voltage to the multiple column circuit structures together with more than 18 times the scanning unit time course, so as to make the brightness of the overall picture more uniform.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first source/drain epitaxial feature formed over a substrate, a second source/drain epitaxial feature formed over the substrate, two or more semiconductor layers disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature, a gate electrode layer surrounding a portion of one of the two or more semiconductor layers, a first dielectric region disposed in the substrate and in contact with a first side of the first source/drain epitaxial feature, and a second dielectric region disposed in the substrate and in contact with a first side of the second source/drain epitaxial feature, the second dielectric region being separated from the first dielectric region by a substrate.

Abstract: A touch event processing circuit includes receiving circuits and an average circuit. Each of the receiving circuits includes an operation amplifier, a current processing circuit, and a touch event detection circuit. The operation amplifier receives an input signal from a touch panel, and outputs a first current signal and a second current signal. The current processing circuit processes the first current signal and the second current signal according to a first current average signal and a second current average signal, to generate a processed current signal. The touch event detection circuit detects a touch event according to the processed current signal. The average circuit receives first current signals and second current signals from the receiving circuits; performs an average operation upon the first current signals, to generate the first current average signal; and performs an average operation upon the second current signals, to generate the second current average signal.

Abstract: The present disclosure provides a semiconductor structure. The structure includes a semiconductor substrate, a gate stack over a first portion of a top surface of the semiconductor substrate; and a laminated dielectric layer over at least a portion of a top surface of the gate stack. The laminated dielectric layer includes at least a first sublayer and a second sublayer. The first sublayer is formed of a material having a dielectric constant lower than a dielectric constant of a material used to form the second sublayer and the material used to form the second sublayer has an etch selectivity higher than an etch selectivity of the material used to form the first sublayer.

Abstract: A close-end fuel cell and an anode bipolar plate thereof are provided. The anode bipolar plate includes an airtight conductive frame and a conductive porous substrate disposed within the airtight conductive frame. In the airtight conductive frame, an edge of a first side has a fuel inlet, and an edge of a second side has a fuel outlet. The conductive porous substrate has at least one flow channel, where a first end of the flow channel communicates with the fuel inlet, a second end of the flow channel communicates with the fuel outlet. The flow channel is provided with a blocking part near the fuel inlet to divide the flow channel into two areas.

Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.

Abstract: In some embodiments, the present disclosure relates to a display device that includes a first reflector electrode and a second reflector electrode that is separated from the first reflector electrode. The display device further includes an isolation structure that overlies the first and second reflector electrodes. The isolation structure includes a first and second portion. The first portion overlies the first reflector electrode and has a first thickness. The second portion overlies the second reflector electrode, has a second thickness greater than the first thickness, and is separated from the first portion of the isolation structure. The display device also includes a first optical emitter structure and a second optical emitter structure that respectively overlie the first portion and the second portion of the isolation structure.

Abstract: A porous biochar for improving heavy pollution and a method for producing the same. Said porous biochar is prepared as follows: arrowhead, which has excellent enrichment of lead, is used to absorb heavy metal lead in polluted water or artificial wetlands, simultaneously absorb heavy metal cadmium, thereafter is dried and treated as a biomass, and then the biomass is calcined in stages with a passivating agent in a high temperature environment, so as to heavy metals such as lead and cadmium be stably coated or enriched in a biochar, which is mixed with Pseudomonas aeruginosa having high resistant, to obtain the porous biochar; the porous biochar has high specific surface area, high porosity and excellent mechanical properties, is very stable under different acid-base environments and oxidizing conditions.

Abstract: A three-dimensional measuring device includes a ball-shaped structure, an X-axis measuring module, a Y-axis measuring module and a Z-axis measuring module. The ball-shaped structure is moved and/or rotated in response to a movement of a movable object. The X-axis measuring module includes a first measuring structure and a first position sensor. The first measuring structure is movable along an X-axis direction and contacted with the ball-shaped structure. The Y-axis measuring module includes a second measuring structure and a second position sensor. The second measuring structure is movable along a Y-axis direction and contacted with the ball-shaped structure. The Z-axis measuring module includes a third measuring structure and a third position sensor. The third measuring structure is movable along a Z-axis direction and contacted with the ball-shaped structure.

Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.

Abstract: A composite biochar for controlling heavy metal pollution and a process for producing the same, in particular enrichment of heavy metals such as arsenic and lead in soil with centipede grass, thereafter centipede grass is sintered with hydroxyapatite, sepiolite and chitosan, and compounded with microorganisms to produce said composite biochar; through the process of the present invention, heavy metals such as arsenic and lead are stably enriched or coated in said composite biochar, significantly reducing the potential hazard of arsenic and lead to the environment, and also providing new developmental ideas for treating heavy metal biomass.

Abstract: A manufacturing method of a display device includes forming light emitting components on a first substrate, the light emitting components include a first side and a second side, and the second side is away from the first substrate; forming a circuit layer on the first substrate and on the second side of the light emitting components; forming a first protective layer on the circuit layer and forming an insulating layer on the first protective layer; removing the first substrate after forming a second substrate on the insulating layer; forming a black matrix layer on the first side of the light emitting components, and the black matrix layer includes openings; forming light conversion layers in the openings of the black matrix layer; forming a second protective layer on the black matrix layer and the light conversion layers; and forming a third substrate on the second protective layer.

Abstract: A system includes a measuring device, a processing device and a signal generating device. The measuring device is configured to measure a voltage difference between a first node and a second node. The processing device is coupled between the first node and the second node. The signal generating device is configured to provide a first clock signal to the processing device to adjust the voltage difference, configured to generate the first clock signal according to a first enable signal and a second clock signal, and configured to align an edge of the first enable signal with an edge of the second clock signal. A method and a device are also disclosed herein.

Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.

Abstract: A multi-layer cathode coating for positive electrode of a rechargeable electrochemical cell (or secondary cell) (such as a lithium-ion secondary battery) and a secondary battery including a cathode having a multi-layer cathode coating. Multi-layer cathode coatings containing blends of one or more cathode active materials in certain weight ratios thereof.

Abstract: A chiplet system and a positioning method thereof are provided. The positioning method of the chiplet system includes the following steps. Two end chiplets and a plurality of middle chiplets are classified. A quantity calculation packet is transmitted and accumulated from each of the end chiplets towards another end to analyze a quantity of middle chiplets. A serial number comparison packet is transmitted and accumulated from each of the middle chiplets connected to one of the end chiplets towards another end to set a starting point. An identify number setting packet is transmitted and accumulated from the middle chiplet set as the starting point towards another end to set a positioning number of each of the middle chiplets.