Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.

Abstract: A terminal device and a terminal device installation method are provided. The terminal device includes a machine body, a detachable cover with two side walls, and at least two coupling mechanisms arranged symmetrically. The machine body includes a front board, a rear board opposite to the front board, and two side boards connected between the front board and the rear board. Each coupling mechanism includes a coupling portion located at one side wall, a front track and a rear track respectively having a front opening and a rear opening opposite to the front opening and both located at one side board. As each coupling portion is coupled to each front track, the cover is assembled with the machine body and covers the front board, and as each coupling portion is coupled with each rear track, the cover is assembled to the machine body and covers the rear board.

Abstract: Methods of cutting gate structures, and structures formed, are described. In an embodiment, a structure includes first and second gate structures over an active area, and a gate cut-fill structure. The first and second gate structures extend parallel. The active area includes a source/drain region disposed laterally between the first and second gate structures. The gate cut-fill structure has first and second primary portions and an intermediate portion. The first and second primary portions abut the first and second gate structures, respectively. The intermediate portion extends laterally between the first and second primary portions. First and second widths of the first and second primary portions along longitudinal midlines of the first and second gate structures, respectively, are each greater than a third width of the intermediate portion midway between the first and second gate structures and parallel to the longitudinal midline of the first gate structure.

Abstract: Embodiments of the present disclosure provide a method for forming semiconductor device structures. The method includes forming a fin structure having a stack of semiconductor layers comprising first semiconductor layers and second semiconductor layers alternatingly arranged, forming a sacrificial gate structure over a portion of the fin structure, removing the first and second semiconductor layers in a source/drain region of the fin structure that is not covered by the sacrificial gate structure, forming an epitaxial source/drain feature in the source/drain region, removing portions of the sacrificial gate structure to expose the first and second semiconductor layers, removing portions of the second semiconductor layers so that at least one second semiconductor layer has a width less than a width of each of the first semiconductor layers, forming a conformal gate dielectric layer on exposed first and second semiconductor layers, and forming a gate electrode layer on the conformal gate dielectric layer.

Abstract: Examples of updating a device firmware of an electronic device, based on a firmware update are described. The device firmware may include a device firmware volume comprising a plurality of device firmware files and a device firmware descriptor corresponding to content of the device firmware volume. The firmware update may also include a firmware update volume comprising a plurality of updated firmware files, and a firmware update descriptor comprising a hash value of content of the firmware update volume. Further, the device firmware volume may be updated based on a comparison between the hash value of the firmware update volume with the corresponding hash value of the device firmware volume.

Abstract: Examples of electronic devices are described herein. In some examples, an electronic device may include a communication interface to receive information from a peripheral device. In some examples, the electronic device may include logic circuitry to determine a target latency tolerance reporting (LTR) value based on the information via a machine learning model.

Abstract: In an example, a computing device includes a non-volatile storage device to store a basic input/output system (BIOS) variable. Further, the computing device includes a BIOS. During a boot process of the computing devices, the BIOS may read the BIOS variable from the non-volatile storage device. Further, the BIOS may detect that an application is to be deployed in the computing device based on the BIOS variable. Furthermore, the BIOS may load an application package from the non-volatile storage device into a volatile storage device and build an advanced configuration and power interface (ACPI) data structure with the application package loaded in the volatile storage device. Further, the BIOS may deploy the application using the ACPI data structure.

Abstract: In one example in accordance with the present disclosure, a computing device is described. The computing device includes a printed circuit assembly and a basic input/output system (BIOS) coupled to the printed circuit assembly. The BIOS includes a subsystem identifier (SSID). The computing device also includes a non-volatile memory device which includes an override flag to indicate whether an override of the SSID is enabled and a protected variable value to, when enabled, override the SSID in the BIOS.

Abstract: Example computing device that may be implemented to report application status via platform binary tables are disclosed. In response to an upgrade log detected during a BIOS initialization, a platform binary table to a management agent stored in a memory is generated. An application status corresponding with the upgrade log is collected during the BIOS initialization. In response to an operating system initialization, the management agent is launched from the platform binary table to report the application status via the management agent. The upgrade log is removed.

Abstract: In example implementations, a computing device is provided. The computing device includes a basic input/output system (BIOS), a memory, and a controller. The memory is to store a BIOS password, wherein the BIOS password includes a first part and a second part. The controller is to associate a first device with the first part and a second device with the second part.

Abstract: In an example, a computing device includes a non-volatile storage device to store a basic input/output system (BIOS) variable. Further, the computing device includes a BIOS. During a boot process of the computing devices, the BIOS may read the BIOS variable from the non-volatile storage device. Further, the BIOS may detect that an application is to be deployed in the computing device based on the BIOS variable. Furthermore, the BIOS may load an application package from the non-volatile storage device into a volatile storage device and build an advanced configuration and power interface (ACPI) data structure with the application package loaded in the volatile storage device. Further, the BIOS may deploy the application using the ACPI data structure.

Abstract: Examples of electronic devices are described herein. In some examples, an electronic device may include a communication interface to receive information from a peripheral device. In some examples, the electronic device may include logic circuitry to determine a target latency tolerance reporting (LTR) value based on the information via a machine learning model.

Abstract: In some examples, a computing device comprises a processing resource and a memory resource storing instructions to cause the processing resource to detect, by a basic input/output system (BIOS) of the computing device, firmware corruption in a firmware component of the computing device, generate a recovery agent based on the detected firmware corruption of the firmware component, determine a location of a back-up image of the firmware component based on the generated recovery agent, determine recovery sequence based on the determination of the location of the back-up image of the firmware component; and recover the firmware of the firmware component by executing the determined recovery sequence.

Abstract: In an example, a computing device may include a battery, a controller to monitor an operation of the battery, and a basic input/output system (BIOS). The BIOS may initiate a boot process to load an operating system of the computing device. Further, the BIOS may obtain information associated with the operation of the battery from the controller during the boot process. Furthermore, the BIOS may update a log data structure to record the obtained information. Also, the BIOS may determine a health status of the battery based on the updated log data structure and output a notification, during the boot process, indicative of health of the battery based on the determined health status.

Abstract: Example implementations relate to Basic Input Output System updates. In some examples, a computing device can include a memory, a processor to, in response to completion of a Basic Input/Output System (BIOS) update, generate and store a boot status variable in the memory, determine whether the BIOS update was successful, in response to the BIOS update being successful, delete the boot status variable from the memory and perform a power event, and in response to the BIOS update being unsuccessful, perform a BIOS recovery.

Abstract: In some examples, a computing device includes a processing resource and a memory resource storing instructions to cause the processing resource to generate a table having a corresponding signature, encrypt the signature during a power-on self-test (POST) sequence by a basic input/output system (BIOS) of the computing device, and decrypt the signature in response to

Abstract: An example system may include a processor and a non-transitory machine-readable storage medium storing instructions executable by the processer to record, responsive to a first boot of a computing device, storage device identification data and storage device communication path data for a storage device of the computing device, generate a storage device hash value, characterizing a storage configuration of the computing device, from the recorded storage device identification data and the recorded storage device communication path data, and store the storage device hash value to be compared to a subsequently generated storage device hash value characterizing an updated storage configuration of the computing device at a second boot of the computing device.

Abstract: The present specification describes a method. The method including: detection of at least one General Purpose Input Output (GPIO) pin on a Peripheral Component Interconnect Express (PCIe) device; and presenting, on the at least one GPIO pin, during a Basic Input Output System (BIOS) phase prior to a DXE phase, a signal indicating a presence of a card on the PCIe device.

Abstract: In one example, a computing device may include a processor and a memory in communication with the processor. The memory may include a firmware update logic executable by the processor to detect an external device connected to the computing device, determine that a first component firmware and a second component firmware on the external device are to be updated, and perform an update of the first component firmware in parallel with an update of the second component firmware on the external device.

Abstract: Examples for booting a processor are described herein. In an example, a pure hardware parameter associated with a processor, from amongst a plurality of processors, is determined to identify the processor. A firmware appropriate for booting of the processor is identified, based on the identified processor. Then, a Serial Peripheral Interface Read-Only Memory (SPI-ROM) is selected for loading the identified firmware to boot the identified processor. As part of selecting the firmware, the identified firmware is loaded to the SPI-ROM.