Abstract: A display device includes a substrate, a first transistor, a second transistor and a conductive connection portion disposed on the substrate. The first transistor is electrically connected to the gate electrode of the second transistor through the conductive connection portion. An insulating layer is disposed on the conductive connection portion. A pixel electrode is disposed on the insulating layer and is electrically connected to the second transistor. The pixel electrode is at least partially overlapped with the conductive connection portion. A light-emitting element is disposed on the pixel electrode. The conductive connection portion and the pixel electrode form a capacitor. The capacitor has an equivalent permittivity and a thickness. The ratio of the equivalent permittivity to the thickness is in a range from 0.4*(1E+5)F/m?2 to 296.48*(1E+5)F/m?2.

Abstract: An image capturing system for a hydrophilic optical film includes: an optical lens unit; at least one radiating module; and a brightness detection unit, wherein the hydrophilic optical film is disposed on an outer surface of the optical lens unit while the radiating module is used for radiating a light beam, wherein the radiating module is disposed at an appropriate position of an environment of the optical lens unit and cooperates with the optical lens unit to define an intersection angle, the light beam from the radiating module is radiated onto the hydrophilic optical film in order to prolong the effect of the hydrophilic optical film while the brightness detection unit upon detecting an external brightness activates the radiating module such that the light beam radiated from the radiating module has a wavelength ranging from 360-400 nano meter.

Abstract: A display device is provided, which includes a substrate structure containing a substrate with a pixel region, and the pixel region includes an aperture region. A metal oxide semiconductor transistor is disposed over the substrate and includes a metal oxide semiconductor layer with a first channel region, a first gate electrode corresponding to the first channel region, and a silicon oxide insulating layer on the metal oxide semiconductor layer. The silicon oxide insulating layer includes an opening corresponding to the aperture region. A polysilicon transistor is disposed over the substrate. The display device also includes an opposite substrate structure, and a display medium between the substrate structure and the opposite substrate structure.

Abstract: A display device including a TFT substrate and a display layer is provided. The TFT substrate includes a substrate, a gate layer, a semiconductor layer, a gate dielectric layer, a first electrode layer, a first passivation layer, a second passivation layer, and a second electrode layer. A via penetrates the first passivation layer and the second passivation layer to expose a portion of the first electrode layer, and the via has a sidewall. The second electrode layer is electrically connected to the first electrode layer through the via, the first passivation layer has a first edge on the sidewall of the via, the second passivation layer has a second edge on the sidewall of the via, and the first edge and the second edge are separated by a distance in the range of 500-2000 ?.

Abstract: A display panel includes a thin film transistor substrate, an opposite substrate and a liquid crystal layer. A thin film transistor is disposed on a substrate and has a drain. A first insulating layer is disposed on the drain and has a first via above the drain. A planarization layer is disposed on the first insulating layer and has a second via above the drain. The first via and the second via are partially overlapped to form an overlap portion. A second insulating layer is disposed on the planarization layer. A pixel electrode layer is disposed on the second insulating layer and in the overlap portion to connect to the drain. The opposite substrate is disposed opposite to the thin film transistor substrate. The liquid crystal layer is disposed between the thin film transistor substrate and the opposite substrate.

Abstract: A display panel whose TFT substrate comprises a substrate, a gate layer, a gate dielectric layer, a semiconductor layer, a first electrode layer, a first passivation layer, a second passivation layer, a via and a second electrode layer is provided. The gate layer is disposed on the substrate. The gate dielectric layer is disposed on the gate layer. The semiconductor layer is disposed on the gate dielectric layer. The first electrode layer is disposed on the semiconductor layer. The first and second passivation layers are sequentially disposed on the first electrode layer. The via penetrates the passivation layers to expose the first electrode layer. The second electrode layer is electrically connected to the first electrode layer through the via. The first and second passivation layers have first and second taper angles respectively. The difference between the first and second taper angles is below 30°.

Abstract: A display panel comprises a first substrate, a second substrate opposite to the first substrate, and a display medium layer disposed between the first and second substrates. The first substrate comprises a conductive layer formed on the first base plate and extending along a first direction. Along the first direction, the conductive layer comprises a first plane correspondingly at a first height, a tilted plane, and a second plane correspondingly at a second height in sequential order. The first height is greater than the second height. A position of the first plane adjacent to the tilted plane of the conductive layer has a first line width along the second direction. A position of the tilted plane adjacent to the second plane of the conductive layer has a second line width along the second direction. The first line width is shorter than the second line width.

Abstract: A display panel includes a thin film transistor substrate, an opposite substrate and a liquid crystal layer. A thin film transistor is disposed on a substrate and has a drain. A first insulating layer is disposed on the drain and has a first via above the drain. A planarization layer is disposed on the first insulating layer and has a second via above the drain. The first via and the second via are partially overlapped to form an overlap portion. A second insulating layer is disposed on the planarization layer. A pixel electrode layer is disposed on the second insulating layer and in the overlap portion to connect to the drain. The opposite substrate is disposed opposite to the thin film transistor substrate. The liquid crystal layer is disposed between the thin film transistor substrate and the opposite substrate.

Abstract: A display panel includes a thin film transistor substrate, an opposite substrate and a liquid crystal layer. A thin film transistor is disposed on a substrate and has a drain. A first insulating layer is disposed on the drain and has a first via above the drain. A planarization layer is disposed on the first insulating layer and has a second via above the drain. The first via and the second via are partially overlapped to form an overlap portion. A second insulating layer is disposed on the planarization layer. A pixel electrode layer is disposed on the second insulating layer and in the overlap portion to connect to the drain. The opposite substrate is disposed opposite to the thin film transistor substrate. The liquid crystal layer is disposed between the thin film transistor substrate and the opposite substrate.

Abstract: A display panel comprises a first substrate, a second substrate opposite to the first substrate, and a display medium layer disposed between the first and second substrates. The first substrate comprises a conductive layer formed on the first base plate and extending along a first direction. Along the first direction, the conductive layer comprises a first plane correspondingly at a first height, a tilted plane, and a second plane correspondingly at a second height in sequential order. The first height is greater than the second height. A position of the first plane adjacent to the tilted plane of the conductive layer has a first line width along the second direction. A position of the tilted plane adjacent to the second plane of the conductive layer has a second line width along the second direction. The first line width is shorter than the second line width.

Abstract: A display panel whose TFT substrate comprises a substrate, a gate layer, a gate dielectric layer, a semiconductor layer, a first electrode layer, a first passivation layer, a second passivation layer, a via and a second electrode layer is provided. The gate layer is disposed on the substrate. The gate dielectric layer is disposed on the gate layer. The semiconductor layer is disposed on the gate dielectric layer. The first electrode layer is disposed on the semiconductor layer. The first and second passivation layers are sequentially disposed on the first electrode layer. The via penetrates the passivation layers to expose the first electrode layer. The second electrode layer is electrically connected to the first electrode layer through the via. The first and second passivation layers have first and second taper angles respectively. The difference between the first and second taper angles is below 30°.

Abstract: An electrical contact including stainless steel material is disclosed with advantages of good fusing resistance, good abrasion resistance and low contact electrical resistance. The electrical contact includes silver-based material and the stainless steel material. The stainless steel material is dispersed in the silver-based material and weight percentage thereof accounting to the electrical contact is 0.01% to 35%.

Abstract: A system for displaying images including a display panel and a fabrication method thereof are provided. The method includes forming a first gate line and a second gate line at each row of pixels of the display panel, wherein the first gate lines and the second gate lines are separated and electrically isolated from each other. A first insulating layer is formed to cover the first gate lines and the second gate lines, and a plurality of via holes are formed in the first insulating layer to expose the first gate lines and the second gate lines. Then, a first conductive pattern is formed on the first insulating layer, such that the first gate line at each row of the pixels is electrically connected to the second gate line at an adjacent row of the pixels, by the first conductive pattern, through the via holes.

Abstract: A display panel includes a thin film transistor substrate, an opposite substrate and a liquid crystal layer. A thin film transistor is disposed on a substrate and has a drain. A first insulating layer is disposed on the drain and has a first via above the drain. A planarization layer is disposed on the first insulating layer and has a second via above the drain. The first via and the second via are partially overlapped to form an overlap portion. A second insulating layer is disposed on the planarization layer. A pixel electrode layer is disposed on the second insulating layer and in the overlap portion to connect to the drain. The opposite substrate is disposed opposite to the thin film transistor substrate. The liquid crystal layer is disposed between the thin film transistor substrate and the opposite substrate.

Abstract: A system for displaying images including a display panel and a fabrication method thereof are provided. The method includes forming a first gate line and a second gate line at each row of pixels of the display panel, wherein the first gate lines and the second gate lines are separated and electrically isolated from each other. A first insulating layer is formed to cover the first gate lines and the second gate lines, and a plurality of via holes are formed in the first insulating layer to expose the first gate lines and the second gate lines. Then, a first conductive pattern is formed on the first insulating layer, such that the first gate line at each row of the pixels is electrically connected to the second gate line at an adjacent row of the pixels, by the first conductive pattern, through the via holes.

Abstract: A control method for a TV system is provided. The TV system has a digital signal port connected to a player. The control method includes the following steps. After the TV system is turned on, a first set value is written into an EDID rewritable memory of the TV system. After the player is connected to the TV system, the TV system judges whether a quality of the first digital signal group is good or bad. If the quality of the first digital signal group is good, a video/audio signal is issued by the TV system according to the first digital signal group. Whereas, if the quality of the first digital signal group is bad, a second set value is written into the EDID rewritable memory.

Abstract: A projector includes at least one light source module, an optical system, an imaging unit, and a projection lens. Each light source module includes a lamp unit and a heat-dissipating module in close contacting with the lamp unit. Each of the at least one light source module is positioned at one end of the optical system. The imaging unit is positioned at the other end of the optical system. The projection lens is positioned at the same end of the optical system with the imaging unit. Each lamp unit can be adjusted along a first direction relative to the heat-dissipating module, each light source module can be adjusted along a second direction relative to the optical system, the first direction and the second direction both perpendicular to the light emitting direction of the corresponding lamp unit.

Abstract: A power supply unit provides a voltage, and a driving current to a series of light emitting diodes. A dimming unit adjusts a duty cycle of an original dimming signal to generate a dimming signal according to the driving current and an ideal current. A current sink coupled to the series of light emitting diodes adjusts a duty cycle of the driving current according to the dimming signal.

Abstract: A liquid crystal display device for improving color washout problem is disclosed in the present invention, in which storage capacitors of two sub-pixels of a pixel are electrically connected to a next scan line and a next scan line of the next scan line, respectively, in order for utilizing driving signals of the two scan lines to modulate voltages of the storage capacitors, so as to make the two sub-pixels have different driving voltages.

Abstract: A power supply unit provides a voltage, and a driving current to a series of light emitting diodes. A dimming unit adjusts a duty cycle of an original dimming signal to generate a dimming signal according to the driving current and an ideal current. A current sink coupled to the series of light emitting diodes adjusts a duty cycle of the driving current according to the dimming signal.