Abstract: A semiconductor structure includes conductive electrode layers and an insulator layer that extend laterally into a plurality of dielectric layers. The lateral extensions may be referred to as fin portions. The fin portions may extend laterally outward from a central portion of a trench structure at a bottom section of the trench structure. The semiconductor structure may include a plurality of trench structures, and each trench structure may include a set of fin portions. In addition to the trench structures including the fin portions, the semiconductor structure may include additional trench structures located laterally between top sections of adjacent trench structures that include fin portions. The depth of the additional trench structures is less than a depth of the trench structures that include fin portions. This enables the fin portions to extend laterally under the additional trench structures, which enables the size of the fin portions to be increased.

Abstract: A motor stator structure includes a plural set of silicon steel laminations, a plurality of insulated supports including at least one wire clamping unit, and a plurality of windings. Each set of the silicon steel laminations is clamped on one of the insulated supports. The wire clamping unit includes at least one wire clamping member, which includes a slide guiding section and a retaining section. The windings are wound around the sets of silicon steel laminations and the insulated supports, and respectively include at least one lead-out wire extended to an outer side of the insulated supports. The outward extended lead-out wire can be moved from the slide guiding section into the retaining section and be firmly held thereto, so as to ensure the lead-out wire is quickly and precisely located at a predetermined position while being pulled tightly.

Abstract: Some implementations described herein provide techniques and apparatuses for polishing a perimeter region of a semiconductor substrate so that a roll-off profile at or near the perimeter region of the semiconductor substrate satisfies a threshold. The described implementations include depositing a first layer of a first oxide material across the semiconductor substrate followed by depositing a second layer of a second oxide material over the first layer of the first oxide material and around a perimeter region of the semiconductor substrate. The described implementations further include polishing the second layer of the second oxide material over the perimeter region using a chemical mechanical planarization tool including one or more ring-shaped polishing pads oriented vertically over the perimeter region.

Abstract: Provided is a bonding structure including a first dielectric layer, a first non-twinned metal layer, a first twinned metal layer, and a first transition layer. The first dielectric layer has a first inner sidewall defining a first via hole and a first trench on the first via hole. The first non-twinned metal layer is filled in the first via hole. The first twinned metal layer is disposed over the first non-twinned metal layer and within the first trench. The first transition layer is sandwiched between the first non-twinned metal layer and the first twinned metal layer.

Abstract: A method of forming a semiconductor structure includes: forming a trench in a substrate; forming a dielectric layer over the substrate in the trench; forming a diffusion barrier layer on the dielectric layer and in the trench; forming a metal blanket layer on the diffusion barrier layer and in the trench; forming a metal seed layer on the metal blanket layer and in the trench; forming a high-reflectivity metal layer in the trench by using the metal seed layer as a seed; and removing the diffusion barrier layer, the metal blanket layer, the metal seed layer and the high-reflectivity metal layer outside of the trench.

Abstract: Some implementations described herein provide techniques and apparatuses for polishing a perimeter region of a semiconductor substrate so that a roll-off profile at or near the perimeter region of the semiconductor substrate satisfies a threshold. The described implementations include depositing a first layer of a first oxide material across the semiconductor substrate followed by depositing a second layer of a second oxide material over the first layer of the first oxide material and around a perimeter region of the semiconductor substrate. The described implementations further include polishing the second layer of the second oxide material over the perimeter region using a chemical mechanical planarization tool including one or more ring-shaped polishing pads oriented vertically over the perimeter region.

Abstract: A method for welding a motor stator to a substrate includes steps of: providing a motor stator and a substrate; preliminarily fixing the motor stator to the substrate; pulling out lead-out wires of coil windings wound on the motor stator to align with solders of welding points on the substrate; covering a protective hood on the motor stator; covering the hot pressing head around the protective hood while the hot pressing end is located corresponding to the welding points; heating and compressing the welding points to melt the solders; and waiting the molten solders on the welding points to cool and cure to weld the coil windings of the motor stator to the welding points. With the present invention, all the coil windings of the motor stator can be welded to the substrate in one single movement while the motor stator is protected against splattered solders during the welding operation.

Abstract: A motor stator structure includes a plural set of silicon steel laminations, a plurality of insulated supports including at least one wire clamping unit, and a plurality of windings. Each set of the silicon steel laminations is clamped on one of the insulated supports. The wire clamping unit includes at least one wire clamping member, which includes a slide guiding section and a retaining section. The windings are wound around the sets of silicon steel laminations and the insulated supports, and respectively include at least one lead-out wire extended to an outer side of the insulated supports. The outward extended lead-out wire can be moved from the slide guiding section into the retaining section and be firmly held thereto, so as to ensure the lead-out wire is quickly and precisely located at a predetermined position while being pulled tightly.

Abstract: Equipment for welding a motor stator to a substrate includes a protective hood and a hot pressing head. The protective hood covers the motor stator and the substrate to protect the motor stator from undesired displacing and possible damage, and is provided with a plurality of wire slots, via which lead-out wires of coil windings of the motor stator can be pulled out to expose from the protective hood. The hot pressing head has a hot pressing end corresponding to welding points on the substrate and is movable to cover an outer side of the protective hood while the hot pressing end heats and welds the lead-out wires and the welding points together. With the equipment, all the coil windings of the motor stator can be welded to the substrate in one single movement while the motor stator is protected against splattered solders during the welding operation.

Abstract: The present disclosure relates to a semiconductor wafer structure including a semiconductor substrate and a plurality of semiconductor devices disposed along the semiconductor substrate. A dielectric stack including a plurality of dielectric layers is arranged over the semiconductor substrate. A conductive interconnect structure is within the dielectric stack. A seal ring layer is over the dielectric stack and laterally surrounds the dielectric stack along a first sidewall of the dielectric stack. The seal ring layer includes a first protrusion that extends into a first trench in the semiconductor substrate.

Abstract: The present disclosure relates to a semiconductor wafer structure including a semiconductor substrate and a plurality of semiconductor devices disposed along the semiconductor substrate. A dielectric stack including a plurality of dielectric layers is arranged over the semiconductor substrate. A conductive interconnect structure is within the dielectric stack. A seal ring layer is over the dielectric stack and laterally surrounds the dielectric stack along a first sidewall of the dielectric stack. The seal ring layer includes a first protrusion that extends into a first trench in the semiconductor substrate.

Abstract: Provided are an integrated circuit (IC) and a method of forming the same. The IC includes a substrate; a conductive layer, disposed on the substrate; a barrier layer, disposed on the conductive layer; an etching stop layer, covering a sidewall of the barrier layer and extending on a first portion of a top surface of the barrier layer; and at least one capacitor structure, disposed on a second portion of the top surface of the barrier layer.

Abstract: Provided are an integrated circuit (IC) and a method of forming the same. The IC includes a substrate; a conductive layer, disposed on the substrate; a barrier layer, disposed on the conductive layer; an etching stop layer, covering a sidewall of the barrier layer and extending on a first portion of a top surface of the barrier layer; and at least one capacitor structure, disposed on a second portion of the top surface of the barrier layer.

Abstract: Various embodiments of the present disclosure are directed towards a pixel sensor. The pixel sensor includes a substrate having a front-side opposite a back-side. An image sensor element comprises an active layer disposed within the substrate, where the active layer comprises germanium. An anti-reflective coating (ARC) structure overlies the back-side of the substrate. The ARC structure includes a first dielectric layer overlying the back-side of the substrate, a second dielectric layer overlying the first dielectric layer, and a third dielectric layer overlying the second dielectric layer. A first index of refraction of the first dielectric layer is less than a second index of refraction of the second dielectric layer, and a third index of refraction of the third dielectric layer is less than the first index of refraction.

Abstract: Provided are an integrated circuit (IC) and a method of forming the same. The IC includes a substrate; a conductive layer, disposed on the substrate; a barrier layer, disposed on the conductive layer; an etching stop layer, covering a sidewall of the barrier layer and extending on a first portion of a top surface of the barrier layer; and at least one capacitor structure, disposed on a second portion of the top surface of the barrier layer.

Abstract: A bendable positioning structure of an outlet pipe for a faucet contains a body, a spring tube, and a flexible connection tube. The body includes a columnar holder, the outlet pipe, and a fixer. The spring tube is fitted in the outlet pipe and is stopped and positioned by the fixer. The spring tube includes a large-diameter portion and a small-diameter portion which are alternatively formed along the spring tube. The flexible connection tube is slidably received in the spring tube to be limited by the small-diameter portion of the spring tube so that the flexible connection tube is fixed on a centrally-axial line of the output tube. An outer wall of an end of the flexible connection tube is connected with a water head, and the water head is engaged on the outlet pipe and is pulled outward with the flexible connection tube based on user requirements.

Abstract: A bonded assembly of a first wafer including a first semiconductor substrate and a second wafer including a second semiconductor substrate may be formed. The second semiconductor substrate may be thinned to a first thickness, and an inter-wafer moat trench may be formed at a periphery of the bonded assembly. A protective material layer may be formed in the inter-wafer moat trench and over the backside surface of the second semiconductor substrate. A peripheral portion of the second semiconductor substrate located outside the inter-wafer moat trench may be removed, and a cylindrical portion of the protective material layer laterally surrounds a remaining portion of the bonded assembly. The second semiconductor substrate may be thinned to a second thickness by performing at least one thinning process while the cylindrical portion of the protective material layer protects the remaining portion of the bonded assembly.

Abstract: A bonded assembly of a first wafer including a first semiconductor substrate and a second wafer including a second semiconductor substrate may be formed. The second semiconductor substrate may be thinned to a first thickness, and an inter-wafer moat trench may be formed at a periphery of the bonded assembly. A protective material layer may be formed in the inter-wafer moat trench and over the backside surface of the second semiconductor substrate. A peripheral portion of the second semiconductor substrate located outside the inter-wafer moat trench may be removed, and a cylindrical portion of the protective material layer laterally surrounds a remaining portion of the bonded assembly. The second semiconductor substrate may be thinned to a second thickness by performing at least one thinning process while the cylindrical portion of the protective material layer protects the remaining portion of the bonded assembly.

Abstract: Some implementations described herein provide techniques and apparatuses for polishing a perimeter region of a semiconductor substrate so that a roll-off profile at or near the perimeter region of the semiconductor substrate satisfies a threshold. The described implementations include depositing a first layer of a first oxide material across the semiconductor substrate followed by depositing a second layer of a second oxide material over the first layer of the first oxide material and around a perimeter region of the semiconductor substrate. The described implementations further include polishing the second layer of the second oxide material over the perimeter region using a chemical mechanical planarization tool including one or more ring-shaped polishing pads oriented vertically over the perimeter region.

Abstract: Various embodiments of the present disclosure are directed towards a pixel sensor. The pixel sensor includes a substrate having a front-side opposite a back-side. An image sensor element comprises an active layer disposed within the substrate, where the active layer comprises germanium. An anti-reflective coating (ARC) structure overlies the back-side of the substrate. The ARC structure includes a first dielectric layer overlying the back-side of the substrate, a second dielectric layer overlying the first dielectric layer, and a third dielectric layer overlying the second dielectric layer. A first index of refraction of the first dielectric layer is less than a second index of refraction of the second dielectric layer, and a third index of refraction of the third dielectric layer is less than the first index of refraction.