Abstract: Provided is a method for compensating a displayed picture in a display screen. The display screen includes a plurality of regions, each of the plurality of regions including a plurality of pixels; the method includes: determining transformation matrices corresponding to pixels in the plurality of regions based on texture complexities of pictures to be displayed in the plurality of regions; acquiring compensated grayscales by compensating grayscales of pixel points in the pictures to be displayed in the plurality of regions based on the transformation matrices corresponding to the pixels in the plurality of regions.

Abstract: There is provided a smoke detector including a substrate, a light source and a light sensor. The light source and the light sensor are arranged adjacently on the substrate. The substrate is arranged with an asymmetric structure to cause an illumination region of the light source to deviate toward the light sensor thereby increasing a ratio of light intensity reflected by smoke with respect to reference light intensity.

Abstract: A semiconductor device according to the present disclosure includes a gate-all-around (GAA) transistor in a first device area and a fin-type field effect transistor (FinFET) in a second device area. The GAA transistor includes a plurality of vertically stacked channel members and a first gate structure over and around the plurality of vertically stacked channel members. The FinFET includes a fin-shaped channel member and a second gate structure over the fin-shaped channel member. The fin-shaped channel member includes semiconductor layers interleaved by sacrificial layers.

Abstract: A display device, including a display module, a photodetector, a processor, and an optical structure layer, is provided. The display module is used for displaying an image. The photodetector is electrically connected to the display module and is used for detecting brightness of an ambient light and outputting a sensing signal. The processor is electrically connected to the display module and the photodetector, and is used for receiving the sensing signal and outputting a command signal to the display module according to the sensing signal, so that the display module adjusts brightness of the image according to the command signal. The optical structure layer is disposed on the display module. A glossiness of the optical structure layer is between 4 GU and 35 GU, and a reflectivity of specular component included (SCI) of the optical structure layer is between 3% and 6%.

Abstract: A filter (104a, 104b, 108) for a cathode arc source comprises: a filter duct having at least one bend (104a, 104b), and a first magnetic field source for steering plasma through the filter duct for removal of macroparticles from the plasma; wherein the apparatus comprises a second magnetic field source (108) which is rotatably mounted surrounding a portion of the filter duct. Cathode arc sources (102) and cathode arc deposition apparatuses (106) comprise the filters described herein, and methods of filtering macroparticles from a beam of plasma emitted from a cathode arc source use the filters.

Abstract: A method for inspecting twist of wire ropes is provided. The wire ropes support an elevator car, and each of the wire ropes includes a plurality of strands. The method is to be implemented by a processor and includes steps of: obtaining, for each of the wire ropes during movement of the elevator car, a number of strand segments that are present within a predetermined length of the wire rope; and comparing the numbers of strand segments that are obtained respectively for the wire ropes for analyzing the twist of the wire ropes, wherein the wire ropes are determined as having equal extent of twist when it is determined that the numbers of strand segments are identical, and the wire ropes are determined as having distinct extent of twist when it is determined that the numbers of strand segments are different from each other.

Abstract: A method of coating a piston ring comprises: providing at least first and second piston rings in a coating chamber; spacing the piston rings apart, so that the first piston ring is spaced from and not in contact with the second piston ring, and applying a ta-C coating to the piston rings, whereby the spacing between the adjacent piston rings enables simultaneous coating of upper, outer and lower piston ring surfaces of the first and second piston rings during rotation of rings in a plane co-planar with the coating beam. Piston rings are obtained comprising a substantially hydrogen free ta-C coating of 0.1 to 8 microns on at least their lower surface.

Abstract: A display device, including a first display panel, a second display panel, and a first optical structure layer, is provided. The first display panel has a first display surface emitting light toward a first direction. The second display panel has a second display surface emitting light toward a second direction, wherein the first direction is different from the second direction. The first optical structure layer is disposed on the first display panel, wherein a glossiness of the first optical structure layer is between 4 GU and 35 GU, and a reflectivity of specular component included (SCI) of the first optical structure layer is between 3% and 6%. The display device provided by the disclosure can reduce the influence of ambient light from the outside on a displayed image.

Abstract: A display device includes a display panel and an optical structure layer. The optical structure layer is disposed on the display panel. A glossiness of the optical structure layer is between 4 GU and 35 GU, and a reflectivity of specular component included (SCI) of the optical structure layer is between 3% and 6%. The display device disclosed in the disclosure may reduce an influence of a displayed image from ambient light from the outside.

Abstract: Exemplary methods, apparatuses, and systems including memory self-recovery management to correct failures due to soft-error rate events. The self-recovery manager detects a failure of a memory device. The self-recovery manager retrieves a set of register values from the memory device. The self-recovery manager stores the set of register values from the memory device. The self-recovery manager issues a reset command to the memory device, the reset command including generating a re-initialized set of register values. The self-recovery manager compares the set of register values with the re-initialized set of register values. The self-recovery manager triggering a self-recovery attempt using the comparison of the set of register values with the re-initialized set of register values.

Abstract: A front light module applied to full lamination includes a display, a front light guide plate, a light-emitting unit, a transparent medium, and a cover layer. The front light guide plate is located over the display and includes a micro-structure. The micro-structure is recessed from an upper surface of the front light guide plate. The light-emitting unit is adjacent to the front light guide plate. The transparent medium is located over the front light guide plate. A space is located between the front light guide plate and the transparent medium. The cover layer is located over the transparent medium.

Abstract: A computing system is provided. The computing system a central processing unit (CPU) configured to run a basic input/output system (BIOS) service and an operating system (OS). The computing system further includes a baseboard management controller (BMC) and a first boot non-volatile memory coupled to both the CPU and the BMC. A first portion of the first boot non-volatile memory stores system settings and configuration in an open standard such that the BIOS and the BMC can access the system settings based on a temporal ownership of the first portion of the first boot non-volatile memory.

Abstract: In one embodiment, a clip pin of a secondary printed circuit board removably coupled to a primary printed circuit board and a backplate in an information handling system includes: an open end configured to receive a guide pin of the backplate within a clip pin hole of the primary printed circuit board, the guide pin configured to removably couple to the clip pin via the open end; a bulbous portion disposed proximate to the open end, the guide pin causing the bulbous portion to apply an outward force on an inner wall of the clip pin hole; and a plurality of signal pins disposed within the bulbous portion, the outward force causing the plurality of signal pins to communicably couple to the inner wall to transmit a signal from the secondary printed circuit board to the primary printed circuit board.

Abstract: In one embodiment, a clip pin of a secondary printed circuit board removably coupled to a primary printed circuit board and a backplate in an information handling system includes: an open end configured to receive a guide pin of the backplate within a clip pin hole of the primary printed circuit board, the guide pin configured to removably couple to the clip pin via the open end; a bulbous portion disposed proximate to the open end, the guide pin causing the bulbous portion to apply an outward force on an inner wall of the clip pin hole; and a plurality of signal pins disposed within the bulbous portion, the outward force causing the plurality of signal pins to communicably couple to the inner wall to transmit a signal from the secondary printed circuit board to the primary printed circuit board.

Abstract: A read operation is performed on a memory device in accordance with a pass-through voltage setting that defines a pass-through voltage applied to one or more cells of the memory device during read operations. A number of zero bits read from the memory device based on the read operation are counted and compared with a threshold value. Based on the number of zero bits exceeding the threshold value, the pass-through voltage is increased by adjusting the pass-through voltage setting.

Abstract: A method of checking connection states of source nodes in a cluster is carried out by host computer, collecting information of a source node of each monitored computer, and generating a checking list. Each source corresponds to a plurality of network interface, and each network interface corresponds to a plurality of target nodes. At least one source node is selected as a to-be-checked source node. Each to-be-checked source node confirms the corresponding target nodes based on an instruction to detect network. Connection states between each to-be-checked source node and the target nodes are detected. A reason for detection failure is confirmed based on the result of detection and the checking list. An electronic device and a computer readable storage medium applying the method are also disclosed.

Abstract: A method includes determining, for a set of memory cells of a word line group, a parameter corresponding to a quality of the set of memory cells of the word line group and determining, for the set of memory cells, a range of voltage offset values corresponding to the parameter. The method can further include determining a voltage offset to be applied to the set of memory cells of the word line group based on the parameter or the range of voltage offset values, or both and applying a signal corresponding to the determined voltage offset to the set of memory cells of the word line group.

Abstract: An ultrasonic transducer includes a piezoceramic element with a first surface and a second surface opposite to each other through the piezoceramic element and a lateral surface connecting the first surface and the second surface, an acoustic matching layer with a third surface and a fourth surface opposite to each other through the acoustic matching layer and the third surface connecting with the second surface of the piezoceramic element, a first damping element with a fifth surface and a sixth surface opposite to each other through the first damping element and the sixth surface connecting with the first surface of the piezoceramic element, and a second damping element encapsulating the first damping element and the lateral surface of the piezoceramic element.

Abstract: A semiconductor packaging structure includes a substrate, a wiring layer, a mask layer, and a sealing layer. The substrate has an effective region and a dummy region surrounding the effective region. The wiring layer is disposed on the effective and dummy regions, and is formed with a predetermined pattern including spaced-apart protrusions to define at least one cavity partially exposing the dummy region. The mask layer covers the wiring layer, and is formed with a through hole to communicate in space with the cavity. The through hole is smaller in size than the cavity, and cooperates with the cavity to form an accommodating space. The sealing layer covers the mask layer, and includes an engaging element filling the accommodating space and adhering to the substrate.

Abstract: This application provides an arecoline salt and a preparation method and a product thereof. The arecoline salt is a benzoate of arecoline, with a structural formula shown as follows: where X is a molar ratio of arecoline to benzoic acid. The arecoline salt, with good physicochemical stability, is convenient to use and widely used.