Patents by Inventor Ming-Chun Chang
Ming-Chun Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12210954Abstract: A point estimate value for an individual is computed using a Bayesian neural network model (BNN) by training a first BNN model that computes a weight mean value, a weight standard deviation value, a bias mean value, and a bias standard deviation value for each neuron of a plurality of neurons using observations. A plurality of BNN models is instantiated using the first BNN model. Instantiating each BNN model of the plurality of BNN models includes computing, for each neuron, a weight value using the weight mean value, the weight standard deviation value, and a weight random draw and a bias value using the bias mean value, the bias standard deviation value, and a bias random draw. Each instantiated BNN model is executed with the observations to compute a statistical parameter value for each observation vector of the observations. The point estimate value is computed from the statistical parameter value.Type: GrantFiled: December 6, 2023Date of Patent: January 28, 2025Assignee: SAS Institute Inc.Inventors: Sylvie Tchumtchoua Kabisa, Xilong Chen, Gunce Eryuruk Walton, David Bruce Elsheimer, Ming-Chun Chang
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Patent number: 12165031Abstract: A treatment model trained to compute an estimated treatment variable value for each observation vector of a plurality of observation vectors is executed. Each observation vector includes covariate variable values, a treatment variable value, and an outcome variable value. An outcome model trained to compute an estimated outcome value for each observation vector using the treatment variable value for each observation vector is executed. A standard error value associated with the outcome model is computed using a first variance value computed using the treatment variable value of the plurality of observation vectors, using a second variance value computed using the treatment variable value and the estimated treatment variable value of the plurality of observation vectors, and using a third variance value computed using the estimated outcome value of the plurality of observation vectors. The standard error value is output.Type: GrantFiled: December 5, 2023Date of Patent: December 10, 2024Assignee: SAS Institute Inc.Inventors: Sylvie Tchumtchoua Kabisa, Xilong Chen, Gunce Eryuruk Walton, David Bruce Elsheimer, Ming-Chun Chang
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Publication number: 20240346289Abstract: A point estimate value for an individual is computed using a Bayesian neural network model (BNN) by training a first BNN model that computes a weight mean value, a weight standard deviation value, a bias mean value, and a bias standard deviation value for each neuron of a plurality of neurons using observations. A plurality of BNN models is instantiated using the first BNN model. Instantiating each BNN model of the plurality of BNN models includes computing, for each neuron, a weight value using the weight mean value, the weight standard deviation value, and a weight random draw and a bias value using the bias mean value, the bias standard deviation value, and a bias random draw. Each instantiated BNN model is executed with the observations to compute a statistical parameter value for each observation vector of the observations. The point estimate value is computed from the statistical parameter value.Type: ApplicationFiled: December 6, 2023Publication date: October 17, 2024Inventors: Sylvie Tchumtchoua Kabisa, Xilong Chen, Gunce Eryuruk Walton, David Bruce Elsheimer, Ming-Chun Chang
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Publication number: 20240346284Abstract: A treatment model trained to compute an estimated treatment variable value for each observation vector of a plurality of observation vectors is executed. Each observation vector includes covariate variable values, a treatment variable value, and an outcome variable value. An outcome model trained to compute an estimated outcome value for each observation vector using the treatment variable value for each observation vector is executed. A standard error value associated with the outcome model is computed using a first variance value computed using the treatment variable value of the plurality of observation vectors, using a second variance value computed using the treatment variable value and the estimated treatment variable value of the plurality of observation vectors, and using a third variance value computed using the estimated outcome value of the plurality of observation vectors. The standard error value is output.Type: ApplicationFiled: December 5, 2023Publication date: October 17, 2024Inventors: Sylvie Tchumtchoua Kabisa, Xilong Chen, Gunce Eryuruk Walton, David Bruce Elsheimer, Ming-Chun Chang
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Voltage balance circuit and a method for balancing a charging voltage of the voltage balance circuit
Patent number: 11831154Abstract: A voltage balance circuit includes a battery module connected to an external power source, a voltage dividing module, a detection module and a control module. The battery module includes a plurality of batteries connected in series. The voltage dividing module includes a plurality of bleeder resistors. Each bleeder resistor is connected with one battery in parallel. The detection module includes a plurality of thermistors, fixation resistances and micro-controllers. Each thermistor is arranged beside one bleeder resistor. Each thermistor is connected with one fixation resistance in series. Each micro-controller is connected with one thermistor and the one fixation resistance. The control module includes a plurality of switches and an analog front end component. Each switch is connected with the one bleeder resistor in series. Each switch is connected to the analog front end component, and the analog front end component is connected to the one micro-controller.Type: GrantFiled: July 13, 2021Date of Patent: November 28, 2023Assignees: Cheng Uel Precision Industry Co., Ltd., Foxlink Automotive Technology(Kunshan) Co., Ltd., Foxlink Automotive Technology Co., Ltd.Inventors: Po Shen Chen, Hao Chiang, Jui Chan Yang, Ming Chun Chang, Tsai Fu Lin -
VOLTAGE BALANCE CIRCUIT AND A METHOD FOR BALANCING A CHARGING VOLTAGE OF THE VOLTAGE BALANCE CIRCUIT
Publication number: 20220181888Abstract: A voltage balance circuit includes a battery module connected to an external power source, a voltage dividing module, a detection module and a control module. The battery module includes a plurality of batteries connected in series. The voltage dividing module includes a plurality of bleeder resistors. Each bleeder resistor is connected with one battery in parallel. The detection module includes a plurality of thermistors, fixation resistances and micro-controllers. Each thermistor is arranged beside one bleeder resistor. Each thermistor is connected with one fixation resistance in series. Each micro-controller is connected with one thermistor and the one fixation resistance. The control module includes a plurality of switches and an analog front end component. Each switch is connected with the one bleeder resistor in series. Each switch is connected to the analog front end component, and the analog front end component is connected to the one micro-controller.Type: ApplicationFiled: July 13, 2021Publication date: June 9, 2022Inventors: Po Shen Chen, Hao Chiang, Jui Chan Yang, Ming Chun Chang, Tsai Fu Lin -
Patent number: 11354566Abstract: A treatment model that is a first neural network is trained to optimize a treatment loss function based on a treatment variable t using a plurality of observation vectors by regressing t on x(1),z. The trained treatment model is executed to compute an estimated treatment variable value {circumflex over (t)}i for each observation vector. An outcome model that is a second neural network is trained to optimize an outcome loss function by regressing y on x(2) and an estimated treatment variable t. The trained outcome model is executed to compute an estimated first unknown function value {circumflex over (?)}(xi(2)) and an estimated second unknown function value {circumflex over (?)}(xi(2)) for each observation vector. An influence function value is computed for a parameter of interest using {circumflex over (?)}(xi(2)) and {circumflex over (?)}(xi(2)). A value is computed for the predefined parameter of interest using the computed influence function value.Type: GrantFiled: October 21, 2021Date of Patent: June 7, 2022Assignee: SAS Institute Inc.Inventors: Xilong Chen, Douglas Allan Cairns, Jan Chvosta, David Bruce Elsheimer, Yang Zhao, Ming-Chun Chang, Gunce Eryuruk Walton, Michael Thomas Lamm
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Publication number: 20210075071Abstract: A battery cell module of the present invention includes: a plurality of battery assemblies, each having several battery cells; a flame-retardant unit, covered on an external surface of each of the battery cells; a first bracket, having a first fixation plate in grid pattern, the first fixation plate having a plurality of first containing slots corresponding to the plurality of the battery assemblies; a second bracket, connected with the first bracket and having a second fixation plate in grid pattern, the second fixation plate having a plurality of second containing slots corresponding to the plurality of the first containing slots; wherein an end of each of the battery cells is mounted in each of the plurality of the first containing slots, the other end of each of the battery cells is mounted in each of the plurality of the second containing slots.Type: ApplicationFiled: December 11, 2019Publication date: March 11, 2021Inventors: PING-YU LEE, TSAI-FU LIN, MING-CHUN CHANG, PO-SHEN CHEN, TA-CHANG YANG, MIN-YU WU
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Patent number: 10890612Abstract: An insulation resistance measuring device for detecting insulation resistance of an electric vehicle comprises a battery system, a measuring unit, a control unit and a calculation unit. The measuring unit comprises a circuit module comprises a plurality of resistances connected between a positive side and a negative side of the battery system, a first switch, a second switch, and a voltage detecting unit. The first switch is connected between the circuit module and a ground side. The second switch is connected between the circuit module and the negative side. The voltage detecting unit is arranged at a connecting node of the resistances of the circuit module. The control unit is configured to control the first switch and the second switch to turn on or turn off. The calculation unit is configured to calculate a high potential insulation resistance and a low potential insulation resistance of the electric vehicle.Type: GrantFiled: December 10, 2018Date of Patent: January 12, 2021Assignee: Foxlink Automotive Technology (Kunshan) Co., Ltd.Inventors: Pao Hung Lin, Po Shen Chen, Kuo Ho Cheng, Ming Chun Chang, Tsai Fu Lin
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Publication number: 20200018786Abstract: An insulation resistance measuring device for detecting insulation resistance of an electric vehicle comprising a battery system, a measuring unit, a control unit and a calculation unit. The measuring unit comprises a circuit module, a first switch, a second switch and a voltage detecting unit. The circuit module comprises a plurality of resistances, which connected between a positive side and a negative side of the battery system. The first switch is connected between the circuit module and a ground side. The second switch is connected between the circuit module and the negative side. The voltage detecting unit is arranged at a connecting node of the resistances of the circuit module. The control unit is configured to control the first switch and the second switch to turn on or turn off. The calculation unit is configured to calculate a high potential insulation resistance and a low potential insulation resistance of the electric vehicle.Type: ApplicationFiled: December 10, 2018Publication date: January 16, 2020Inventors: Pao Hung Lin, Po Shen Chen, Kuo Ho Cheng, Ming Chun Chang, Tsai Fu Lin
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Publication number: 20130024167Abstract: Systems and methods are provided for evaluating a physical process with respect to one or more attributes of the physical process by combining forecasts for the one or more physical process attributes, where data for evaluating the physical process is generated over time. A forecast model selection graph is accessed, the forecast model selection graph comprising a hierarchy of nodes arranged in parent-child relationships. A plurality of model forecast nodes are resolved, where resolving a model forecast node includes generating a node forecast for the one or more physical process attributes. A combination node is processed, where a combination node transforms a plurality of node forecasts at child nodes of the combination node into a combined forecast. A selection node is processed, where a selection node chooses a node forecast from among child nodes of the selection node based on a selection criteria.Type: ApplicationFiled: July 22, 2011Publication date: January 24, 2013Inventors: Edward Tilden Blair, Michael J. Leonard, David Bruce Elsheimer, Jerzy Michal Brzezicki, Kannukuzhiyil Kurien Kurien, Michael Ryan Chipley, Dinesh P. Apte, Ming-Chun Chang
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Patent number: 7716022Abstract: Computer-implemented systems and methods for providing a forecast using time series data that is indicative of a data generation activity occurring over a period of time. Candidate models and candidate input variables are received. For each candidate model, transfer functions are determined for the candidate input variables in order to relate a variable to be forecasted to the time series data. For each candidate model there is a selection of which of the candidate input variables to include in each of the candidate models based upon the determined transfer functions. A model is selected from the candidate models to forecast the time series data using the selected input variables of the selected model.Type: GrantFiled: May 9, 2006Date of Patent: May 11, 2010Assignee: SAS Institute Inc.Inventors: Youngjin Park, Michael J. Leonard, Rajesh S. Selukar, Ming-Chun Chang
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Patent number: 7710435Abstract: A visual effect generating module for changing visual effects of a selected image block within an image area is disclosed. The visual effect generating module includes a color changing module for receiving and changing pixel values of a plurality of pixels within the selected image block and a first multiplexer coupled to the color changing module for selectively outputting pixels corresponding to the image area or pixels output from the color changing module.Type: GrantFiled: August 23, 2005Date of Patent: May 4, 2010Assignee: Realtek Semiconductor Corp.Inventors: Zou-Ping Chen, Cheng-Shun Liao, Ming-Chun Chang
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Patent number: 7688336Abstract: A method for recording a plurality of graphic objects is disclosed. Each graphic object includes at least one common parameter and at least one object data. The method includes recording the at least one common parameter corresponding to the plurality of graphic objects in a common parameter section; and respectively recording the at least one object data of the plurality of graphic objects in corresponding object sections; wherein the at least one common parameter and the at least one object data are utilized to describe characteristics of the graphic objects.Type: GrantFiled: March 7, 2006Date of Patent: March 30, 2010Assignee: Realtek Semiconductor Corp.Inventors: Ming-Jane Hsieh, Zou-Ping Chen, Ming-Chun Chang, Cheng-Shun Liao
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Patent number: 7675576Abstract: A video processing apparatus includes: a line-based data encoder for performing line-based data encoding on an input signal to generate a line-based data encoded signal; and a video signal controller coupled to the line-based data encoder for receiving a first video signal and the line-based data encoded signal, decoding the line-based data encoded signal to generate a second video signal, and choosing one of the first and second video signals to generate an output signal.Type: GrantFiled: November 9, 2005Date of Patent: March 9, 2010Assignee: Realtek Semiconductor Corp.Inventors: Cheng-Shun Liao, Chia-Pei Chang, Yi-Shu Chang, Ming-Chun Chang
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Patent number: 7583124Abstract: A delaying stage selecting circuit for selecting a specific delaying stage from a plurality of delaying stages, where the delaying stages are for outputting delayed clock signals, includes: a first register for sampling the delayed clock signals according to a clock signal to generate sampled values; first memory units, wherein the first memory units are utilized to memorize the sampled values, and each of first memory unit outputs at least one of the sampled values according to a corresponding first selecting signal; a first selecting unit, for outputting the sampled values according to a second selecting signal; a determining module, for determining if the sampled values meet a specific relation, where if the determination result is positive then determining the particular delaying stage; and a counter for generating a counting value to control the delayed clock signal sampled by the first register.Type: GrantFiled: January 25, 2008Date of Patent: September 1, 2009Assignee: Realtek Semiconductor Corp.Inventors: Tung-Chen Kuo, Ming-Chun Chang
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Publication number: 20090039938Abstract: A delaying stage selecting circuit for selecting a specific delaying stage from a plurality of delaying stages, where the delaying stages are for outputting delayed clock signals, includes: a first register for sampling the delayed clock signals according to a clock signal to generate sampled values; first memory units, wherein the first memory units are utilized to memorize the sampled values, and each of first memory unit outputs at least one of the sampled values according to a corresponding first selecting signal; a first selecting unit, for outputting the sampled values according to a second selecting signal; a determining module, for determining if the sampled values meet a specific relation, where if the determination result is positive then determining the particular delaying stage; and a counter for generating a counting value to control the delayed clock signal sampled by the first register.Type: ApplicationFiled: January 25, 2008Publication date: February 12, 2009Inventors: Tung-Chen Kuo, Ming-Chun Chang
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Patent number: 7249275Abstract: A clock tuning device and method for executing overclocking operations on plural elements disposed on a motherboard. The clock tuning device includes a phase-locked loop for outputting a plurality of clock signals to the elements, and a control circuit for controlling the phase-locked loop to adjust the frequencies of the clock signals, so as to execute the overclocking operations on the elements, respectively. The method includes the steps of: increasing the frequency of a first clock signal until one of the elements can't work normally due to an utmost frequency of the first clock signal; resetting all the elements and operating the element corresponding to the first signal according to a safe frequency of the first clock signal; and repeating the above steps to perform overclocking operation on each of the other elements.Type: GrantFiled: September 3, 2004Date of Patent: July 24, 2007Assignee: Realtek Semiconductor Corp.Inventors: Wen-Shiung Weng, Chi-Kung Kuan, Sheng-Kai Chen, Ming-Chun Chang, Yi-Shu Chang
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Publication number: 20060288287Abstract: A method for recording a plurality of graphic objects is disclosed. Each graphic object includes at least one common parameter and at least one object data. The method includes recording the at least one common parameter corresponding to the plurality of graphic objects in a common parameter section; and respectively recording the at least one object data of the plurality of graphic objects in corresponding object sections; wherein the at least one common parameter and the at least one object data are utilized to describe characteristics of the graphic objects.Type: ApplicationFiled: March 7, 2006Publication date: December 21, 2006Inventors: Ming-Jane Hsieh, Zou-Ping Chen, Ming-Chun Chang, Cheng-Shun Liao
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Patent number: 7084687Abstract: A signal generator for generating a clock with lower jitter. The signal generator includes a multi-phase clock generator for generating a plurality of multi-phase reference clocks with same frequency, a multiplexer for selecting one reference clock as an output clock according to a phase selecting signal, a phase-swallow control unit having a comparator for comparing a swallow value with a reference value out of order and outputting the comparing result as a swallow control signal, and a clock selector for receiving the swallow control signal and generating the phase selecting signal. Because the reference value is provided by a counter in bit-reversed, the swallow control signal is dispersed smoothly and the jitter of the output clock is reduced.Type: GrantFiled: July 22, 2004Date of Patent: August 1, 2006Assignee: Realtek Semiconductor Corp.Inventors: Wen-Shiung Weng, Ming-Chun Chang, Chi-Kung Kuan, Yi-Shu Chang, Kuo-Lin Tai