Abstract: The present invention provides a chip including an I/O pin and an ESD protection circuit. The ESD protection circuit includes a P-type device and a first diode, wherein the P-type device is coupled between the I/O pin and a ground voltage, and an anode of the first diode is directly connected to the I/O pin. In addition, the ESD protection circuit does not comprise any device whose N-type doping/diffusion is directly connected to the I/O pin.

Abstract: A method includes attaching a die to a thermal compression bonding (TCB) head through vacuum suction, wherein the die comprises a plurality of conductive pillars, attaching a first substrate to a chuck through vacuum suction, wherein the first substrate comprises a plurality of solder bumps, contacting a first conductive pillar of the plurality of conductive pillars to a first solder bump of the plurality of solder bumps, wherein contacting the first conductive pillar to the first solder bump results in a first height between a topmost surface of the first conductive pillar and a bottommost surface of the first solder bump, and adhering the first solder bump to the first conductive pillar to form a first joint, wherein adhering the first solder bump to the first conductive pillar comprises heating the TCB head.

Abstract: A lighting device includes a light board and a light dimmer circuit. The light board includes multiple first light emitting elements and second light emitting elements. The first light emitting elements are disposed in a first area of the light board. The second light emitting elements are disposed in a second area of the light board. The light dimmer circuit is configured to drive the second light emitting elements to generate flickering lights from the second area of the light board, and is configured to drive the first light emitting elements to generate non-flickering lights from the first area of the light board.

Abstract: The present specification describes examples of position-based switching of display devices. An example augmented reality (AR) device includes an AR display device to render display data. The example AR device also includes a wireless communication device to transmit and receive wireless signals. The example AR device further includes a processor to: 1) determine a position of the AR device relative to a computing device based on wireless signals communicated with the computing device; and 2) switch an activity state of the AR display device based on the determined position of the AR device relative to the computing device.

Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.

Abstract: A semiconductor device structure is provided. The semiconductor device has a first dielectric wall between an n-type source/drain region and a p-type source/drain region to physically and electrically isolate the n-type source/drain region and the p-type source/drain region from each other. A second dielectric wall is formed between a first channel region connected to the n-type source/drain region and a second channel region connected to the p-type source/drain region. A contact is formed to physically and electrically connect the n-type source/drain region with the p-type source/drain region, wherein the contact extends over the first dielectric wall. The first electric wall has a gradually decreasing width W5 towards a tip of the dielectric wall from a top contact position between the first dielectric wall and either the n-type source/drain region or the p-type source/drain region.

Abstract: A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.

Abstract: An electronic device includes a substrate, a first silicon transistor, a second silicon transistor and a first oxide semiconductor transistor. The first silicon transistor, the second silicon transistor and the first oxide semiconductor transistor are disposed on the substrate. The first silicon transistor has a first terminal electrically connected to a first voltage level, a second terminal and a control terminal. The second silicon transistor has a first terminal electrically connected to the second terminal of the first silicon transistor, a second terminal electrically connected to a second voltage level, and a control terminal electrically connected to the control terminal of the first silicon transistor. The first oxide semiconductor transistor has a first terminal electrically connected to the first terminal of the second silicon transistor. Wherein, a voltage value of the first voltage level is greater than a voltage value of the second voltage level.

Abstract: According to an exemplary embodiment, a method of forming a vertical device is provided. The method includes: providing a protrusion over a substrate; forming an etch stop layer over the protrusion; laterally etching a sidewall of the etch stop layer; forming an insulating layer over the etch stop layer; forming a film layer over the insulating layer and the etch stop layer; performing chemical mechanical polishing on the film layer and exposing the etch stop layer; etching a portion of the etch stop layer to expose a top surface of the protrusion; forming an oxide layer over the protrusion and the film layer; and performing chemical mechanical polishing on the oxide layer and exposing the film layer.

Abstract: A conductor structure includes a first metal layer, a second metal layer, and a controlling layer. The second metal layer is disposed on the first metal layer. A material of the first metal layer and a material of the second metal layer include at least one identical metal element. The controlling layer is disposed between the first metal layer and the second metal layer. A thickness of the controlling layer is less than a thickness of the first metal layer, and the thickness of the controlling layer is less than a thickness of the second metal layer.

Abstract: A lens assembly module is provided and includes: a plurality of lenses, a lens barrel disposed around the lens and including an incident end, where light from the object enters the lens barrel, and an emergent end, where light from the object exits the lens barrel; and a first light shielding film disposed in a mounting recess, which is defined by a surface of one of the lenses closest to the emergent end and is adjacent to a circumference of the lens closest to the emergent end.

Abstract: A conductor structure includes a first metal layer, a second metal layer, and a controlling layer. The second metal layer is disposed on the first metal layer. A material of the first metal layer and a material of the second metal layer include at least one identical metal element. The controlling layer is disposed between the first metal layer and the second metal layer. A thickness of the controlling layer is less than a thickness of the first metal layer, and the thickness of the controlling layer is less than a thickness of the second metal layer.

Abstract: According to one exemplary embodiment, a method for adjusting geometry of a capacitor includes fabricating a first composite capacitor residing in a first standard cell with a first set of process parameters. The method further includes using a second standard cell having substantially same dimensions as the first standard cell. The method further includes using a capacitance value from the first composite capacitor to adjust a geometry of a second composite capacitor residing in the second standard cell, wherein the second composite capacitor is fabricated with a second set of process parameters. The geometry of the second composite capacitor can be adjusted to cause the second composite capacitor to have a capacitance value substantially equal to the capacitance value from the first composite capacitor.

Abstract: According to one exemplary embodiment, a method for adjusting geometry of a capacitor includes fabricating a first composite capacitor residing in a first standard cell with a first set of process parameters. The method further includes using a second standard cell having substantially same dimensions as the first standard cell. The method further includes using a capacitance value from the first composite capacitor to adjust a geometry of a second composite capacitor residing in the second standard cell, wherein the second composite capacitor is fabricated with a second set of process parameters. The geometry of the second composite capacitor can be adjusted to cause the second composite capacitor to have a capacitance value substantially equal to the capacitance value from the first composite capacitor.

Abstract: According to one exemplary embodiment, a method for adjusting geometry of a capacitor includes fabricating a first composite capacitor residing in a first standard cell with a first set of process parameters. The method further includes using a second standard cell having substantially same dimensions as the first standard cell. The method further includes using a capacitance value from the first composite capacitor to adjust a geometry of a second composite capacitor residing in the second standard cell, wherein the second composite capacitor is fabricated with a second set of process parameters. The geometry of the second composite capacitor can be adjusted to cause the second composite capacitor to have a capacitance value substantially equal to the capacitance value from the first composite capacitor.

Abstract: According to one exemplary embodiment, a method for adjusting geometry of a capacitor includes fabricating a first composite capacitor residing in a first standard cell with a first set of process parameters. The method further includes using a second standard cell having substantially same dimensions as the first standard cell. The method further includes using a capacitance value from the first composite capacitor to adjust a geometry of a second composite capacitor residing in the second standard cell, wherein the second composite capacitor is fabricated with a second set of process parameters. The geometry of the second composite capacitor can be adjusted to cause the second composite capacitor to have a capacitance value substantially equal to the capacitance value from the first composite capacitor.

Abstract: According to one exemplary embodiment, a method for adjusting geometry of a capacitor includes fabricating a first composite capacitor residing in a first standard cell with a first set of process parameters. The method further includes using a second standard cell having substantially same dimensions as the first standard cell. The method further includes using a capacitance value from the first composite capacitor to adjust a geometry of a second composite capacitor residing in the second standard cell, wherein the second composite capacitor is fabricated with a second set of process parameters. The geometry of the second composite capacitor can be adjusted to cause the second composite capacitor to have a capacitance value substantially equal to the capacitance value from the first composite capacitor.

Abstract: According to one exemplary embodiment, a method for adjusting geometry of a capacitor includes fabricating a first composite capacitor residing in a first standard cell with a first set of process parameters. The method further includes using a second standard cell having substantially same dimensions as the first standard cell. The method further includes using a capacitance value from the first composite capacitor to adjust a geometry of a second composite capacitor residing in the second standard cell, wherein the second composite capacitor is fabricated with a second set of process parameters. The geometry of the second composite capacitor can be adjusted to cause the second composite capacitor to have a capacitance value substantially equal to the capacitance value from the first composite capacitor.

Abstract: A method for transmitting data in real time in a multimedia data stream over a local network is provided. The local network comprises a sending end and one or more receiving ends. The method includes the steps of packaging a QoS (quality of service) control signal into a QoS packet according to a RTCP/TCP/IP protocol; packaging the multimedia data stream into a multimedia data packet according to a RTP/UDP/IP protocol; establishing a connection between the sending end and one of the one or more receiving ends; delivering the QoS packet and the multimedia data packet from the sending end to the one or more receiving end over the local network; and the one or more receiving end de-packaging the QoS packet into the QoS signal to control the transmission of the multimedia data stream.

Abstract: A multipurpose charging system with a transmission function is capable of solving the power consumption problem of a handheld device when the handheld device is connected to a peripheral device. The multipurpose charging system has a handheld device, a transformer device, and a USB line. The handheld device has a built-in USB host chip and a USB socket, and electrically connected to the transformer device by the USB line. The transformer device further has an Ethernet interface and a USB port. The multipurpose charging system can charge the handheld device, supply electric power for a peripheral device connected to the USB port, transmit data, and use an Ethernet by the transformer device at the same time.