Patents by Inventor Ming Dou

Ming Dou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ESD PROTECTION CIRCUITRY WITH MULTI-FINGER SCRS
    Publication number: 20100118454
    Abstract: Self-triggered Multi-finger SCRs used in ESD protection circuitry capable of turning on all SCR fingers of the multi-finger SCRs include a first source, a second source, N SCR units, (N?1) diodes, and N resistors. Each of the N SCR units includes a first node, a second node coupled to the second source, and a trigger node. An nth diode of the (N?1) diodes is coupled between a first node of an nth SCR unit and a trigger node of an (n+1)th SCR unit. An nth resistor is coupled between the first node of the nth SCR unit and the first source, wherein n and N are integers. The (N?1) diodes can be replaced by directly coupled the first node of the nth SCR unit to the trigger node of the (n+1)th SCR unit when a trigger pulse is applied at the trigger node of a first SCR unit.
    Type: Application
    Filed: November 12, 2008
    Publication date: May 13, 2010
    Inventors: Ming-Dou Ker, Chun-Yu Lin, Chang-Tzu Wang
  • Transient detection circuit for ESD protection
    Patent number: 7710696
    Abstract: A transient detection circuit including a detecting unit, a setting unit, and a memory unit. The transient detection circuit provides an information signal to an external instrument when an electrostatic discharge (ESD) event occurs. The detecting unit is coupled between a first power line and a second power line for detecting the ESD event. The setting unit sets a level of a first node according to the detection result. The memory unit controls the information signal according to the level of the first node. The information signal is at a first level when the ESD event occurs in the first power line.
    Type: Grant
    Filed: January 23, 2008
    Date of Patent: May 4, 2010
    Assignees: Himax Technologies Limited, National Chiao-Tung University
    Inventors: Ming-Dou Ker, Cheng-Cheng Yen, Chi-Sheng Liao, Tung-Yang Chen
  • Electrostatic discharge protection device and layout thereof
    Patent number: 7705404
    Abstract: An electrostatic discharge (ESD) protection device and a layout thereof are provided. A bias conducting wire is mainly used to couple each base of a plurality of parasitic transistors inside ESD elements together, in order to simultaneously trigger all the parasitic transistors to bypass the ESD current, avoid the elements of a core circuit being damaged, and solve the non-uniform problem of bypassing the ESD current when ESD occurs. Furthermore, in the ESD protection layout, it only needs to add another doped region on a substrate neighboring to, but not contacting, doped regions of the ESD protection elements and use contacts to connect the added doped region, so as to couple each base of the parasitic transistors together without requiring for additional layout area.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: April 27, 2010
    Assignee: Amazing Microelectronic Corporation
    Inventors: Ming-Dou Ker, Jia-Huei Chen, Ryan Hsin-Chin Jiang
  • Gamma voltage conversion device
    Publication number: 20100097306
    Abstract: Gamma voltage conversion device includes a gamma voltage conversion circuit, an amplifier, and a gamma voltage adjusting circuit. The gamma voltage conversion circuit generates a first gamma voltage conformed to a first gamma curve according to a grey level. The amplifier includes a first input end receiving the first gamma voltage, a second end, and an output end. The amplifier outputs the first or a second gamma voltage conformed to a second gamma curve according to the grey level according to the first and the second ends of the amplifier. The gamma voltage adjusting circuit coupled between the second input end and the output end of the amplifier controls the amplifier to output the first or the second gamma voltage as the gamma driving voltage according to the grey level and a gamma curve selection signal.
    Type: Application
    Filed: February 16, 2009
    Publication date: April 22, 2010
    Inventors: Ming-Dou Ker, Shao-Chi Chen, Yu-Hsuan Li
  • Diode and applications thereof
    Patent number: 7696580
    Abstract: A diode with low substrate current leakage and suitable for BiCMOS process technology. A buried layer is formed on a semiconductor substrate. A connection region and well contact the buried layer. Isolation regions are adjacent to two sides of the buried layer, each deeper than the buried layer. The isolation regions and the buried layer isolate the connection zone and the well from the substrate. The first doped region in the well is a first electrode. The well and the connection region are electrically connected, acting as a second electrode.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: April 13, 2010
    Inventors: Zi-Ping Chen, Ming-Dou Ker
  • Circuit for electrostatic discharge (ESD) protection
    Patent number: 7692907
    Abstract: A circuit capable of providing electrostatic discharge (ESD) protection, the circuit comprising a first set of power rails comprising a first high power rail and a first low power rail, a first interface circuit between the first set of power rails, the first interface circuit having at least one gate electrode, a first ESD device comprising a terminal coupled to the at least one gate electrode of the first interface circuit, and a second ESD device comprising a terminal coupled to the at least one gate electrode of the first interface circuit, the first ESD device and the second ESD device being configured to maintain a voltage level at the at least one gate electrode of the first interface circuit at approximately a ground level when ESD occurs.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: April 6, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Shih-Hung Chen, Ming-Dou Ker
  • Electrostatic discharge protection device for mixed voltage interface
    Patent number: 7675724
    Abstract: An electrostatic discharge protection circuit that includes at least two transistors connected in a stacked configuration, a first diffusion region of a first dopant type shared by two adjacent transistors, and a second diffusion region of a second dopant type formed in the first diffusion region. A substrate-triggered site is induced into the device structure of the stacked transistors to improve ESD robustness and turn-on speed. An area-efficient layout to realize the stacked transistors is proposed. The stacked transistors may be implemented in ESD protection circuits with a mixed-voltage I/O interface, or in integrated circuits with multiple power supplies. The stacked transistors are fabricated without using a thick-gate mask.
    Type: Grant
    Filed: May 2, 2008
    Date of Patent: March 9, 2010
    Inventors: Ming-Dou Ker, Kuo-Chun Hsu, Hsin-Chin Jiang
  • Data recovery apparatus and method for reproducing recovery data
    Patent number: 7676011
    Abstract: A data recovery apparatus and method for receiving at least an original clock and at least an original data stream output from a transmitter to output at least one recovery data are provided. The original data stream and the recovery data respectively include N steps in a period T of the original clock, wherein N is an integer larger than 0. The data recovery apparatus includes a sampling unit and a processing unit. The sampling unit samples the original data stream according to the original clock, wherein the sampling unit samples the corresponding data of the original data stream at least three times with T/(4N) sample period in each step. The processing unit receives and compares the sampled result output from the sampling unit, and recovers the sampled result to the recovery data according to the compared result.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: March 9, 2010
    Assignee: United Microelectronics Corp.
    Inventors: Ming-Dou Ker, Chien-Hua Wu
  • Transient to digital converters
    Patent number: 7675723
    Abstract: A digital converter including a first adjustment unit and a first transient detection unit. The first adjustment unit adjusts amplitude of an electrostatic discharge (ESD) pulse to generate a first adjustment signal when an ESD event occurs in a first power line and a second power line is at a complementary level. The first transient detection unit generates a first digital code according to the first adjustment signal.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: March 9, 2010
    Assignees: Himax Technologies Limited, National Chiao-Tung University
    Inventors: Ming-Dou Ker, Cheng-Cheng Yen, Chi-Sheng Liao, Tung-Yang Chen
  • High-voltage tolerant power-rail ESD clamp circuit for mixed-voltage I/O interface
    Patent number: 7667936
    Abstract: A circuit for electrostatic discharge (ESD) protection includes a resistor a capacitor connected in series with the resistor, a first transistor including a gate, the gate being connected to a first power supply providing a first voltage to the gate via the resistor and a first terminal connected to the first power supply, a second transistor including a gate, the gate being connected to a second power supply, the second power supply providing a second voltage smaller than the first voltage, the second transistor having a first terminal connected to a second terminal of the first transistor, and a third transistor including a gate, the gate being connected to the second power supply, a first terminal of the third transistor being connected to a second terminal of the second transistor, and a second terminal being connected to a reference voltage different from the first voltage and the second voltage.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: February 23, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Dou Ker, Wen-Yi Chen, Che-Hao Chuang
  • On-chip latch-up protection circuit
    Patent number: 7663853
    Abstract: An on-chip latch-up protection circuit. The lath-up protection circuit includes a core circuit, a power switch, and a current extractor. The power switch controls major current flowing through the core circuit. The current extractor detects amplitude of the major current. The power switch, the core circuit and the current extractor are coupled in series between a relatively-high power line and a relatively-low power line. When the major current surpasses a predetermined amplitude, the power switch is turned off, causing latch-up stops.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: February 16, 2010
    Inventors: Ming-Dou Ker, Jang-Jie Peng, Hsin-Chin Jiang
  • TRANSIENT NOISE DETECTION CIRCUIT
    Publication number: 20100033164
    Abstract: A transient noise detection circuit for detecting a level of a transient noise voltage is disclosed. The transient noise detection circuit comprises a triggering circuit, a rectifying circuit, and a controller. The triggering circuit is coupled between a power rail and a ground node. When the triggering circuit receives a transient noise, the triggering circuit generates a triggering signal. The rectifying circuit comprises a rectifying unit and a current-limiting unit coupled in series. When the rectifying unit receives the triggering signal from the triggering circuit, the rectifying unit will be triggered by the triggering signal. The controller is coupled to a detection node between the rectifying unit and the current-limiting unit. The controller is used for determining the level of the transient noise voltage based on the voltage of the detection node.
    Type: Application
    Filed: August 7, 2008
    Publication date: February 11, 2010
    Applicant: TRANSIENT NOISE DETECTION CIRCUIT
    Inventors: Ming Dou KER, Wen Yi CHEN, Hsin Chin JIANG
  • ESD protection circuit with active triggering
    Patent number: 7656627
    Abstract: An ESD protection circuit is provided. The circuit includes a discharging component, a diode, and an ESD detection circuit. The discharging component is coupled between an input/output pad and a first power line of an IC. The diode is coupled between the input/output pad and a second power line of the IC in a forward direction toward the second power line. The ESD detection circuit includes a capacitor, a resistor, and a triggering component. The capacitor and the resistor are formed in series and coupled between the first power line and the second power line. The triggering component has a positive power end coupled to the input/output pad and a negative power end coupled to the first power line. An input of the triggering component is coupled to a node between the capacitor and the resistor.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: February 2, 2010
    Assignee: Amazing Microelectronic Corp.
    Inventors: Ming-Dou Ker, Yuan-Wen Hsiao, Ryan Hsin-Chin Jiang
  • Method of forming ESD protection device with thick poly film
    Patent number: 7632725
    Abstract: An ESD protection device with thicker polysilicon film, an electronic apparatus having the same, and a method for manufacturing the same are provided. The ESD protection device can be a diode or a MOS transistor with a thicker polysilicon film employed in an ESD protection circuit to protect an electronic apparatus. The electronic apparatus includes a substrate having a device area and an ESD protection circuit area. A first polysilicon film of a first thickness is formed on the device area of the substrate, so as to form an electronic device. A second polysilicon film of a second thickness is formed on the ESD protection circuit area, so as to form an ESD protection device. The second thickness, which is preferably about in the range of 100 to 500 nanometers, is thicker than the first thickness.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: December 15, 2009
    Assignee: TPO Displays Corp.
    Inventors: Ming-Dou Ker, Chih-Kang Deng, Tang-Kui Tseng, An Shih, Sheng-Chieh Yang
  • ESD PROTECTION CIRCUIT FOR DIFFERENTIAL I/O PAIR
    Publication number: 20090296293
    Abstract: An ESD protection circuit for a differential I/O pair is provided. The circuit includes an ESD detection circuit, a discharge device, and four diodes. The first diode is coupled between the first I/O pin and the discharge device in a forward direction toward the discharge device. The second diode is coupled between the second I/O pin and the discharge device in a forward direction toward the second I/O pin. The third diode is coupled between the discharge device and the positive power line in a forward direction toward the positive power line. The fourth diode is coupled between the discharge device and the negative power line in a forward direction toward the discharge device. Via an output end, the ESD detection circuit triggers the discharge device during ESD events.
    Type: Application
    Filed: May 29, 2008
    Publication date: December 3, 2009
    Applicant: AMAZING MICROELECTRONIC CORP
    Inventors: Ming Dou KER, Yuan Wen HSIAO, Hsin Chin JIANG
  • Power-rail ESD protection circuit with ultra low gate leakage
    Publication number: 20090296295
    Abstract: An ESD protection circuit including a clamping module and a detecting module is provided. The clamping module is coupled between a positive power line and a negative power line. The detecting module includes a triggering unit, a resistor, and a MOS capacitor. An output terminal of the triggering unit is used for triggering the clamping module. The resistor is coupled between the negative power line and an input terminal of the triggering unit. The MOS capacitor is coupled between the positive power line and an input terminal of the triggering unit for ESD protection. During a normal power operation, a switching terminal of the triggering unit enables the MOS capacitor to be coupled between the negative power line and an input terminal of the triggering unit. Thereby, the gate tunneling leakage is eliminated and the problem of mistriggering is prevented.
    Type: Application
    Filed: August 5, 2009
    Publication date: December 3, 2009
    Inventors: Ming-Dou Ker, Chin-Hao Chen, Ryan Hsin-Chin Jiang
  • Electrostatic discharge protection structure and electrostatic discharge protection device for a liquid crystal display, and method of making the same
    Patent number: 7626647
    Abstract: An electrostatic discharge protection device, an electrostatic discharge protection structure, and a manufacturing process of the device are provided. The electrostatic discharge protection device includes at least four doping regions, wherein two adjacent regions are of different types. The electrostatic discharge protection structure includes an electrostatic discharge bus, a plurality of first electrostatic discharge protection devices connecting to the gates of the display transistors and the electrostatic discharge bus, a plurality of second electrostatic discharge protection devices connecting to the source/drain of the transistors and the electrostatic discharge bus, and a plurality of third electrostatic discharge protection devices connecting to the input/output terminals of the drive circuit of the display and the electrostatic discharge bus.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: December 1, 2009
    Assignee: AU Optronics Corp.
    Inventors: Ming-Dou Ker, Chih-Kang Deng, Wein-Town Sun
  • SYSTEM-LEVEL ESD DETECTION CIRCUIT
    Publication number: 20090287435
    Abstract: An ESD detection circuit for detecting a level of an ESD voltage on a power rail is provided. The ESD detection circuit includes a resistive component, a diode unit, and a controller. The resistive component is coupled between a detection node and a ground node corresponding to the power rail. The diode unit is coupled between the power rail and the detection node in a forward direction toward the power rail. The controller, coupled to the detection node, is used for determining the level of the ESD voltage based on the voltage of the detection node and the breakdown voltage of the diode unit.
    Type: Application
    Filed: April 18, 2008
    Publication date: November 19, 2009
    Applicant: AMAZING MICROELECTRONIC CORP
    Inventors: Ming Dou KER, Wen Yi CHEN, Hsin Chin JIANG
  • Bidirectional silicon-controlled rectifier
    Publication number: 20090273006
    Abstract: The present invention discloses a bidirectional silicon-controlled rectifier, wherein the conventional field oxide layer, which separates an anode structure from a cathode structure, is replaced by a field oxide layer having floating gates, a virtual gate or a virtual active region. Thus, the present invention can reduce or escape from the bird's beak effect of a field oxide layer, which results in crystalline defects, a concentrated current and a higher magnetic field and then causes abnormal operation of a rectifier. Thereby, the present invention can also reduce signal loss.
    Type: Application
    Filed: April 30, 2008
    Publication date: November 5, 2009
    Inventors: Wen-Yi Chen, Ryan Hsin-Chin Jiang, Ming-Dou Ker
  • TRANSIENT DETECTION CIRCUIT
    Publication number: 20090267584
    Abstract: A transient detection circuit coupled between a first power line and a second power line and including a first control unit, a setting unit, and a voltage regulation unit. The first control unit generates a first control signal. The first control signal is at a first level when an electrostatic discharge (ESD) event occurs. The first control signal is at a second level when the ESD event does not occur. The setting unit sets a first node. The first node is set at the second level when the first control signal is at the first level. The voltage regulation unit regulates the first node. The voltage regulation unit regulates the level of the first node at the second level when the first control signal is at the second level.
    Type: Application
    Filed: April 23, 2008
    Publication date: October 29, 2009
    Applicants: HIMAX TECHNOLOGIES LIMITED, NATIONAL CHIAO-TUNG UNIVERSITY
    Inventors: Ming-Dou Ker, Cheng-Cheng Yen, Chi-Sheng Liao, Tung-Yang Chen