Abstract: A balanced-to-unbalanced converter (balun) is provided, including: a converting circuit having a first processing circuit including a first inductor and a first capacitor connected in series, a second processing circuit including a second capacitor and a second inductor connected in series, the second capacitor being electrically connected to the first inductor, and two balanced output ends connected to the first processing circuit and the second processing circuit, respectively; and a preprocessing circuit connected to the converting circuit and including an unbalanced input end for converting real impedance at the unbalanced input end into complex impedance at the balanced output ends. Accordingly, the balun satisfies the need of the wireless communication chips by providing differential signals with complex impedance.

Abstract: A circuit structure is provided, which includes: a first circuit portion having at least a capacitor; a first dielectric portion combined with the first circuit portion; a second circuit portion electrically connected to the first circuit portion and having at least an inductor; and a second dielectric portion combined with the second circuit portion, wherein the first dielectric portion has a greater dielectric constant than the second dielectric portion, thereby increasing the capacitance value and density and causing the inductor to have a high enough Q value.

Abstract: A testing method is provided, including providing a testing apparatus including a carrier member and a testing element, the carrier member comprising a first surface, a second surface opposing the first surface, and an elastic conductive area defined on the first surface; disposing an object-to-be-tested on the elastic conductive area; electrically connecting the testing element to the object-to-be-tested and the carrier member, to form an electric loop among the carrier member, the object-to-be-tested and the testing element. Through the design of the elastic conductive area, the object-to-be-tested can be secured with a small pressure applied thereto, and is prevented from being cracked.

Abstract: An interconnecting mechanism is provide, which includes paired first sub-interconnecting mechanisms and paired second sub-interconnecting mechanisms. The first pair of sub-interconnecting mechanisms includes first and second axially symmetrical spiral conductive elements. The second pair of sub-interconnecting mechanisms includes third and fourth axially symmetrical spiral conductive elements. Configuring the pairs of sub-interconnecting mechanisms in a differential transmission structure having a spiral shape is used to avert sounds and noise signals between different chips or substrates caused by a miniaturizing fabrication process or an increased wiring density.

Abstract: A balanced-to-unbalanced converter (balun) is provided, including: a converting circuit having a first processing circuit including a first inductor and a first capacitor connected in series, a second processing circuit including a second capacitor and a second inductor connected in series, the second capacitor being electrically connected to the first inductor, and two balanced output ends connected to the first processing circuit and the second processing circuit, respectively; and a preprocessing circuit connected to the converting circuit and including an unbalanced input end for converting real impedance at the unbalanced input end into complex impedance at the balanced output ends. Accordingly, the balun satisfies the need of the wireless communication chips by providing differential signals with complex impedance.

Abstract: An asymmetric differential inductor includes first and second conductive wirings spirally disposed on a substrate having a first input terminal, a second input terminal, a ground terminal, and a central conductive wiring. The central conductive wiring has a central contact connecting the ground terminal and a central end away from the ground terminal. The first conductive wiring extends across the central conductive wiring and has a first contact connecting the first input terminal and a first end connecting the central end. The second conductive wiring extends across the central conductive wiring and interlaces with the first conductive wiring and has a second contact connecting the second input terminal and a second end connecting the central end. Corresponding portions of wiring sections of the first and second conductive wirings at opposite sides of the central conductive wiring are asymmetrical to one another to thereby save substrate space and facilitate circuit layout.

Abstract: A layer structure with an electromagnetic interference (EMI) shielding effect is applicable for reducing an EMI effect caused by signal transmission between through silicon vias, so as to effectively provide the EMI shielding effect between electrical interconnections of a three-dimensional (3D) integrated circuit. By forming EMI-shielding through silicon vias at predetermined positions between the through silicon vias used for signal transmission, a good EMI shielding effect can be attended, and signal distortion possibly caused by the EMI effect can be reduced between different chips or substrates.

Abstract: An interconnecting mechanism is provide, which includes paired first sub-interconnecting mechanisms and paired second sub-interconnecting mechanisms. The first pair of sub-interconnecting mechanisms includes first and second axially symmetrical spiral conductive elements. The second pair of sub-interconnecting mechanisms includes third and fourth axially symmetrical spiral conductive elements. Configuring the pairs of sub-interconnecting mechanisms in a differential transmission structure having a spiral shape is used to avert sounds and noise signals between different chips or substrates caused by a miniaturizing fabrication process or an increased wiring density.

Abstract: A layer structure with an electromagnetic interference (EMI) shielding effect is applicable for reducing an EMI effect caused by signal transmission between through silicon vias, so as to effectively provide the EMI shielding effect between electrical interconnections of a three-dimensional (3D) integrated circuit. By forming EMI-shielding through silicon vias at predetermined positions between the through silicon vias used for signal transmission, a good EMI shielding effect can be attended, and signal distortion possibly caused by the EMI effect can be reduced between different chips or substrates.

Abstract: A symmetric differential inductor structure includes first, second, third and fourth spiral conductive wirings disposed in four quadrants of a substrate, respectively. Further, a fifth conductive wiring connects the first and fourth spiral conductive wirings, and a sixth conductive wiring connects the second and third spiral conductive wirings. The first and second spiral conductive wirings are symmetric but not intersected with one another, and the third and fourth spiral conductive wirings are symmetric but not intersected with one another. Therefore, the invention attains full geometric symmetry to avoid using conductive wirings that occupy a large area of the substrate as in the prior art and to thereby increase the product profit and yield.

Abstract: An asymmetric differential inductor includes first and second conductive wirings spirally disposed on a substrate having a first input terminal, a second input terminal, a ground terminal, and a central conductive wiring. The central conductive wiring has a central contact connecting the ground terminal and a central end away from the ground terminal. The first conductive wiring extends across the central conductive wiring and has a first contact connecting the first input terminal and a first end connecting the central end. The second conductive wiring extends across the central conductive wiring and interlaces with the first conductive wiring and has a second contact connecting the second input terminal and a second end connecting the central end. Corresponding portions of wiring sections of the first and second conductive wirings at opposite sides of the central conductive wiring are asymmetrical to one another to thereby save substrate space and facilitate circuit layout.

Abstract: A symmetric differential inductor structure includes first, second, third and fourth spiral conductive wirings disposed in four quadrants of a substrate, respectively. Further, a fifth conductive wiring connects the first and fourth spiral conductive wirings, and a sixth conductive wiring connects the second and third spiral conductive wirings. The first and second spiral conductive wirings are symmetric but not intersected with one another, and the third and fourth spiral conductive wirings are symmetric but not intersected with one another. Therefore, the invention attains full geometric symmetry to avoid using conductive wirings that occupy a large area of the substrate as in the prior art and to thereby increase the product profit and yield.