Abstract: An integrated circuit (IC) die for electromagnetic band gap (EBG) noise suppression is provided. A power mesh and a ground mesh are stacked within a back end of line (BEOL) region overlying a semiconductor substrate, and an inductor is arranged over the power and ground meshes. The inductor comprises a plurality of inductor segments stacked upon one another and connected end to end to define a length of the inductor. A capacitor underlies the power and ground meshes, and is connected in series with the inductor. Respective terminals of the capacitor and the inductor are respectively coupled to the power and ground meshes. A method for manufacturing the IC die is also provided.

Abstract: An electronic device is disclosed that includes a power distribution network, a first resonant network, a second resonant network, and a third resonant network. The power distribution network is configured transmit a voltage. The first resonant network is coupled to a first terminal of the power distribution network, and is configured to provide a first electrostatic discharge (ESD) protection to the power distribution network. The second resonant network is coupled to a second terminal of the power distribution network, and is configured to provide a second ESD protection to the power distribution network. The third resonant network coupled between the first terminal and the second terminal of the power distribution network, and the first resonant network, the second resonant network, and the third resonant network are configured to filter an AC signal from the power distribution network.

Abstract: The three dimensional (3D) circuit includes a first tier including a semiconductor substrate, a second tier disposed adjacent to the first tier, a three dimensional inductor including an inductive element portion, the inductive element portion including a conductive via extending from the first tier to a dielectric layer of the second tier. The 3D circuit includes a ground shield surrounding at least a portion of the conductive via. In some embodiments, the ground shield includes a hollow cylindrical cage. In some embodiments, the 3D circuit is a low noise amplifier.

Abstract: An electrostatic discharge (ESD) protection circuit includes a first inductor coupled to an input node configured to receive an input signal and to an output node. A second inductor is coupled to the input node and to a first ESD protection device, and a third inductor is coupled to the output node and to a second ESD protection device.

Abstract: A method of operating a pull-up circuit includes turning off a first transistor of the pull-up circuit during a failsafe period by a feedback signal, the feedback signal being received by way of a feedback circuit; isolating the first transistor from the feedback circuit during a pull-up period; and coupling or isolating a control terminal of the first transistor and a control terminal of a second transistor of the pull-up circuit during the pull-up period by a first switch.

Abstract: An electronic device is disclosed that includes a power distribution network, a first resonant network, a second resonant network, and a third resonant network. The power distribution network is configured transmit a voltage. The first resonant network is coupled to a first terminal of the power distribution network, and is configured to provide a first electrostatic discharge (ESD) protection to the power distribution network. The second resonant network is coupled to a second terminal of the power distribution network, and is configured to provide a second ESD protection to the power distribution network. The third resonant network coupled between the first terminal and the second terminal of the power distribution network, and the first resonant network, the second resonant network, and the third resonant network are configured to filter an AC signal from the power distribution network.

Abstract: A clock and data recovery (CDR) circuit includes a phase detector, a phase interpolator, a finite state machine, and a divisor-controllable frequency divider. The phase detector compares an input data signal with a frequency dividing signal and generates a phase indication signal to indicate a phase difference between the input data signal and the frequency dividing signal. The phase interpolator performs phase interpolation on first and second clock signals received by the phase interpolator, so as to generate a phase interpolation signal. The finite state machine coupled to the phase detector and the phase interpolator generates the control signal based on the phase indication signal and the phase interpolation signal. The divisor-controllable frequency divider coupled to the phase detector and the phase interpolator divides the second frequency of the phase interpolation signal by a divisor so as to generate the frequency dividing signal. A CDR method is also provided.

Abstract: A vehicle lamp includes two light guide plates, and at least one light emitting module. Each light guide plate has two side surfaces opposite to each other in a thickness direction, and a light input surface and a light output surface interconnecting the side surfaces. A length in the thickness direction between the side surfaces of each of the light guide plates is not greater than 10 millimeters. One of the side surfaces of one of the light guide plates faces one of the side surfaces of the other one of the light guide plates, such that the light input surfaces of the light guide plates are adjacent to each other. Each light emitting module is disposed at a position corresponding to the light input surface of a corresponding light guide plate.

Abstract: A device includes a pull-up circuit, first and second switches, and a feedback circuit. The pull-up circuit has a first terminal electrically coupled to a pad, and a second terminal electrically coupled to a first power node. The first switch has a first terminal electrically coupled to a first control terminal of the pull-up circuit, and a second terminal electrically coupled to a second control terminal of the pull-up circuit. The feedback circuit has a first terminal electrically coupled to the pad, and a feedback terminal. The second switch has a first terminal electrically coupled to the first control terminal of the pull-up circuit, a second terminal electrically coupled to the feedback terminal of the feedback circuit, and a control terminal electrically coupled to a second power node.

Abstract: An electro-static discharge (ESD) structure includes an input pad, and a first switching device electrically connected to the input pad. The ESD structure further includes a first diode, wherein the first switching device is configured to selectively connect the first diode to the input pad, and the first diode is configured to provide a first dissipation path for an ESD event at the input pad. The ESD structure further includes a second diode selectively connectable to the input pad, wherein the second diode is configured to provide a second dissipation path for the ESD event at the input pad.

Abstract: Through-chip coupling is utilized for signal transport, where an interface is formed between a first coil on a first integrated circuit (IC) chip and a second coil on a second IC chip. The first coil is coupled to an antenna. The second coil is coupled to an amplifier circuit. The second coil is not in direct contact with the first coil. The first coil and the second coil communicatively transmit signals between the antenna and the first amplifier circuit.

Abstract: A method of electrically coupling a first node and a second node of a switch cell includes biasing the second node and a bias node of the switch cell at a direct current (DC) voltage level of a second voltage level greater than a first voltage level. A first switch unit coupled between the first node and the second node is tuned on by a first control signal having a third voltage level. The third voltage level being greater than the first voltage level, and a difference between the third voltage level and the first voltage level is about twice a difference between the second voltage level and the first voltage level. Also, a second switch unit coupled between the second node and the bias node is turned off by a second control signal having the first voltage level.

Abstract: A headlight heat dissipation device includes a headlight casing which has at least one hole and at least one metal-made and heat-conducting unit covers the at least one hole. The at least one metal-made and heat-conducting unit includes at least one slot which communicates with the at least one hole. A water-proof and air-permeable unit is mounted to the at least one metal-made and heat-conducting unit and covers the at least one slot. The at least one metal-made and heat-conducting unit has an extension portion located in the headlight casing and the extension portion is connected with the light source so as to transfer the heat from the light source to the at least one metal-made and heat-conducting unit to quickly bring the heat away from the headlight casing.

Abstract: An electro-static discharge (ESD) protection circuit is configured to protect circuitry during an ESD event. The ESD protection circuit includes an ESD detection circuit and an ESD clamp circuit. The ESD clamp circuit includes a stack of transistors that is controlled by the ESD detection circuit. A first stack transistor of the stack of transistors includes a deep n-well. The stack of transistors is configured to be activated responsive to detecting the ESD event. The stack of transistors is configured to be deactivated responsive to detecting at least one of normal current conditions or normal voltage conditions. The ESD detection circuit includes a string of diodes. The string of diodes is configured to be activated responsive to detecting the ESD event. The stack of transistors is configured to be a voltage divider responsive to normal voltage conditions.

Abstract: A transformer includes first and second semiconductor substrates. The first semiconductor substrate includes a first circuit, a first coil providing a first impedance, and a first capacitor coupled in parallel with the first coil. The second semiconductor substrate includes a second circuit, a second coil providing a second impedance and inductively coupled with the first coil, and a second capacitor coupled in parallel with the second coil.

Abstract: A device comprises a radio frequency peak detector configured to receive an ac signal from a voltage controlled oscillator and generate a dc value proportional to the ac signal at an output of the radio frequency peak detector and a feedback control unit coupled between an output of the radio frequency peak detector and an input of the voltage controlled oscillator.