Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.

Abstract: A semiconductor device and method for forming the semiconductor device are provided. In some embodiments, a semiconductor substrate comprises a device region. An isolation structure extends laterally in a closed path to demarcate the device region. A first source/drain region and a second source/drain region are in the device region and laterally spaced. A sidewall of the first source/drain region directly contacts the isolation structure at a first isolation structure sidewall, and remaining sidewalls of the first source/drain region are spaced from the isolation structure. A selectively-conductive channel is in the device region, and extends laterally from the first source/drain region to the second source/drain region. A plate comprises a central portion and a first peripheral portion. The central portion overlies the selectively-conductive channel, and the first peripheral portion protrudes from the central portion towards the first isolation structure sidewall.

Abstract: A supply voltage detecting circuit has a voltage detection circuit and a current clamping circuit. The voltage detection circuit receives and detects a supply voltage and is used to detect to generate a low-voltage detection signal. When the supply voltage is lower than a set level, the low voltage detection signal output by the voltage detection circuit turns off the current clamping circuit, and a transistor current flowing through the voltage detection circuit is proportional to the supply voltage; and when the supply voltage is higher than or equal to the set level, the low voltage detection signal output by the voltage detection circuit turns on the current clamping circuit, and the current clamping circuit provides a constant current to maintain the operation of the voltage detection circuit, wherein the transistor current flowing through the voltage detection circuit is proportional to the constant current.

Abstract: An under voltage lockout circuit includes a reference circuit, an oscillator, a voltage divider, and a dynamic comparator. The reference circuit generates a reference voltage signal and a current source activation signal. The oscillator is activated to generate a clock signal after receiving the current source activation signal. The voltage divider samples an operating voltage signal to generate a detection voltage signal after receiving the clock signal. The voltage divider includes a switched-capacitor circuit for adjusting a ratio of the detection voltage signal to the operating voltage signal. The dynamic comparator receives the clock signal, the detection voltage signal and the reference voltage signal, and compares the reference voltage signal with the detection voltage signal only after receiving the clock signal. When the reference voltage signal is higher than the detection voltage signal, the dynamic comparator outputs a power-on-reset pulse signal.

Abstract: A supply voltage detecting circuit has a voltage detection circuit and a current clamping circuit. The voltage detection circuit receives and detects a supply voltage and is used to detect to generate a low-voltage detection signal. When the supply voltage is lower than a set level, the low voltage detection signal output by the voltage detection circuit turns off the current clamping circuit, and a transistor current flowing through the voltage detection circuit is proportional to the supply voltage; and when the supply voltage is higher than or equal to the set level, the low voltage detection signal output by the voltage detection circuit turns on the current clamping circuit, and the current clamping circuit provides a constant current to maintain the operation of the voltage detection circuit, wherein the transistor current flowing through the voltage detection circuit is proportional to the constant current.

Abstract: An under voltage lockout circuit includes a reference circuit, an oscillator, a voltage divider, and a dynamic comparator. The reference circuit generates a reference voltage signal and a current source activation signal. The oscillator is activated to generate a clock signal after receiving the current source activation signal. The voltage divider samples an operating voltage signal to generate a detection voltage signal after receiving the clock signal. The voltage divider includes a switched-capacitor circuit for adjusting a ratio of the detection voltage signal to the operating voltage signal. The dynamic comparator receives the clock signal, the detection voltage signal and the reference voltage signal, and compares the reference voltage signal with the detection voltage signal only after receiving the clock signal. When the reference voltage signal is higher than the detection voltage signal, the dynamic comparator outputs a power-on-reset pulse signal.

Abstract: A substrate bias generating circuit is provided for generating a substrate bias to a body of a transistor of a functional circuit. The substrate bias generating circuit includes a first transistor and a second transistor which are connected in series between a supply voltage terminal and a ground terminal, and control terminals of the first transistor and the second transistor are coupled to each other. A third transistor includes a terminal electrically coupled to body of one of the first transistor and the second transistor, and another terminal coupled to the body. A resistance element is connected between the terminal of the third transistor and a current input terminal of the first transistor or a current output terminal of the second transistor.

Abstract: A current source circuit includes a first current mirror, a first bipolar junction transistor (BJT), a second BJT, a third BJT and a first resistor. The first current minor has a first input terminal receiving a first current and a first output terminal providing a second current. The first BJT has a first collector coupled to the first output terminal, a first base, and a first emitter coupled to a reference voltage. The second BJT has a second collector coupled to the first input terminal, a second base coupled to the first base, and a second emitter. The first resistor is coupled between the second emitter and the reference voltage. The third BJT has a third collector providing a third current, a third base coupled to the first output terminal, and a third emitter coupled to the first base.

Abstract: The present disclosure illustrates an under voltage lockout circuit in which a band gap circuit includes two current input terminals for generating a first current associated with band gap, an amplifier includes two inputs terminal coupled to the two current input terminal, and an output terminal configured to output an error-amplified signal, a terminal of a control device is coupled with a voltage source, and a control terminal of the control device receives the error-amplified signal, a voltage divider is coupled between current input terminals and other terminal of the control device, a comparator receiving a lockout voltage and outputting an under voltage lockout signal, a current mirror circuit is coupled to the first input terminal of the comparator and the band gap circuit, and configured to generate a second current mirroring from the first current.

Abstract: A body bias voltage generating circuit for supplying a body bias voltage to a body of a transistor of a functional circuit is provided, including: a first transistor and a second transistor connected in series between a supply voltage terminal and a ground terminal, wherein a control terminal of the first transistor is coupled with a control terminal of the second transistor; a third transistor, wherein a body of the third transistor is electrically coupled with any one of the body of the first transistor and the second transistor, and a terminal of the third transistor is coupled with the body of the third transistor; and a resistance element coupled between the terminal of the third transistor and a current input terminal of the first transistor or a current output terminal of the second transistor. The terminal of the third transistor is the body bias voltage.

Abstract: A level shift circuit is provided, which includes a boost circuit and a voltage converting circuit. The boost circuit is coupled to a first high voltage terminal to receive an input voltage signal. The boost circuit includes at least one low threshold voltage element and is configured to boost the input voltage signal. The voltage converting circuit is coupled to a second high-voltage terminal and includes a low-pass filter circuit, a high-pass filter circuit, an upper switch element and a lower switch element. The upper switch element and the lower switch element are electrically cascaded between the second high-voltage terminal and a low voltage terminal. The low-pass filter circuit and the high-pass filter are electrically connected between the control terminal of the upper switch element and the control terminal of the lower switch element. The upper switch element and the lower switch element are standard threshold voltage elements.

Abstract: A level shift circuit is provided, which includes a boost circuit and a voltage converting circuit. The boost circuit is coupled to a first high voltage terminal to receive an input voltage signal. The boost circuit includes at least one low threshold voltage element and is configured to boost the input voltage signal. The voltage converting circuit is coupled to a second high-voltage terminal and includes a low-pass filter circuit, a high-pass filter circuit, an upper switch element and a lower switch element. The upper switch element and the lower switch element are electrically cascaded between the second high-voltage terminal and a low voltage terminal The low-pass filter circuit and the high-pass filter are electrically connected between the control terminal of the upper switch element and the control terminal of the lower switch element. The upper switch element and the lower switch element are standard threshold voltage elements.

Abstract: A body bias voltage generating circuit for supplying a body bias voltage to a body of a transistor of a functional circuit is provided, including: a first transistor and a second transistor connected in series between a supply voltage terminal and a ground terminal, wherein a control terminal of the first transistor is coupled with a control terminal of the second transistor; a third transistor, wherein a body of the third transistor is electrically coupled with any one of the body of the first transistor and the second transistor, and a terminal of the third transistor is coupled with the body of the third transistor; and a resistance element coupled between the terminal of the third transistor and a current input terminal of the first transistor or a current output terminal of the second transistor. The terminal of the third transistor is the body bias voltage.

Abstract: The present disclosure illustrates an under voltage lockout circuit in which a band gap circuit includes two current input terminals for generating a first current associated with band gap, an amplifier includes two inputs terminal coupled to the two current input terminal, and an output terminal configured to output an error-amplified signal, a terminal of a control device is coupled with a voltage source, and a control terminal of the control device receives the error-amplified signal, a voltage divider is coupled between current input terminals and other terminal of the control device, a comparator receiving a lockout voltage and outputting an under voltage lockout signal, a current mirror circuit is coupled to the first input terminal of the comparator and the band gap circuit, and configured to generate a second current mirroring from the first current.

Abstract: A current source circuit includes a first current mirror, a first bipolar junction transistor (BJT), a second BJT, a third BJT and a first resistor. The first current minor has a first input terminal receiving a first current and a first output terminal providing a second current. The first BJT has a first collector coupled to the first output terminal, a first base, and a first emitter coupled to a reference voltage. The second BJT has a second collector coupled to the first input terminal, a second base coupled to the first base, and a second emitter. The first resistor is coupled between the second emitter and the reference voltage. The third BJT has a third collector providing a third current, a third base coupled to the first output terminal, and a third emitter coupled to the first base.

Abstract: A circuit comprises a first switch, a second switch, a third switch, and a fourth switch. Each has a first end and a second end. The circuit also comprises a capacitive device having a first capacitive end and a second capacitive end, and a voltage source. A first node having a first voltage is coupled to the first fourth-switch end, to the first second-switch end, and to the first capacitive end. A second node having a second voltage is coupled to the voltage source, to the second fourth-switch end, and to the second third-switch end. A third node is coupled to the second second-switch end, and to the first first-switch end. The first switch and the second switch are controlled such that the first node and the voltage source selectively provide the second voltage.

Abstract: In at least one embedment, a circuit includes an input node, an energy node, a reference node, an output node, a first capacitive device, a first diode device, and a power converter. The first capacitive device is coupled between the energy node and the reference node. The first diode device has an anode coupled to the input node and a cathode coupled to the energy node. The power converter is coupled between the energy node and the output node.

Abstract: In at least one embedment, a circuit includes an input node, an energy node, a reference node, an output node, a first capacitive device, a first diode device, and a power converter. The first capacitive device is coupled between the energy node and the reference node. The first diode device has an anode coupled to the input node and a cathode coupled to the energy node. The power converter is coupled between the energy node and the output node.

Abstract: A single-inductor multiple-output power converter includes an inductor having a first terminal and a second terminal. The first terminal of the inductor is coupled to a power input terminal, and the second terminal of the inductor is switched to either of the first terminal of the inductor, multiple power output terminals, and a ground terminal. By switching the second terminal of the inductor between the first terminal of the inductor, the power output terminals, and the ground terminal, the power converter may provide multiple output voltages at the power output terminals respectively, in a less loss and thereby higher efficiency manner.

Abstract: Some embodiments regard a method comprising: using an input voltage to generate an output voltage having a first voltage level; in a first period, when the output voltage changes from the first voltage level to a second voltage level, storing electrical charges resulted from the output voltage changing from the first voltage level to the second voltage level; and in a second period subsequent to the first period when the output voltage demands energy, using a voltage generated from the stored electrical charges in place of the input voltage to generate the output voltage.