Abstract: A display substrate includes a display region. The display region includes a plurality of circuit units. A circuit unit of the circuit units includes a pixel drive circuit and a plurality of signal wires connected with the pixel drive circuit. The pixel drive circuit at least includes a storage capacitor and a shield electrode. The storage capacitor includes a first plate and a second plate. The plurality of signal wires at least include a first scan signal wire of which a body portion extends along a first direction, a data signal wire of which a body portion extends along a second direction, a first power supply line of which a body portion extends along the second direction, and an initial signal.

Abstract: A display apparatus includes a plurality of first touch channels, second touch channels, first touch traces, second touch traces, and a first touch chip and second touch chip. At least one first touch channel and second touch channel are arranged in each sub-region, and the at least one first touch channel and second touch channel are arranged crosswise and insulated from each other; first touch channels located in different sub-regions are insulated from each other, and second touch channels located in different sub-regions are insulated from each other. In any two sub-regions, first touch traces connected to first touch channels and second touch traces connected to second touch channels are connected to the first touch chip; in remaining two sub-regions except the any two sub-regions, first touch traces connected to first touch channels and second touch traces connected to second touch channels are connected to the second touch chip.

Abstract: Provided are a pixel circuit, display apparatus, and driving method. The pixel circuit includes: a light emitting device; a drive transistor, according to a data voltage signal, generating a drive current to drive the light emitting device to emit light; a first compensation circuit, in response to a signal of a first control signal terminal, providing a first reference signal of a first reference signal terminal to a first electrode of the drive transistor; a second compensation circuit, in response to a signal of a second control signal terminal and a signal of a third control signal terminal, providing a threshold voltage of the drive transistor and the first reference signal input into the first electrode of the drive transistor to a gate of the drive transistor; a data writing circuit; a coupling control circuit; and a light emitting control circuit.

Abstract: A display panel, including an active area and a peripheral area, which is located outside of the active area, wherein the active area comprises a base substrate, and a display structure layer and a touch structure layer sequentially arranged on the base substrate; the peripheral area includes an isolation dam, a first ground trace and a second ground trace arranged on the base substrate; and the first ground trace is located at a side of the isolation dam close to the active area, and the second ground trace is located at a side of the isolation dam away from the active area.

Abstract: A pixel driving circuit and a driving method therefor, and a display panel. The pixel driving circuit is used for driving a light-emitting unit. The pixel driving circuit includes: a driving circuit, a compensation circuit, a control circuit and a data writing circuit. The driving circuit is connected to a first node, a second node and a third node, and is used for inputting a driving current to the third node by means of the second node according to a voltage signal of the first node. The compensation circuit is connected to the first node, the third node and a gate driving signal end, and is used for connecting the first node and the third node in response to a signal of the gate driving signal end.

Abstract: A display substrate, a driving method thereof, and a display apparatus. The display substrate includes multiple circuit units. A circuit unit at least includes a pixel drive circuit, and at least one control signal line (24, 25) configured to provide a control signal to the pixel drive circuit. In at least one circuit unit, the pixel drive circuit at least includes a drive transistor (T3), a first control transistor (T5, T8) and a second control transistor (T6, T7), the first control transistor (T5, T8) and second control transistor (T6, T7) are connected to the drive transistor (T3), respectively; in at least one pixel drive circuit of at least one unit row, the first control transistor (T5, T8) is connected to a control signal line (24, 25) in a previous unit row, the second control transistor (T6, T7) is connected to control signal line (24, 25) in the current unit row.

Abstract: An array substrate.

Abstract: Disclosed are a shift register unit, a drive control circuit, a display apparatus and a drive method. The shift register unit includes an input circuit configured to provide a signal from the signal input terminal to the first node in response to a signal from the first clock signal terminal; a first stabilizer circuit, configured to provide a signal from a stability control signal terminal to the first node in response to a signal from a switch control signal terminal; a conducting control circuit configured to establish a conducting path between the first node and the second node in response to a signal from a first reference signal terminal; and an output circuit configured to provide a signal from the second clock signal terminal to the signal output terminal in response to a signal at the second node.

Abstract: A display substrate includes a base substrate, a plurality of sub-pixels and a first scanning line, the subpixel includes a subpixel driving circuit including a driving transistor and a compensation transistor, a gate electrode of the compensation transistor is coupled to a corresponding first scanning line, a first/second electrode of the compensation transistor is coupled to a second/gate electrode of the driving transistor, the compensation transistor includes a compensation active layer including a first channel portion, a second channel portion and a first conductor portion, the first conductor portion is respectively coupled to the first channel portion and the second channel portion; at least part of an orthographic projection of the first conductor portion on the base substrate is located between an orthographic projection of the first scanning line on the base substrate and the orthographic projection of the gate electrode of the driving transistor on the base substrate.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, a voltage control circuit and an output circuit; the driving signal generation circuit generates the Nth stage of driving signal; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the output control circuit connects the first control node and the second node under the control of a potential of the first node; the voltage control circuit controls a potential of the second node according to the potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the second control node; N is a positive integer.

Abstract: A display substrate including a first light emitting control signal line, a second light emitting control signal line and a plurality of sub-pixels; the sub-pixel includes a sub-pixel driving circuit and a light emitting element, the sub-pixel driving circuit includes a driving transistor, a power control transistor and a light emitting control transistor; a gate electrode of the power control transistor is coupled to a corresponding first light emitting control signal line, a first electrode of the power control transistor is coupled to a corresponding power line, and a second electrode of the power control transistor is coupled to a first electrode of the driving transistor, a gate electrode of the light emitting control transistor is coupled to a corresponding second light emitting control signal line, and a first electrode of the light emitting control transistor is connected to a second electrode of the driving transistor.

Abstract: A display substrate and a display device, the display substrate includes a first display region, and the display substrate includes first pixel structures in the first display region, the first pixel structure includes two first sub-pixels and two second sub-pixels, the first sub-pixel includes a first opening, and the second sub-pixel includes a second opening. In the first pixel structure, patterns of orthographic projections of the first openings of the two first sub-pixels on the base substrate have a first center and a third center, respectively, patterns of orthographic projections of the second openings of the two second sub-pixels on the base substrate have a second center and a fourth center, respectively, the first center, the second center, the third center and the fourth center are connected in sequence to form a first quadrilateral, and at least two sides of the first quadrilateral have lengths not equal to each other.

Abstract: A display substrate includes a first display area and a second display area, the second display area is located on at least one side of the first display area, and the first display area is an under-screen-sensing region; the display substrate at least includes: a base substrate at least located in the first display area and the second display area and located on a side of the base substrate; a pixel circuit layer, at least part of which is located in the second display area; a first reflective interface located at least in the first display area and the second display area and located on a side of the base substrate away from the pixel circuit layer; a first polarizing structure, at least part of which is located in the second display area, and at least part of which is located between the base substrate and the first reflective interface.

Abstract: A display substrate is provided. The display substrate has a display region and a peripheral region at least partially surrounding the display region, and includes: a base substrate, a first barrier dam, a first power signal line, a crack detection circuit, and a crack detection circuit, an orthographic projection of at least part of a boundary of the first power signal line away from the display region on the base substrate is located inside an orthographic projection of the first barrier dam on the base substrate; and an orthographic projection of the crack detection circuit on the base substrate at least partially overlaps with an orthographic projection of the first barrier dam on the base substrate.

Abstract: A pixel driving circuit includes: a driving transistor, a data write circuit, a threshold compensation circuit, a first capacitor, and a second capacitor. A gate of the driving transistor is coupled to a first node, a first electrode is coupled to a second node, and a second electrode is coupled to a third node. The data write circuit is configured to transmit a signal of a data signal terminal to the second node in response to a signal of a first gate driving signal terminal. The threshold compensation circuit is configured to communicate the first node with the third node in response to a signal of a second gate driving signal terminal. The first capacitor is coupled between the first node and the first gate driving signal terminal. The second capacitor is coupled between the first node and the second gate driving signal terminal.

Abstract: An array substrate is provided. The array substrate includes a plurality of first signal lines extending along a second direction, respectively. The plurality of first signal lines include a plurality of third voltage supply lines and a plurality of fourth voltage supply lines. A respective third voltage supply line of the plurality of third voltage supply lines is in a region having a column of pixel driving circuits. A respective fourth voltage supply line of the plurality of fourth voltage supply lines is in a region having a column of dummy circuits. The plurality of third voltage supply lines are configured to provide a first reference voltage signal. The plurality of fourth voltage supply lines are configured to provide a second reference voltage signal, the second reference voltage signal being different from the first reference voltage signal.

Abstract: A pixel arrangement structure and a display device. The pixel arrangement structure includes at least one array unit, which includes a first pixel row, a second pixel row, a third pixel row and a fourth pixel row; the first pixel row includes a plurality of first sub-pixels; the second pixel row includes a plurality of second sub-pixels and a plurality of third sub-pixels; the third pixel row includes a plurality of first sub-pixels; the fourth pixel row includes a plurality of second sub-pixels and a plurality of third sub-pixels, the first pixel row, the second pixel row, the third pixel row and the fourth pixel row are arranged along a second direction, and a virtual isosceles trapezoid is formed by lines sequentially connecting centers of two adjacent first sub-pixels in the first pixel row and centers of two adjacent first sub-pixels in the third pixel row.

Abstract: A display substrate is provided in the present disclosure. The display substrate includes a drive circuit layer disposed on a substrate, the drive circuit layer includes a plurality of circuit units, at least one circuit unit of the plurality of circuit units includes a pixel drive circuit, a first power supply line providing a power supply signal to the pixel drive circuit, a data signal line providing a data signal to the pixel drive circuit, and a data fan-out line connected with the data signal line; at least a portion of the first power supply line, the data signal line, and the data fan-out line extends along a second direction and is arranged at intervals along a first direction, at least a portion of the data fan-out line is disposed between the first power supply line and the data signal line, the first direction intersects with the second direction.

Abstract: A display panel includes a base substrate, data lines, first signal lines, second lines, first interconnection portions and a pixel electrode layer. One of the first interconnection portions is connected between a first dummy line and a second dummy line, and an orthographic projection of the first dummy line on the base substrate interests an orthographic projection of the second dummy line on the base substrate. Orthographic projections of the electrode portions on the base substrate do not overlap with orthographic projections of the first interconnection portions on the base substrate.

Abstract: A pixel circuit, a driving method therefor, a display substrate and a display apparatus, the pixel circuit includes a node control sub-circuit, a storage sub-circuit, a driving sub-circuit and a light emitting control sub-circuit; the storage sub-circuit is electrically connected to a second node (N2) and a first power supply line (VDD) respectively, and is configured to charge the second node (N2) when a first scanning signal line (Gate1) is an effective level signal.