Abstract: A display substrate and a display device, the display substrate includes a first display region, and the display substrate includes first pixel structures in the first display region, the first pixel structure includes two first sub-pixels and two second sub-pixels, the first sub-pixel includes a first opening, and the second sub-pixel includes a second opening. In the first pixel structure, patterns of orthographic projections of the first openings of the two first sub-pixels on the base substrate have a first center and a third center, respectively, patterns of orthographic projections of the second openings of the two second sub-pixels on the base substrate have a second center and a fourth center, respectively, the first center, the second center, the third center and the fourth center are connected in sequence to form a first quadrilateral, and at least two sides of the first quadrilateral have lengths not equal to each other.

Abstract: A display substrate includes conductive layers including data lines, connection lines and fan-out lines. A connection line crosses at least one data line and is insulated from the crossed data line(s). A first fan-out line is electrically connected to the connection line, and a second fan-out line is electrically connected to an end of a second data line proximate to a fan-out region. The first fan-out line includes a transfer line. The fan-out region includes a first fan-out region and a second fan-out region, and the transfer line is located in the second fan-out region. The transfer line and second fan-out lines are located in different conductive layers, and crosses at least one second fan-out line. The transfer line includes a main body and two connection ends, and the main body is located on a side of the two connection ends proximate to the display region.

Abstract: A display substrate and a display device are provided. Sub-pixels in the display substrate includes a light emitting element including a light emitting region. The light emitting element includes a light emitting functional layer, a first electrode and a second electrode. One defining structure is disposed between the light emitting regions of two adjacent sub-pixels having different colors. The adjacent sub-pixels include a first sub-pixel and a second sub-pixel. A ratio of a distance between edges, close to each other, of the light emitting region of the first sub-pixel and the one defining structure to a distance between edges, close to each other, of the light emitting region of the second sub-pixel and the one defining structure is 0.1 to 0.8. At least one layer of the light emitting functional layer is disconnected at an edge of the structure.

Abstract: Disclosed is a display substrate including a base substrate (10) and a gate drive circuit disposed on the base substrate (10), wherein the gate drive circuit includes a plurality of shift register circuits (GOA) cascaded, a shift register circuit (GOA) includes a plurality of NOT gate circuits, a NOT gate circuit includes a first control transistor and a second control transistor, and transistor types of the first control transistor and the second control transistor are different. Arrangement modes of transistors of at least two NOT gate circuits among the plurality of NOT gate circuits of the shift register circuit (GOA) are different.

Abstract: A display substrate and a display device are provided. The display substrate includes a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel. Each sub-pixel includes a light-emitting region. Sides of each light-emitting region or extension lines of the sides are sequentially connected to form a polygon. Vertexes of the polygon of at least a part of the sub-pixels have non-overlapped regions with angle portions of the corresponding light-emitting regions. Corners of the light-emitting region of at least one sub-pixel at least include a first angle portion. An area of a non-overlapped region between the first angle portion and a vertex angle of the polygon corresponding to the first angle portion is greater than an area of a non-overlapped region between each angle portion among at least part of remaining angle portions and a vertex angle of the polygon corresponding to the each angle portion.

Abstract: Disclosed are a display substrate and a drive method therefor, and a display apparatus. The display substrate includes a plurality of circuit units, and at least one circuit unit includes, at least, a pixel drive circuit and a light emitting signal line. In at least one circuit unit, a pixel drive circuit includes at least a third transistor, a fifth transistor, and a sixth transistor, a second electrode of the fifth transistor is connected with a first electrode of the third transistor, and a first electrode of the sixth transistor is connected with a second electrode of the third transistor. In at least one pixel drive circuit of at least one unit row, a fifth transistor is connected with a light emitting signal line in a previous unit row, and a sixth transistor is connected with a light emitting signal line in a current unit row.

Abstract: A display substrate and a display device are provided. The display substrate includes a pixel driving circuit, the pixel driving circuit includes a first storage capacitor, a second storage capacitor, at least one shield electrode, and at least one double-gate structured transistor; the first storage capacitor at least includes a first electrode plate (71) and a third electrode plate (73), and an orthographic projection of the first electrode plate (71) on the base substrate at least partially overlaps with an orthographic projection of the third electrode plate (73) on the base substrate; the second storage capacitor at least includes a second electrode plate (72) and a fourth electrode plate (74), and an orthographic projection of the second electrode plate (72) on the base substrate at least partially overlaps with an orthographic projection of the fourth electrode plate (74) on the base substrate.

Abstract: A driving circuit includes a first output node control circuit, an output reset circuit, a second output node control circuit, an output circuit, a first energy storage circuit, a second energy storage circuit, and a driving signal output terminal; the output reset circuit controls to connect the driving signal output terminal and the first voltage line under the control of the potential of the first output node; the output circuit controls to connect the driving signal output terminal and the second voltage line under the control of the potential of the second output node; the first energy storage circuit is electrically connected to the first output node and the driving signal output terminal respectively, and the second energy storage circuit is electrically connected to the second output node and the second voltage line respectively, and the first/second energy storage circuit are configured to store electric energy.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes: a base substrate, a first active layer on a side of the base substrate, and a third conductive layer on a side of the first active layer away from the base substrate. The first active layer includes active portions spaced apart, wherein each active portion includes a sub-active portion and a via-hole connection portion connected to each other, and the sub-active portion is disposed corresponding to a transistor of two or more transistors, and configured to form a channel region of the corresponding transistor. The third conductive layer includes at least one bridge portion, wherein the at least one bridge portion is connected to via-hole connection portions in different active portions through via holes, respectively. A sheet resistance of the third conductive layer is less than a sheet resistance of the via hole connection portion.

Abstract: Disclosed are a display substrate and a manufacturing method therefor, and a display apparatus. The display substrate includes a plurality of circuit units forming a plurality of unit rows and a plurality of unit columns, at least one circuit unit includes a pixel drive circuit and a plurality of scan signal lines connected to the pixel drive circuit, the pixel drive circuit at least includes a plurality of transistors; in the direction perpendicular to the display substrate, the display substrate at least includes a first gate metal layer (GATE 1) arranged on the substrate (101) and a first source drain metal layer (SD1) arranged on a side of the first gate metal layer (GATE 1) away from the substrate (101), a gate electrode of at least one transistor is arranged in the first gate metal layer (GATE 1).

Abstract: A display substrate includes multiple circuit units, a first power supply connection line, a second power supply connection line, a first power supply line, and a second power supply line, a circuit unit includes a pixel drive circuit, the first power supply line is connected to the pixel drive circuit, and is connected to the first power supply connection line, and the second power supply line is connected to the second power supply connection line; the pixel drive circuit includes a first shielding electrode and at least one transistor with a double-gate structure, an orthographic projection of the first shielding electrode on the base substrate is at least partially overlapped with that of a node between two gate electrodes of a transistor with the double-gate structure on the base substrate; the first shielding electrode is connected to a first power supply connection line or a second power supply connection line.

Abstract: A driving circuit, a driving method, a display panel, and a display device are provided. The driving circuit includes: a strobe circuit, wherein the strobe circuit is electrically connected to the strobe control line, a data output terminal of a source driver, and a scanning line, and is configured to control, under control of a strobe control signal provided by the strobe control line, the data output terminal to be connected to or disconnected from the scanning line.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a base substrate, and a plurality of sub-pixels, a plurality of first scanning lines, a plurality of second scanning lines and a plurality of data lines arranged on the base substrate. Each sub-pixel includes a sub-pixel driving circuitry, and the sub-pixel driving circuitry includes a driving transistor, a capacitor structure, a compensation transistor and a data write-in transistor.

Abstract: A driving module, a display panel and a display device are provided. The driving module includes N driving units, N is an integer greater than 1; a first driving unit includes a first driving unit circuit, a gating unit circuit and a first output unit circuit; the gating unit circuit is configured to provide a gating control signal according to the first driving signal and a gating input signal; the first output unit circuit is configured to control whether to output the first driving signal to the pixel circuit in a current display period; an nth driving unit includes an nth driving unit circuit and an nth output unit circuit, n is an integer greater than 1 and less than or equal to N; an nth output unit circuit is configured to control whether to output the nth driving signal to the pixel circuit in the current display period according to the gating control signal.

Abstract: A display substrate including a base substrate, a bottom metal layer (10) and a gate drive circuit. The base substrate includes a display region (AA), and a peripheral region (BB) located at a periphery of the display region (AA). A bottom metal layer (10) and a gate drive circuit are located in the peripheral region (BB), and the bottom metal layer (10) is electrically connected with at least one kind of signal lines. The gate drive circuit is located on one side of the bottom metal layer (10) away from the base substrate. The gate drive circuit includes a plurality of first circuit units. An orthographic projection of the bottom metal layer (10) on the base substrate is at least partially overlapped with an orthographic projection of at least one first circuit unit on the base substrate.

Abstract: A display panel includes a pixel driving circuit including a first type transistor and a second type transistor, the display panel further includes a base substrate, a first active layer located on a side of the base substrate, a second active layer located on the side of the first active layer away from the base substrate, a first conductive layer located between the first active layer and the second active layer; at least partial structure of the first active layer is used to form a channel region of the first type transistor; at least partial structure of the second active layer is used to form the channel region of the second type transistor; partial structure of the first conductive layer is used to form the gate of the first type transistor, partial structure of the first conductive layer is used to form the bottom gate of the second type transistor.

Abstract: Disclosed is a display substrate including a display region (100) and a bonding region (200) located on a side of the display region (100). The display region (100) includes a base substrate (101) and a drive circuit layer disposed on the base substrate (101). The drive circuit layer includes a plurality of circuit units constituting a plurality of unit rows and a plurality of unit columns, a plurality of data signal lines (60), and a plurality of data connection lines (70). The data connection lines (70) include a first connection line (71) extending along a first direction and a second connection line (72) extending along a second direction. The first connection line (71) is electrically connected with the second connection line (72) and a data signal line (60) respectively. The first connection line (71) and the second connection line (72) are located in different conductive layers.

Abstract: The disclosure provides a shift register unit, a drive control circuit, a display apparatus, and a drive method. The shift register unit includes: an input circuit coupled to a first node and configured to provide a signal of an input signal terminal to the first node in response to a signal of a first clock signal terminal; a control circuit coupled to the first node, a second node, a control signal terminal, and a first reference signal terminal and configured to provide the signal of the first clock signal terminal and a signal of the first reference signal terminal to a third node and the second node, respectively, in response to a signal of the first node, where the first node is not controlled by the second node or the third node; and an output circuit coupled to the first node and the second node.

Abstract: A display substrate includes a display region. The display region includes a plurality of circuit units. A circuit unit of the circuit units includes a pixel drive circuit and a plurality of signal wires connected with the pixel drive circuit. The pixel drive circuit at least includes a storage capacitor and a shield electrode. The storage capacitor includes a first plate and a second plate. The plurality of signal wires at least include a first scan signal wire of which a body portion extends along a first direction, a data signal wire of which a body portion extends along a second direction, a first power supply line of which a body portion extends along the second direction, and an initial signal.

Abstract: A display apparatus includes a plurality of first touch channels, second touch channels, first touch traces, second touch traces, and a first touch chip and second touch chip. At least one first touch channel and second touch channel are arranged in each sub-region, and the at least one first touch channel and second touch channel are arranged crosswise and insulated from each other; first touch channels located in different sub-regions are insulated from each other, and second touch channels located in different sub-regions are insulated from each other. In any two sub-regions, first touch traces connected to first touch channels and second touch traces connected to second touch channels are connected to the first touch chip; in remaining two sub-regions except the any two sub-regions, first touch traces connected to first touch channels and second touch traces connected to second touch channels are connected to the second touch chip.