Abstract: Embodiments of contact structures of a three-dimensional memory device and fabrication method thereof are disclosed. The three-dimensional memory structure includes a film stack disposed on a substrate, wherein the film stack includes a plurality of conductive and dielectric layer pairs, each conductive and dielectric layer pair having a conductive layer and a first dielectric layer. The three-dimensional memory structure also includes a staircase structure formed in the film stack, wherein the staircase structure includes a plurality of steps, each staircase step having two or more conductive and dielectric layer pairs. The three-dimensional memory structure further includes a plurality of coaxial contact structures formed in a first insulating layer over the staircase structure, wherein each coaxial contact structure includes one or more conductive and insulating ring pairs and a conductive core, each conductive and insulating ring pair having a conductive ring and an insulating ring.

Abstract: A pixel array includes a plurality of sub-pixels, which include first to third sub-pixels. The first and third sub-pixels are alternately arranged along a row direction and form first pixel rows. The first and third sub-pixels, which are in a same column, in the first pixel rows are alternately arranged, and the second sub-pixels are arranged side by side along the row direction and form second pixel rows. Lines sequentially connecting centers of two of the first sub-pixels and two of the third sub-pixels, which are arranged in an array, together form a first virtual quadrilateral, and one of the second sub-pixels is in each first virtual quadrilateral. A straight line in the row direction or in a column direction, which passes through a center of each sub-pixel of at least one of the plurality of sub-pixels, divides the sub-pixel into two parts having areas different from each other.

Abstract: Display substrate, display device, high-precision metal mask are provided. Display substrate includes: first, second, and third sub-pixels; in first direction, first and third sub-pixels are alternately arranged to form first sub-pixel rows, second sub-pixels form second sub-pixel rows; in second direction, first and second sub-pixel rows are alternately arranged; two first and two third sub-pixels in two adjacent rows and two adjacent columns form 2*2 array; in the array, two first sub-pixels are in different rows and in different columns, so are the two third sub-pixels, connection lines of centers of two first and two third sub-pixels form virtual quadrilateral, second sub-pixel is within virtual quadrilateral; for multiple distances from centers of two first and two third sub-pixels corresponding to same virtual quadrilateral to center of second sub-pixel, at least two distances are different. Brightness centers of virtual pixels have more uniform distribution.

Abstract: Display substrate, display device, high-precision metal mask are provided. Display substrate includes: first, second, and third sub-pixels; in first direction, first and third sub-pixels are alternately arranged to form first sub-pixel rows, second sub-pixels form second sub-pixel rows; in second direction, first and second sub-pixel rows are alternately arranged; two first and two third sub-pixels in two adjacent rows and two adjacent columns form 2*2 array; in the array, two first sub-pixels are in different rows and in different columns, so are the two third sub-pixels, connection lines of centers of two first and two third sub-pixels form virtual quadrilateral, second sub-pixel is within virtual quadrilateral; for multiple distances from centers of two first and two third sub-pixels corresponding to same virtual quadrilateral to center of second sub-pixel, at least two distances are different. Brightness centers of virtual pixels have more uniform distribution.

Abstract: A pixel circuit is disposed in the display substrate, the display substrate includes a display stage and a non-display stage, the pixel circuit is configured to drive the light emitting element to emit light in the display stage, and includes a first control sub-circuit, a second control sub-circuit, a third control sub-circuit, a fourth control sub-circuit, a light emitting control sub-circuit and a driving sub-circuit; the third control sub-circuit is electrically connected with a third reset signal terminal, a control signal terminal and a third node respectively, and is configured to provide a first signal to the third node in the display stage and a second signal to the third node or acquire a signal of the third node in the non-display stage under control of the third reset signal terminal.

Abstract: A display substrate and a display apparatus are provided. The display substrate includes a base substrate, sub-pixels, a pixel defining layer having openings, spacers on the pixel defining layer. A shape of at least one of the openings is a polygon with at least one vertex angle cut off, and a corner portion of the opening includes a first corner portion formed by cutting off one vertex angle included between two sides of the polygon from the polygon. At least one of the spacers is arranged at an interval between the first corner portion and the opening adjacent to the first corner portion, and a connecting line between a geometric center of the opening where the first corner portion is located and a geometric center of the opening adjacent to the first corner portion passes through the first corner portion and the spacer.

Abstract: An authorized access list generation method including: at least one network service providing device registering for an authorized access list notification service with a server, the authorized access list including at least one authorization related record of at least one legitimate user device; the legitimate user device outputting a user ID to the server to log into the server, and directly sending an access request to a target network service provider after logging into the server, and continuing to provide an IP address being used and a device ID to the server to update a corresponding authorization related record; and the target network service providing device comparing the IP address, stored in each authorization related record of the authorized access list, with the IP address of a user device issuing an access request, and rejecting the access request if no matched result is found.

Abstract: A pixel circuit and a driving method thereof, and a display device are provided. The pixel circuit includes a driving sub-circuit, a data writing sub-circuit, a first light-emitting control sub-circuit, a second light-emitting control sub-circuit, a compensation sub-circuit, and a first reset sub-circuit, and is configured to generate a driving current to control a light-emitting element to emit light, the first reset sub-circuit comprises a first transistor, the compensation sub-circuit comprises a second transistor, the first transistor and the second transistor are both polysilicon oxide thin film transistors, and an active layer type of the first transistor and an active layer type of the second transistor are different from an active layer type of a transistor comprised in at least one selected from a group consisting of the driving sub-circuit, the data writing sub-circuit, the first light-emitting control sub-circuit, and the second light-emitting control sub-circuit.

Abstract: There is provided a pixel array including a plurality of sub-pixels, which include first sub-pixels, second sub-pixels, and third sub-pixels. The first and third sub-pixels are alternately arranged along a row direction and form a plurality of first pixel rows, the first and third sub-pixels, which are in a same column, in the plurality of first pixel rows are alternately arranged, and the second sub-pixels are arranged along the row direction and form second pixel rows. Lines sequentially connecting centers of any two of the first sub-pixels and any two of the third sub-pixels, which are arranged in an array, together form a first virtual quadrilateral, and one of the second sub-pixels is in each first virtual quadrilateral. At least one interior angle of the first virtual quadrilateral is not 90°. At least one of the first, second and third sub-pixels has a corner circularly or rectilinearly chamfered.

Abstract: Techniques are described herein for an integrated in-front database cache (“IIDC”) providing an in-memory, consistent, and automatically managed cache for primary database data. An IIDC comprises a database server instance that (a) caches data blocks from a source database managed by a second database server instance, and (b) performs recovery on the cached data using redo records for the database data. The IIDC instance implements relational algebra and is configured to run any complexity of query over the cached database data. Any cache miss results in the IIDC instance fetching the needed block(s) from a second database server instance managing the source database that provides the IIDC instance with the latest version of the requested data block(s) that is available to the second instance. Because redo records are used to continuously update the data blocks in an IIDC cache, the IIDC guarantees consistency of query results.

Abstract: A display substrate and a related device, and belongs to the field of display technology. The display substrate includes first subpixels, a second subpixels and third subpixels. In a first direction, the first subpixels and the third subpixels are arranged alternately to form a plurality of first subpixel rows, the second subpixels form a plurality of second subpixel rows, the first subpixel rows and the second subpixel rows are arranged alternately in a second direction, lines connecting centers of two first subpixels and two third subpixels in two adjacent rows and two adjacent columns form a first virtual quadrilateral, the two first subpixels are arranged at two opposite vertices of the first virtual quadrilateral, the first virtual quadrilateral includes an interior angle a not equal to 90°, and the second subpixel is arranged within the first virtual quadrilateral.

Abstract: A system may port a data model into a strict schema system, translate the data model into a transformation rule definition, fit the transformation rule definition to a transform action, receive strict schema data, perform the transform action on the strict schema data based on the transformation rule definition to form rough data, and execute filtering and enriching operations on the rough data to form loose schema data.

Abstract: A display panel includes pixel circuits, and the pixel circuit includes: a driving sub-circuit, a fourth sub-circuit and a first reset sub-circuit. The driving sub-circuit includes a driving transistor and a storage capacitor. The driving transistor includes a gate and an active pattern including a source portion and a drain portion. The storage capacitor includes a first storage electrode sharing a same electrode with the gate and a second storage electrode used to be connected to a first voltage signal line. The fourth sub-circuit is configured such that the drain portion and the gate are connected when being turned on. The first reset sub-circuit includes a first active pattern, which is arranged in a same layer as the active pattern and includes a first source portion being used to be connected to a first initialization signal line and a first drain portion being connected to the drain portion.

Abstract: In Secure-Asynchronous Signing, when a record is inserted into a collection of records by a user, the user specifies a registered digital certificate to associate with the record. The digital certificate was previously registered by the user. To subsequently sign a record, the user provides a digital signature. The digital signature is validated using data in the record and a public key of the digital certificate that was associated with the row. Invalid digital signatures are detected and rejected regardless of how long afterward the attempt to sign the row occurs after inserting the row.

Abstract: A metal capacitor provided includes a first metal layer and a second metal layer disposed above a substrate. The first metal layer includes a first electrode sheet and a second electrode sheet, and the second metal layer includes a third electrode sheet and a fourth electrode sheet. The first electrode sheet and the second electrode sheet collectively form a first coplanar capacitor. The third electrode sheet and the fourth electrode sheet collectively form a second coplanar capacitor. At least a portion of the fourth electrode sheet is arranged above the first electrode sheet, and the first electrode sheet and the fourth electrode sheet collectively form a first vertical capacitor. At least a portion of the third electrode sheet is arranged above the second electrode sheet, and the second electrode sheet and the third electrode sheet collectively form a second vertical capacitor.

Abstract: A three dimensional scanning apparatus is used to detect a contour of an object, and includes an illumination light source, a first elliptic opening portion, a reference pattern generator, a second elliptic opening portion and an optical receiver. The illumination light source emits an illumination beam. The reference pattern generator provides a reference pattern by projection of the illumination beam, and transmits the reference pattern toward the object via the first elliptic opening portion. The optical receiver receives a detection pattern reflected from the object via the second elliptic opening portion, so as to analyze a difference between the reference pattern and the detection pattern for acquiring the contour.

Abstract: A pixel circuit includes: a driving sub-circuit including a driving transistor and a storage capacitor; a first reset sub-circuit configured to transmit an initialization signal to a third node under control of at least a first reset signal; a writing sub-circuit configured to transmit the initialization signal to a first node under control of a first scanning signal, and write a data signal received at a data terminal to the first node and perform threshold voltage compensation on the driving transistor under control of the first scanning signal and a second scanning signal; a light-emitting device; and a light-emitting control sub-circuit configured to, under control of a first enable signal and a second enable signal, transmit a voltage signal of a first voltage terminal to a second node, and transmit a current output by the driving transistor to the light-emitting device.