Patents by Inventor Ming-Hung Han

Ming-Hung Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210327765
    Abstract: A semiconductor device includes a substrate having a first region and a second region, a first transistor in the first region, a second transistor in the first region, and a third transistor in the second region. The first transistor includes a first channel layer and a first gate dielectric layer on the first channel layer. The second transistor includes a second channel layer and a second gate dielectric layer on the second channel layer. The second gate dielectric layer is thicker than the first gate dielectric layer. The third transistor includes a third channel layer and a third gate dielectric layer on the third channel layer. The third gate dielectric layer is thicker than the second gate dielectric layer.
    Type: Application
    Filed: June 30, 2021
    Publication date: October 21, 2021
    Inventors: Pei-Hsun Wu, Ming-Hung Han, Po-Nien Chen, Chih-Yung Lin
  • Patent number: 11056396
    Abstract: A semiconductor device includes a substrate; an I/O device over the substrate; and a core device over the substrate. The I/O device includes a first gate structure having an interfacial layer; a first high-k dielectric stack over the interfacial layer; and a conductive layer over and in physical contact with the first high-k dielectric stack. The core device includes a second gate structure having the interfacial layer; a second high-k dielectric stack over the interfacial layer; and the conductive layer over and in physical contact with the second high-k dielectric stack. The first high-k dielectric stack includes the second high-k dielectric stack and a third dielectric layer.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: July 6, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Hsun Wu, Ming-Hung Han, Po-Nien Chen, Chih-Yung Lin
  • Publication number: 20210202323
    Abstract: A semiconductor device includes a substrate; an I/O device over the substrate; and a core device over the substrate. The I/O device includes a first gate structure having an interfacial layer; a first high-k dielectric stack over the interfacial layer; and a conductive layer over and in physical contact with the first high-k dielectric stack. The core device includes a second gate structure having the interfacial layer; a second high-k dielectric stack over the interfacial layer; and the conductive layer over and in physical contact with the second high-k dielectric stack. The first high-k dielectric stack includes the second high-k dielectric stack and a third dielectric layer.
    Type: Application
    Filed: December 27, 2019
    Publication date: July 1, 2021
    Inventors: Pei-Hsun Wu, Ming-Hung Han, Po-Nien Chen, Chih-Yung Lin
  • Patent number: 9287361
    Abstract: A junction-less transistor having an reverse polarity structure includes a substrate, a semiconductor body, a gate and a gate insulation layer. The substrate has a first polarity. The semiconductor body is disposed on the substrate, and includes a drain, a source and a channel section connected between the drain and the source. The gate covers one side of the channel section away from the substrate. The semiconductor body has a second polarity opposite to the first polarity. With the semiconductor body and the substrate respectively having the opposite second polarity and first polarity, a leakage current can be reduced while also lowering element production costs.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: March 15, 2016
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Yung-Chun Wu, Ming-Hung Han, Hung-Bin Chen
  • Publication number: 20140291739
    Abstract: A junction-less transistor having an reverse polarity structure includes a substrate, a semiconductor body, a gate and a gate insulation layer. The substrate has a first polarity. The semiconductor body is disposed on the substrate, and includes a drain, a source and a channel section connected between the drain and the source. The gate covers one side of the channel section away from the substrate. The semiconductor body has a second polarity opposite to the first polarity. With the semiconductor body and the substrate respectively having the opposite second polarity and first polarity, a leakage current can be reduced while also lowering element production costs.
    Type: Application
    Filed: January 2, 2014
    Publication date: October 2, 2014
    Applicant: National Tsing Hua Univesity
    Inventors: Yung-Chun Wu, Ming-Hung Han, Hung-Bin Chen