Abstract: Methods, systems, and devices for top die back-side marking for memory systems are described. One or more alignment marks may be added to the back-side of a top memory die in a multi-layer memory device and used to align a position of the top memory die relative to a position of a memory die below the top memory die. The alignment marks may be formed on the top memory die during the manufacturing process of the multi-layer memory device. Operations for forming the alignment marks are described using various semiconductor fabrication techniques. Operations are also disclosed for using the alignment marks to modify placement of the top memory die to reduce the alignment offset in the manufacturing process of subsequent memory dies.

Abstract: A card reader with a protective mechanism includes an upper shell, a lower shell, a protective mechanism and a circuit board assembly. An upper portion of a front end of the upper shell slantwise extends downward and rearward, and then is bent rearward to form an upper extending portion. A lower portion of the front end of the upper shell extends rearward to form a lower extending portion. The upper extending portion is spaced from the lower extending portion to form an inserting passageway between the upper extending portion and the lower extending portion. The lower shell is mounted to a bottom surface of the upper shell. The protective mechanism is disposed between the upper shell and the lower shell. The circuit board assembly is disposed between the upper shell and the lower shell.

Abstract: The present disclosure relates to the technical field of medicaments. Particularly, the present disclosure provides a pharmaceutical combination/composition comprising a phosphodiesterase type 5 (PDE5) inhibitor, arginine, and N-acetylcysteine and its applications in treating cardiovascular diseases and erectile dysfunction.

Abstract: In a method of manufacturing a semiconductor device, in an EUV scanner, an EUV lithography operation using an EUV mask is performed on a photo resist layer formed over a semiconductor substrate. After the EUV lithography operation, the EUV mask is unloaded from a mask stage of the EUV scanner. The EUV mask is placed under a reduced pressure below an atmospheric pressure. The EUV mask is heated under the reduced pressure at a first temperature in a range from 100° C. to 350 C°. After the heating, the EUV mask is stored in a mask stocker.

Abstract: The present disclosure provides a redistribution structure that includes a metal line, a first dielectric layer disposed over the metal line, a first etch stop layer (ESL) disposed over the first dielectric layer, a second dielectric layer disposed over the first ESL, and a conductive via extending through the second dielectric layer, the first ESL and the first dielectric layer to contact the metal line. A lower portion of the second dielectric layer extends downward through the first ESL and the first dielectric layer and partially into the metal line.

Abstract: A package component includes an insulating substrate, a semiconductor structure, a first conductive line and a conductive pad. The semiconductor structure is disposed in the insulating substrate and separated from the insulating substrate. The first conductive line is disposed on a first side of the insulating substrate. The conductive pad is disposed on a first side of the semiconductor structure. The first conductive line and the conductive pad include a same material. A surface roughness of the conductive pad is greater than a surface roughness of the first conductive line.

Abstract: The present disclosure is directed to genome editing systems, reagents and methods for immunooncology.

Abstract: A card reader with a protective mechanism includes an upper shell, a lower shell, a protective mechanism and a circuit board assembly. An upper portion of a front end of the upper shell slantwise extends downward and rearward, and then is bent rearward to form an upper extending portion. A lower portion of the front end of the upper shell extends rearward to form a lower extending portion. The upper extending portion is spaced from the lower extending portion to form an inserting passageway between the upper extending portion and the lower extending portion. The lower shell is mounted to a bottom surface of the upper shell. The protective mechanism is disposed between the upper shell and the lower shell. The circuit board assembly is disposed between the upper shell and the lower shell.

Abstract: A card reader with a protective mechanism includes an upper shell, a lower shell disposed to a bottom surface of the upper shell, a protective mechanism and a circuit board assembly disposed between the upper shell and the lower shell. The protective mechanism includes a front cover, a rear cover covered to a rear of the front cover, two rollers disposed along an up-down direction, two springs, two supporting structures and a plurality of sealing structures. The two springs elastically abut between an inner surface of a top wall of the front cover and one roller along a vertical direction. The two supporting structures are mounted around two opposite sides of the one roller, and two opposite sides of the other roller. The plurality of the sealing structures are disposed at two outer surfaces of the two supporting structures.

Abstract: A method of manufacturing a semiconductor structure is provided. A substrate including a first silicon carbide layer and a second silicon carbide layer under the first silicon carbide layer is formed. The substrate includes a unit region and a termination region surrounding the unit region. A first guard ring structure is formed in the termination region and the first silicon carbide layer, adjoining a top surface of the first silicon carbide layer. A second guard ring structure is formed in the termination region and the second silicon carbide layer. Second guard ring well regions of the second guard ring structure correspond one-on-one to first guard ring well regions of the first guard ring structure. Each of the second guard ring well regions overlaps with a corresponding one of the first guard ring well regions in a vertical direction perpendicular to the top surface of the substrate.

Abstract: A waterproof structure of a socket connector includes a waterproof housing, a socket, a cable, and a waterproof plug. The waterproof housing includes a wiring opening. The inner surface of the waterproof housing incudes a ring step surface facing the wiring opening. The wiring opening is covered by an end cap. The socket is received in the waterproof housing. The cable is connected to the socket and passes the wiring opening. The waterproof plug wrapping the cable is arranged in the wiring opening to close the wiring opening. The waterproof plug has an inner and an outer end, the inner end faces the socket, and a longitudinal annular rib is arranged on the inner end. The end cover is fastened to the waterproof housing along the longitudinal direction of the waterproof plug to press the outer end to make the longitudinal ring rib press the ring step surface.

Abstract: Various methods for manufacturing semiconductor structures are provided. An embodiment method includes forming a first patterned hard mask and epitaxial layer on a semiconductor substrate, and forming a first doped region in the epitaxial layer by performing a first implantation through the first patterned hard mask. A second doped region is formed in the epitaxial layer by performing a second implantation through the first patterned hard mask, with the first doped region at least partially overlapping the second doped region. A second patterned hard mask is formed, which surrounds the first patterned hard mask and covers at least a portion of the first doped region. A third doped region is formed in the epitaxial layer by performing a third implantation through the first patterned hard mask and the second patterned hard mask.

Abstract: A system for classifying touch data is provided. The system comprises: a plurality of sensing elements; and a processing system. The processing system is configured to: receive touch data from a current user via the plurality of sensing elements; determine a first set of classifier parameters corresponding to a current user based on usage data, wherein the usage data comprises the touch data from the current user, and apply the first set of classifier parameters to classify subsequent touch data.

Abstract: The present disclosure discloses an SoC chip distributed simulation and verification platform and a method, and the present disclosure relates to the field of chip verification technologies. The distributed simulation and verification platform includes component modules of an SoC chip; each module has its own verification platform, and each verification platform separately runs in a different simulation process; and virtual connections between the modules are implemented through respective verification platforms, to implement system function simulation and verification. In the present disclosure, a virtual connection technology is used to connect Testbench test platforms of the modules or IPs, to implement virtual integration of the modules or IPs, thereby completing distributed simulation and verification of a system function of the SoC chip.

Abstract: An example method includes providing, to a sequence model (i) a plurality of few-shot prompts, wherein each prompt comprises a demonstration passage, a demonstration task, and a demonstration query, wherein the demonstration task describes a type of retrieval, and wherein the demonstration query is relevant to the demonstration task, and (ii) a plurality of passages sampled from a corpus of passages. The method also includes receiving, from the sequence model and for the plurality of passages and based on the plurality of few-shot prompts, a respective plurality of predicted task-query pairs, the sequence model having been prompted to predict a task based on an input passage, and predict an output query relevant to the predicted task. The method further includes generating a synthetic training dataset comprising the plurality of passages and the respective plurality of predicted task-query pairs. The method also includes providing the synthetic training dataset.

Abstract: An antenna structure and an electronic device are provided. The antenna structure is disposed on a carrier of the electronic device and includes a first dipole radiating element perpendicular to a plane, a second dipole radiating element connected to the first dipole radiating element, and a third dipole radiating element connected to the first dipole radiating element and the second dipole radiating element. The first dipole radiating element is configured to generate a first radiation pattern, the second dipole radiating element is configured to generate a second radiation pattern, and the third radiating element is configured to generate a third radiation pattern. The first radiation pattern is omnidirectional radiation on the plane. A polarization direction of the second radiation pattern and a polarization direction of the third radiation pattern are respectively orthogonal to a polarization direction of the first radiation pattern.

Abstract: A semiconductor structure includes a silicon carbide layer, which has a unit region and a termination region surrounding the unit region. A first guard ring structure is located in the termination region of the silicon carbide layer, and adjoins a top surface of the silicon carbide layer. The first guard ring structure may include at least one first guard ring well region. A second guard ring structure is located in the silicon carbide layer and below the first guard ring structure. The second guard ring structure may include at least one second guard ring well region, which corresponds to the at least one first guard ring well region in a vertical direction. A method for manufacturing the semiconductor structure is also provided.

Abstract: Disclosed herein are recombinant polypeptides and recombinant nucleic acids encoding the same. According to some embodiments of the present disclosure, the recombinant polypeptide comprises a first bi-functional domain, and a first single-chain fragment variable (scFv) or a peptide linked to the N-terminus of the first bi-functional domain. Optionally, the recombinant polypeptide further comprises a second scFv linked to the N-terminus of the first scFv or peptide. Also disclosed herein are methods of treating cancers by using the immune cells expressing the recombinant polypeptides.

Abstract: The present invention provides an information security incident diagnosis system for assisting in detecting whether a target network system has been hacked. First, a plurality of activities records of one or more computing devices in a target network system are collected. Then, a discrete space metric tree is generated according to the plurality of activities records, and a clustering operation is performed on the discrete space metric tree to generate one or more event clusters associated with one or more suspicious event categories. Each event cluster may form a guide tree corresponding to the event cluster through single linkage clustering analysis to indicate a merging order from high to low similarity. The merging order is used for recursively performing a graph generating operation to convert a plurality of activities records corresponding to the one or more event clusters into a hierarchical directed acyclic graph (HDAG).