Patents by Inventor Ming-Wei Tsai
Ming-Wei Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240100352Abstract: A phototherapy device includes a base, at least one light conversion device and a light source module. The base has an installation slot. The light conversion device is detachably arranged in the installation slot. Each light conversion device includes a plurality of light conversion patterns. The light source module is arranged on a side of the base and configured to provide an excitation beam to the light conversion patterns, so that each of the light conversion patterns emits a converted beam. In this way, the light conversion device of the phototherapy device can be replaced according to the user's needs.Type: ApplicationFiled: September 19, 2023Publication date: March 28, 2024Inventors: CHUNG-JEN OU, YU-MIN CHEN, MING-WEI TSAI, CHIEN-CHIH CHEN
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Publication number: 20230369299Abstract: A display device including a light source module and a wavelength conversion module is provided. The light source module includes a substrate, a plurality of first LED elements and a second LED element. The first LED elements are configured for providing a plurality of first color lights, and the second LED element is configured for providing a second color light. The wavelength conversion module is overlapped and arranged on the light source module, and the wavelength conversion module includes a wavelength conversion element and at least one dichroic filter layer. The wavelength conversion element is configured to absorb the first color lights emitted by a part of the first LED elements and excite a converted light beam, wherein a color of the converted light beam is different from that of the first color lights and the second color light.Type: ApplicationFiled: May 2, 2023Publication date: November 16, 2023Applicant: Coretronic CorporationInventors: Chien-Chih Chen, Ming-Wei Tsai, Chung-Jen Ou, Yu-Min Chen
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Publication number: 20230369546Abstract: A light source device and a manufacturing method of the light source device is provided. The light source device includes a micro light-emitting element layer, a transparent substrate and a wavelength conversion module. The wavelength conversion module includes a first wavelength conversion layer, a second wavelength conversion layer, a light transmission layer, multiple barrier structures, multiple reflection layers and a light cut-off layer. The first wavelength conversion layer, the second wavelength conversion layer, and the light transmission layer are arranged in an arrangement direction. Any two of the first wavelength conversion layer, the second wavelength conversion layer, and the light transmission layer are separated from each other by one of the barrier structures. The reflection layers are located between the barrier structures and any one of a sidewall of the first wavelength conversion layer, a sidewall of the second wavelength conversion layer, and a sidewall of the light transmission layer.Type: ApplicationFiled: May 11, 2023Publication date: November 16, 2023Applicant: Coretronic CorporationInventors: Chien-Chih Chen, Ming-Wei Tsai, Chung-Jen Ou, Yu-Min Chen
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Patent number: 11757005Abstract: The present disclosure, in some embodiments, relates to a semiconductor device. The semiconductor device includes an electron supply layer that is disposed over an upper surface of a semiconductor material and that is laterally arranged between a first conductive terminal and a second conductive terminal. A III-N (III-nitride) semiconductor material is disposed over the electron supply layer. A passivation layer is disposed over the III-N semiconductor material, along a side of the III-N semiconductor material, and over the electron supply layer. An insulating material is arranged over the passivation layer and along opposing sidewalls of the second conductive terminal, and a gate structure is disposed over the passivation layer. The passivation layer has an uppermost surface that is directly coupled to a sidewall of the passivation layer. The insulating material extends along the sidewall of the passivation layer.Type: GrantFiled: May 19, 2021Date of Patent: September 12, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: King-Yuen Wong, Ming-Wei Tsai, Han-Chin Chiu
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Publication number: 20220236465Abstract: A wavelength conversion module including an isolation structure layer, multiple wavelength conversion patterns, a dichroic filter film, and at least one dichroic filter layer is provided. The isolation structure layer has multiple openings. The wavelength conversion patterns are disposed in a part of the openings, and configured to absorb a first part of multiple excitation light beams be excited to generate multiple converted light beams. The dichroic filter film is disposed on one side of the isolation structure layer. The at least one dichroic filter layer is disposed on another side of the isolation structure layer or disposed in the openings. A part of the converted light beams are reflected to the wavelength conversion patterns by the dichroic filter film. A second part of the excitation light beams passing through the wavelength conversion patterns are reflected to the wavelength conversion patterns by the at least one dichroic filter layer.Type: ApplicationFiled: January 25, 2022Publication date: July 28, 2022Applicant: Coretronic CorporationInventors: Ming-Wei Tsai, Yu-An Huang, Fu-Ming Chuang
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Publication number: 20210273059Abstract: The present disclosure, in some embodiments, relates to a semiconductor device. The semiconductor device includes an electron supply layer that is disposed over an upper surface of a semiconductor material and that is laterally arranged between a first conductive terminal and a second conductive terminal. A III-N(III-nitride) semiconductor material is disposed over the electron supply layer. A passivation layer is disposed over the III-N semiconductor material, along a side of the III-N semiconductor material, and over the electron supply layer. An insulating material is arranged over the passivation layer and along opposing sidewalls of the second conductive terminal, and a gate structure is disposed over the passivation layer. The passivation layer has an uppermost surface that is directly coupled to a sidewall of the passivation layer. The insulating material extends along the sidewall of the passivation layer.Type: ApplicationFiled: May 19, 2021Publication date: September 2, 2021Inventors: King-Yuen Wong, Ming-Wei Tsai, Han-Chin Chiu
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Patent number: 11038025Abstract: The present disclosure, in some embodiments, relates to a method of forming a transistor device. The method may be performed by forming an anode and a cathode over an electron supply layer disposed on a semiconductor material. A doped III-N semiconductor material is formed over the electron supply layer, and an insulating material is formed over the electron supply layer and the doped III-N semiconductor material. The insulating material continuously extends from over the anode to over the cathode. The insulating material is patterned to form sidewalls of the insulating material that define an opening over the doped III-N semiconductor material. A gate structure is formed directly between the sidewalls of the insulating material and over the doped III-N semiconductor material.Type: GrantFiled: September 6, 2019Date of Patent: June 15, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: King-Yuen Wong, Ming-Wei Tsai, Han-Chin Chiu
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Patent number: 11011380Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformably over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.Type: GrantFiled: August 20, 2018Date of Patent: May 18, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Ming-Wei Tsai, King-Yuen Wong, Chih-Wen Hsiung, Ming-Cheng Lin
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Patent number: 10991803Abstract: The present disclosure, in some embodiments relates to a semiconductor device. The semiconductor device includes a layer of semiconductor material disposed over a substrate and an electron supply layer disposed over the layer of semiconductor material between an anode terminal and a cathode terminal. A layer of III-N (III-nitride) semiconductor material is disposed over the electron supply layer. A passivation layer contacts an upper surface of the electron supply layer and further contacts an upper surface and a sidewall of the layer of III-N semiconductor material. A gate structure is separated from the layer of III-N semiconductor material by the passivation layer.Type: GrantFiled: April 23, 2018Date of Patent: April 27, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: King-Yuen Wong, Ming-Wei Tsai, Han-Chin Chiu
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Patent number: 10811261Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.Type: GrantFiled: June 8, 2018Date of Patent: October 20, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Ming-Wei Tsai, King-Yuen Wong, Chih-Wen Hsiung, Ming-Cheng Lin
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Publication number: 20190393313Abstract: The present disclosure, in some embodiments, relates to a method of forming a transistor device. The method may be performed by forming an anode and a cathode over an electron supply layer disposed on a semiconductor material. A doped III-N semiconductor material is formed over the electron supply layer, and an insulating material is formed over the electron supply layer and the doped III-N semiconductor material. The insulating material continuously extends from over the anode to over the cathode. The insulating material is patterned to form sidewalls of the insulating material that define an opening over the doped III-N semiconductor material. A gate structure is formed directly between the sidewalls of the insulating material and over the doped III-N semiconductor material.Type: ApplicationFiled: September 6, 2019Publication date: December 26, 2019Inventors: King-Yuen Wong, Ming-Wei Tsai, Han-Chin Chiu
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Publication number: 20190006498Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformably over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.Type: ApplicationFiled: August 20, 2018Publication date: January 3, 2019Inventors: MING-WEI TSAI, KING-YUEN WONG, CHIH-WEN HSIUNG, MING-CHENG LIN
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Publication number: 20180294347Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.Type: ApplicationFiled: June 8, 2018Publication date: October 11, 2018Inventors: MING-WEI TSAI, KING-YUEN WONG, CHIH-WEN HSIUNG, MING-CHENG LIN
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Publication number: 20180248009Abstract: The present disclosure, in some embodiments relates to a semiconductor device. The semiconductor device includes a layer of semiconductor material disposed over a substrate and an electron supply layer disposed over the layer of semiconductor material between an anode terminal and a cathode terminal. A layer of III-N (III-nitride) semiconductor material is disposed over the electron supply layer. A passivation layer contacts an upper surface of the electron supply layer and further contacts an upper surface and a sidewall of the layer of III-N semiconductor material. A gate structure is separated from the layer of III-N semiconductor material by the passivation layer.Type: ApplicationFiled: April 23, 2018Publication date: August 30, 2018Inventors: King-Yuen Wong, Ming-Wei Tsai, Han-Chin Chiu
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Patent number: 10056478Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.Type: GrantFiled: November 6, 2015Date of Patent: August 21, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Ming-Wei Tsai, King-Yuen Wong, Chih-Wen Hsiung, Ming-Cheng Lin
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Patent number: 10002955Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.Type: GrantFiled: April 6, 2017Date of Patent: June 19, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Ming-Wei Tsai, King-Yuen Wong, Chih-Wen Hsiung, Ming-Cheng Lin
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Patent number: 9978844Abstract: The present disclosure relates to a high electron mobility transistor compatible power lateral field-effect rectifier (L-FER) device. In some embodiments, the rectifier device has an electron supply layer located over a layer of semiconductor material at a position between an anode terminal and a cathode terminal. A layer of doped III-N semiconductor material is disposed over the electron supply layer. A passivation layer is located over the electron supply layer and the layer of doped III-N semiconductor material. A gate structure is disposed over the layer of doped III-N semiconductor material and the passivation layer. The layer of doped III-N semiconductor material modulates the threshold voltage of the rectifier device, while the passivation layer improves reliability of the L-FER device by mitigating current degradation due to high-temperature reverse bias (HTRB) stress.Type: GrantFiled: December 26, 2014Date of Patent: May 22, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: King-Yuen Wong, Ming-Wei Tsai, Han-Chin Chiu
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Publication number: 20170213903Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.Type: ApplicationFiled: April 6, 2017Publication date: July 27, 2017Inventors: MING-WEI TSAI, KING-YUEN WONG, CHIH-WEN HSIUNG, MING-CHENG LIN
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Patent number: 9649247Abstract: A breast massage device includes a main body; a drive unit installed within the main body; and a massage disk mounted on the main body and coupled with the drive unit so as to be driven rotatably thereby. The massage disk has a central axis, a concave surface for covering a breast, and a periphery confining the concave surface, wherein the periphery has a highest point and a lowest point located at two opposite sides of the central axis such that a portion of the concave surface extending from the highest point toward the central axis is longer in curved distance than another portion of the concave surface extending from the lowest point to the central axis. A plurality of massage elements are mounted rotatably on the concave surface such that the massage elements are rotatable relative to the concave surface when the drive unit is activated.Type: GrantFiled: August 28, 2014Date of Patent: May 16, 2017Inventor: Ming-Wei Tsai
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Publication number: 20170133496Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.Type: ApplicationFiled: November 6, 2015Publication date: May 11, 2017Inventors: MING-WEI TSAI, KING-YUEN WONG, CHIH-WEN HSIUNG, MING-CHENG LIN