Abstract: A semiconductor device includes a first transistor, a first via contact, a second transistor and a second via contact. The first transistor includes a channel and a gate electrode. The first via contact is disposed on the gate electrode of the first transistor, and corresponds in position to the channel of the first transistor. The second transistor includes a channel and a gate electrode. The second via contact is disposed on the gate electrode of the second transistor, and corresponds in position to the channel of the second transistor. A distance between the second via contact and the channel of the second transistor is smaller than a distance between the first via contact and the channel of the first transistor.

Abstract: A semiconductor device and a manufacturing method of the semiconductor device are provided. The semiconductor device includes a source region, a drain region, a channel region and a plurality of fins. The channel region is located between the source region and the drain region, and the fins pass through the source region, the drain region and the channel region, wherein a number of the fins located in the source region and the drain region and a number of the fins located in the channel region are not equal.

Abstract: An impedance calibration circuit includes a variable impedance circuit, a detection circuit and a control circuit. The variable impedance circuit includes conduction paths connected in parallel between an output terminal and a supply terminal coupled to a first supply voltage. The variable impedance circuit is configured to adjust an impedance at the output terminal by enabling one or more of the conduction paths according to a calibration code. The detection circuit is configured to detect a change in impedance of the conduction paths by applying a second supply voltage to a reference terminal through a detection path, and accordingly generate an input voltage at the reference terminal. An electric potential of the second supply voltage is equal to an electric potential of the first supply voltage. The control circuit is configured to compare the input voltage with reference voltages to generate the calibration code.

Abstract: The present invention provides a control method of an electronic device, wherein the control method includes the steps of: using a first beacon setting to transmit beacons; if a wireless communication state of the electronic device satisfies a condition, using a second beacon setting to transmit beacons; wherein the first beacon setting and the second beacon setting have different beacon periods or different payload sizes.

Abstract: Various techniques pertaining to a special dual clear-to-send (CTS) mode for improvement in collision avoidance in wireless communications are described. A first station (STA) transmits a request-to-send (RTS) and, in response, receives a first CTS from a second STA. The first STA waits to receive a second CTS from the second STA before transmitting data to the second STA responsive to the first CTS being of a first type and the second CTS being of a second type different from the first type. The first STA then transmits the data to the second STA upon passage of a waiting period.

Abstract: A process for making an interconnect of a group III-V semiconductor device includes the steps of applying a positive photoresist layer and an image-reversible photoresist layer, subjecting the image-reversible photoresist and positive photoresist layers to patternwise exposure, subjecting the image-reversible photoresist layer to image reversal bake, subjecting the image-reversible photoresist and positive photoresist layers to flood exposure, subjecting the image-reversible photoresist and positive photoresist layers to development, depositing a diffusion barrier layer, depositing a copper layer, and removing the image-reversible photoresist and positive photoresist layers.

Abstract: A process for making an interconnect of a group III-V semiconductor device includes the steps of applying a positive photoresist layer and an image-reversible photoresist layer, subjecting the image-reversible photoresist and positive photoresist layers to patternwise exposure, subjecting the image-reversible photoresist layer to image reversal bake, subjecting the image-reversible photoresist and positive photoresist layers to flood exposure, subjecting the image-reversible photoresist and positive photoresist layers to development, depositing a diffusion barrier layer, depositing a copper layer, and removing the image-reversible photoresist and positive photoresist layers.

Abstract: A level shifter includes a latch circuit, an input stage, a driver stage and a control circuit. The latch circuit is configured to generate an output signal according to a signal level at a first drive node and a signal level at a second drive node. The input stage is configured to receive an input signal to adjust a signal level at a connection node. The driver stage is configured to drive the first drive node by coupling the connection node to the first drive node according to a set of control signals. The control circuit is coupled to the input stage and the driver stage. The control circuit is configured to control the driver stage to couple the connection node to the first drive node by adjusting a signal level of each control signal in the set of control signals during a level transition of the input signal.

Abstract: The present disclosure relates to an installation assembly configured to mount an extension module on a supporting frame. The installation assembly includes a main body, a supporting mechanism, and an upper engaging component. The supporting mechanism is disposed on a rear side of the main body away from the supporting frame and configured to mount the extension module. The upper engaging component is connected to a top portion of the main body and configured to engage with a top portion of the supporting frame. In such a way, the extension module can be mounted on the supporting frame easily by the installation assembly of the present disclosure. The present disclosure can effectively simplify assembly and disassembly processes and save time of assembly and disassembly.

Abstract: A thin film includes a substrate, a bottom gate, a channel layer, a source and a drain, and a top gate. The bottom gate is disposed on the substrate. The channel layer is disposed on the bottom gate. The source and the drain are disposed on two different sides of the channel layer. The top gate is disposed on the channel layer, wherein the channel layer is disposed between the bottom gate and the top gate, and the bottom gate and the top gate are electrically isolated from each other. A related method is also provided.

Abstract: A thin film includes a substrate, a bottom gate, a channel layer, a source and a drain, and a top gate. The bottom gate is disposed on the substrate. The channel layer is disposed on the bottom gate. The source and the drain are disposed on two different sides of the channel layer. The top gate is disposed on the channel layer, wherein the channel layer is disposed between the bottom gate and the top gate, and the bottom gate and the top gate are electrically isolated from each other. A related method is also provided.

Abstract: A light sensing circuit for solving the problem of low reliability in illumination detection includes a photo transistor having a gate, a drain and a source; a first transistor electrically connecting between the gate and source of the photo transistor; a first capacitor electrically connecting between the gate and the drain of the photo transistor; a second transistor electrically connecting with the drain of the photo transistor, the first capacitor, and a data signal; a second capacitor electrically connecting between the source of the photo transistor and a ground contact; a third transistor electrically connecting with the photo transistor, the first transistor, and the second capacitor; and a switch adapted to alternatively connect the third transistor with a buffer or a zero signal. A control method of the above light sensing circuit is also disclosed. Therefore, the above identified problem can be surely solved.

Abstract: A thin-film transistor and a manufacturing method thereof are characterized in that: the active layer is a group IV-VI compound semiconductor film; the group IV-VI compound is one of geranium sulfide (GeS), germanium selenide (GeSe), germanium telluride (GeTe), tin selenide (SnSe), and tin telluride (SnTe) or a ternary, quaternary, or quinary compound thereof; the active layer is deposited by sputtering; and thermal annealing is performed after the active layer is deposited. The thin-film transistor has high carrier mobility and a high current on/off ratio and therefore meets the needs of high-resolution display development.

Abstract: A light sensing circuit for solving the problem of low reliability in illumination detection includes a photo transistor having a gate, a drain and a source; a first transistor electrically connecting between the gate and source of the photo transistor; a first capacitor electrically connecting between the gate and the drain of the photo transistor; a second transistor electrically connecting with the drain of the photo transistor, the first capacitor, and a data signal; a second capacitor electrically connecting between the source of the photo transistor and a ground contact; a third transistor electrically connecting with the photo transistor, the first transistor, and the second capacitor; and a switch adapted to alternatively connect the third transistor with a buffer or a zero signal. A control method of the above light sensing circuit is also disclosed. Therefore, the above identified problem can be surely solved.

Abstract: A method for producing a thin film transistor includes forming a transistor prototype on a substrate. The transistor prototype includes two transparent electrodes adapted to form a source and a drain of a thin film transistor. Next, the two transparent electrodes of the transistor prototype are exposed in an environment full of a plasma. The plasma conducts a surface treatment on the two transparent electrodes of the transistor prototype to form the thin film transistor. The method can solve the problem of excessive contact resistance of the transparent conductive films of conventional thin film transistors.

Abstract: A method for producing a thin film transistor includes forming a transistor prototype on a substrate. The transistor prototype includes two transparent electrodes adapted to form a source and a drain of a thin film transistor. Next, the two transparent electrodes of the transistor prototype are exposed in an environment full of a plasma. The plasma conducts a surface treatment on the two transparent electrodes of the transistor prototype to form the thin film transistor. The method can solve the problem of excessive contact resistance of the transparent conductive films of conventional thin film transistors.

Abstract: A method for producing a thin film transistor includes forming a transistor prototype on a substrate, with the transistor prototype including a face having a to-be-treated portion. The to-be-treated portion of the transistor prototype is exposed in an environment full of a supercritical fluid. The supercritical fluid conducts a surface treatment on the to-be-treated portion of the transistor prototype to form a thin film transistor. The method can solve the problem of too many defects of the thin film transistor resulting from a low-temperature process.

Abstract: A display panel and an active device thereof are provided. The active device includes a gate, a semiconductor layer, a first source and a plurality of first drains. The first source includes a first side and a second side opposite to each other, the first side has a plurality of first recesses, and the second side has a plurality of second recesses. Each of the first recesses and a corresponding second recess are disposed opposite to each other to constitute a recess-pair. A minimum distance between the first recess and the second recess of each recess-pair is A, a minimum distance between two neighboring recess-pairs is B, wherein A is greater than B. The first drains are electrically connected to each other, and each of the first drains is respectively disposed in one of the recesses of the first source.

Abstract: A thin film transistor is disclosed in the present invention, including a substrate, a gate, an insulating layer, a source, a drain and an active layer. The gate is arranged on the substrate. The insulating layer is arranged on the gate. The source and the drain are arranged on the insulating layer. The active layer is arranged between the source and the drain, and is formed by a bottom layer, an intermediate layer and a top layer stacked together on the insulating layer. The conductivity of the intermediate layer is higher than that of the bottom layer, and the conductivity of the bottom layer is higher than that of the top layer. As such, the disadvantage of low carrier mobility as commonly seen in the conventional thin film transistor is overcome.

Abstract: A display panel and an active device thereof are provided. The active device includes a gate, a semiconductor layer, a first source and a plurality of first drains. The first source includes a first side and a second side opposite to each other, the first side has a plurality of first recesses, and the second side has a plurality of second recesses. Each of the first recesses and a corresponding second recess are disposed opposite to each other to constitute a recess-pair. A minimum distance between the first recess and the second recess of each recess-pair is A, a minimum distance between two neighboring recess-pairs is B, wherein A is greater than B. The first drains are electrically connected to each other, and each of the first drains is respectively disposed in one of the recesses of the first source.