Patents by Inventor Ming-Yen Tsai
Ming-Yen Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240142833Abstract: An electronic device includes a substrate, a driving element, a first insulating layer, a pixel electrode layer, and a common electrode layer. The driving element is disposed on the substrate. The first insulating layer is disposed on the driving element. The pixel electrode layer is disposed on the first insulating layer. The first insulating layer comprises a hole, and the pixel electrode layer is electrically connected to the driving element through the hole. The common electrode layer is disposed on the pixel electrode layer. The common electrode layer comprises a slit, and the slit has an edge, and the edge is disposed in the hole.Type: ApplicationFiled: January 11, 2024Publication date: May 2, 2024Applicant: Innolux CorporationInventors: Wei-Yen Chiu, Ming-Jou Tai, You-Cheng Lu, Yi-Shiuan Cherng, Yi-Hsiu Wu, Chia-Hao Tsai, Yung-Hsun Wu
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Publication number: 20240139301Abstract: The disclosure provides a method of active immunotherapy for a cancer patient, comprising administering vaccines against Globo series antigens (i.e., Globo H, SSEA-3 and SSEA-4). Specifically, the method comprises administering Globo H-CRM197 (OBI-833/821) in patients with cancer. The disclosure also provides a method of selecting a cancer patient who is suitable as treatment candidate for immunotherapy. Exemplary immune response can be characterized by reduction of the severity of disease, including but not limited to, prevention of disease, delay in onset of disease, decreased severity of symptoms, decreased morbidity and delayed mortality.Type: ApplicationFiled: November 19, 2021Publication date: May 2, 2024Inventors: Ming-Tain LAI, Cheng-Der Tony YU, I-Ju CHEN, Wei-Han LEE, Chueh-Hao YANG, Chun-Yen TSAO, Chang-Lin HSIEH, Chien-Chih OU, Chen-En TSAI
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Publication number: 20240115790Abstract: Disclosed is a drainage bottle system comprising: a system housing, a drainage bottle, a drainage tube, a motorless suction device and a liquid detection device, wherein a piezoelectric suction pump of the motorless suction device generates a negative pressure by means of piezoelectric effect to drive the drainage tube to suck and collect a liquid to be detected into the drainage bottle.Type: ApplicationFiled: October 4, 2023Publication date: April 11, 2024Applicant: PACIFIC HOSPITAL SUPPLY CO., LTD.Inventors: Jung-Yen TSAI, Ming-Chung CHEN, Hsuan-Chiao HO
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Publication number: 20230224963Abstract: Various techniques pertaining to a special dual clear-to-send (CTS) mode for improvement in collision avoidance in wireless communications are described. A first station (STA) transmits a request-to-send (RTS) and, in response, receives a first CTS from a second STA. The first STA waits to receive a second CTS from the second STA before transmitting data to the second STA responsive to the first CTS being of a first type and the second CTS being of a second type different from the first type. The first STA then transmits the data to the second STA upon passage of a waiting period.Type: ApplicationFiled: November 14, 2022Publication date: July 13, 2023Inventors: Tsung-Hsuan Wu, Chao-Wen Chou, Ching-Yu Kuo, Ping Hsien Chiang, Ming-Yen Tsai
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Patent number: 11322398Abstract: A process for making an interconnect of a group III-V semiconductor device includes the steps of applying a positive photoresist layer and an image-reversible photoresist layer, subjecting the image-reversible photoresist and positive photoresist layers to patternwise exposure, subjecting the image-reversible photoresist layer to image reversal bake, subjecting the image-reversible photoresist and positive photoresist layers to flood exposure, subjecting the image-reversible photoresist and positive photoresist layers to development, depositing a diffusion barrier layer, depositing a copper layer, and removing the image-reversible photoresist and positive photoresist layers.Type: GrantFiled: December 3, 2019Date of Patent: May 3, 2022Assignee: NATIONAL CHIAO TUNG UNIVERSITYInventors: Edward-Yi Chang, Yueh-Chin Lin, Ming-Yen Tsai, Po-Sheng Chang
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Publication number: 20210074582Abstract: A process for making an interconnect of a group III-V semiconductor device includes the steps of applying a positive photoresist layer and an image-reversible photoresist layer, subjecting the image-reversible photoresist and positive photoresist layers to patternwise exposure, subjecting the image-reversible photoresist layer to image reversal bake, subjecting the image-reversible photoresist and positive photoresist layers to flood exposure, subjecting the image-reversible photoresist and positive photoresist layers to development, depositing a diffusion barrier layer, depositing a copper layer, and removing the image-reversible photoresist and positive photoresist layers.Type: ApplicationFiled: December 3, 2019Publication date: March 11, 2021Inventors: Edward-Yi CHANG, Yueh-Chin LIN, Ming-Yen TSAI, Po-Sheng CHANG
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Patent number: 10804884Abstract: A level shifter includes a latch circuit, an input stage, a driver stage and a control circuit. The latch circuit is configured to generate an output signal according to a signal level at a first drive node and a signal level at a second drive node. The input stage is configured to receive an input signal to adjust a signal level at a connection node. The driver stage is configured to drive the first drive node by coupling the connection node to the first drive node according to a set of control signals. The control circuit is coupled to the input stage and the driver stage. The control circuit is configured to control the driver stage to couple the connection node to the first drive node by adjusting a signal level of each control signal in the set of control signals during a level transition of the input signal.Type: GrantFiled: January 22, 2020Date of Patent: October 13, 2020Assignee: M31 TECHNOLOGY CORPORATIONInventors: Ming-Yen Tsai, Chun-Hsiang Lai
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Patent number: 10473259Abstract: The present disclosure relates to an installation assembly configured to mount an extension module on a supporting frame. The installation assembly includes a main body, a supporting mechanism, and an upper engaging component. The supporting mechanism is disposed on a rear side of the main body away from the supporting frame and configured to mount the extension module. The upper engaging component is connected to a top portion of the main body and configured to engage with a top portion of the supporting frame. In such a way, the extension module can be mounted on the supporting frame easily by the installation assembly of the present disclosure. The present disclosure can effectively simplify assembly and disassembly processes and save time of assembly and disassembly.Type: GrantFiled: November 6, 2018Date of Patent: November 12, 2019Assignee: Winstron CorporationInventors: Kuang-Wen Chen, Ming-Yen Tsai
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Patent number: 10062789Abstract: A thin film includes a substrate, a bottom gate, a channel layer, a source and a drain, and a top gate. The bottom gate is disposed on the substrate. The channel layer is disposed on the bottom gate. The source and the drain are disposed on two different sides of the channel layer. The top gate is disposed on the channel layer, wherein the channel layer is disposed between the bottom gate and the top gate, and the bottom gate and the top gate are electrically isolated from each other. A related method is also provided.Type: GrantFiled: November 9, 2016Date of Patent: August 28, 2018Assignee: AU OPTRONICS CORPORATIONInventors: Yu-Xin Yang, Kuo-Kuang Chen, Tsung-Hsiang Shih, Ming-Yen Tsai, Ting-Chang Chang
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Publication number: 20170133514Abstract: A thin film includes a substrate, a bottom gate, a channel layer, a source and a drain, and a top gate. The bottom gate is disposed on the substrate. The channel layer is disposed on the bottom gate. The source and the drain are disposed on two different sides of the channel layer. The top gate is disposed on the channel layer, wherein the channel layer is disposed between the bottom gate and the top gate, and the bottom gate and the top gate are electrically isolated from each other. A related method is also provided.Type: ApplicationFiled: November 9, 2016Publication date: May 11, 2017Inventors: Yu-Xin YANG, Kuo-Kuang CHEN, Tsung-Hsiang SHIH, Ming-Yen TSAI, Ting-Chang CHANG
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Patent number: 9647020Abstract: A light sensing circuit for solving the problem of low reliability in illumination detection includes a photo transistor having a gate, a drain and a source; a first transistor electrically connecting between the gate and source of the photo transistor; a first capacitor electrically connecting between the gate and the drain of the photo transistor; a second transistor electrically connecting with the drain of the photo transistor, the first capacitor, and a data signal; a second capacitor electrically connecting between the source of the photo transistor and a ground contact; a third transistor electrically connecting with the photo transistor, the first transistor, and the second capacitor; and a switch adapted to alternatively connect the third transistor with a buffer or a zero signal. A control method of the above light sensing circuit is also disclosed. Therefore, the above identified problem can be surely solved.Type: GrantFiled: July 15, 2015Date of Patent: May 9, 2017Assignee: NATIONAL SUN YAT-SEN UNIVERSITYInventors: Ting-Chang Chang, Hua-Mao Chen, Ming-Yen Tsai, Min-Chen Chen
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Publication number: 20170018654Abstract: A thin-film transistor and a manufacturing method thereof are characterized in that: the active layer is a group IV-VI compound semiconductor film; the group IV-VI compound is one of geranium sulfide (GeS), germanium selenide (GeSe), germanium telluride (GeTe), tin selenide (SnSe), and tin telluride (SnTe) or a ternary, quaternary, or quinary compound thereof; the active layer is deposited by sputtering; and thermal annealing is performed after the active layer is deposited. The thin-film transistor has high carrier mobility and a high current on/off ratio and therefore meets the needs of high-resolution display development.Type: ApplicationFiled: July 14, 2015Publication date: January 19, 2017Inventors: TING-CHANG CHANG, HUA-MAO CHEN, MING-YEN TSAI, MIN-CHEN CHEN
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Publication number: 20160358956Abstract: A light sensing circuit for solving the problem of low reliability in illumination detection includes a photo transistor having a gate, a drain and a source; a first transistor electrically connecting between the gate and source of the photo transistor; a first capacitor electrically connecting between the gate and the drain of the photo transistor; a second transistor electrically connecting with the drain of the photo transistor, the first capacitor, and a data signal; a second capacitor electrically connecting between the source of the photo transistor and a ground contact; a third transistor electrically connecting with the photo transistor, the first transistor, and the second capacitor; and a switch adapted to alternatively connect the third transistor with a buffer or a zero signal. A control method of the above light sensing circuit is also disclosed. Therefore, the above identified problem can be surely solved.Type: ApplicationFiled: July 15, 2015Publication date: December 8, 2016Inventors: Ting-Chang CHANG, Hua-Mao CHEN, Ming-Yen TSAI, Min-Chen CHEN
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Patent number: 9443965Abstract: A method for producing a thin film transistor includes forming a transistor prototype on a substrate. The transistor prototype includes two transparent electrodes adapted to form a source and a drain of a thin film transistor. Next, the two transparent electrodes of the transistor prototype are exposed in an environment full of a plasma. The plasma conducts a surface treatment on the two transparent electrodes of the transistor prototype to form the thin film transistor. The method can solve the problem of excessive contact resistance of the transparent conductive films of conventional thin film transistors.Type: GrantFiled: December 15, 2014Date of Patent: September 13, 2016Assignee: NATIONAL SUN YAT-SEN UNIVERSITYInventors: Ting-Chang Chang, Hua-Mao Chen, Ming-Yen Tsai, Tian-Yu Hsieh
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Publication number: 20160155827Abstract: A method for producing a thin film transistor includes forming a transistor prototype on a substrate. The transistor prototype includes two transparent electrodes adapted to form a source and a drain of a thin film transistor. Next, the two transparent electrodes of the transistor prototype are exposed in an environment full of a plasma. The plasma conducts a surface treatment on the two transparent electrodes of the transistor prototype to form the thin film transistor. The method can solve the problem of excessive contact resistance of the transparent conductive films of conventional thin film transistors.Type: ApplicationFiled: December 15, 2014Publication date: June 2, 2016Inventors: Ting-Chang CHANG, Hua-Mao CHEN, Ming-Yen TSAI, Tian-Yu HSIEH
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Publication number: 20160148804Abstract: A method for producing a thin film transistor includes forming a transistor prototype on a substrate, with the transistor prototype including a face having a to-be-treated portion. The to-be-treated portion of the transistor prototype is exposed in an environment full of a supercritical fluid. The supercritical fluid conducts a surface treatment on the to-be-treated portion of the transistor prototype to form a thin film transistor. The method can solve the problem of too many defects of the thin film transistor resulting from a low-temperature process.Type: ApplicationFiled: December 5, 2014Publication date: May 26, 2016Inventors: Ting-Chang Chang, Ming-Yen Tsai, Hua-Mao Chen, Tian-Yu Hsieh
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Patent number: 9299722Abstract: A display panel and an active device thereof are provided. The active device includes a gate, a semiconductor layer, a first source and a plurality of first drains. The first source includes a first side and a second side opposite to each other, the first side has a plurality of first recesses, and the second side has a plurality of second recesses. Each of the first recesses and a corresponding second recess are disposed opposite to each other to constitute a recess-pair. A minimum distance between the first recess and the second recess of each recess-pair is A, a minimum distance between two neighboring recess-pairs is B, wherein A is greater than B. The first drains are electrically connected to each other, and each of the first drains is respectively disposed in one of the recesses of the first source.Type: GrantFiled: May 14, 2014Date of Patent: March 29, 2016Assignee: Au Optronics CorporationInventors: Wei-Li Lin, Ming-Yen Tsai, Yi-Suei Liao
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Patent number: 9281411Abstract: A thin film transistor is disclosed in the present invention, including a substrate, a gate, an insulating layer, a source, a drain and an active layer. The gate is arranged on the substrate. The insulating layer is arranged on the gate. The source and the drain are arranged on the insulating layer. The active layer is arranged between the source and the drain, and is formed by a bottom layer, an intermediate layer and a top layer stacked together on the insulating layer. The conductivity of the intermediate layer is higher than that of the bottom layer, and the conductivity of the bottom layer is higher than that of the top layer. As such, the disadvantage of low carrier mobility as commonly seen in the conventional thin film transistor is overcome.Type: GrantFiled: March 18, 2015Date of Patent: March 8, 2016Assignee: NATIONAL SUN YAT-SEN UNIVERSITYInventors: Ting-Chang Chang, Ming-Yen Tsai, Tian-Yu Hsieh
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Publication number: 20150228673Abstract: A display panel and an active device thereof are provided. The active device includes a gate, a semiconductor layer, a first source and a plurality of first drains. The first source includes a first side and a second side opposite to each other, the first side has a plurality of first recesses, and the second side has a plurality of second recesses. Each of the first recesses and a corresponding second recess are disposed opposite to each other to constitute a recess-pair. A minimum distance between the first recess and the second recess of each recess-pair is A, a minimum distance between two neighboring recess-pairs is B, wherein A is greater than B. The first drains are electrically connected to each other, and each of the first drains is respectively disposed in one of the recesses of the first source.Type: ApplicationFiled: May 14, 2014Publication date: August 13, 2015Applicant: Au Optronics CorporationInventors: Wei-Li Lin, Ming-Yen Tsai, Yi-Suei Liao
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Patent number: 8767907Abstract: A shift register includes a plurality of shift register circuits, where an Nth shift register circuit of the shift register includes a driving unit, a boost unit, a pull up unit, and a key pull down unit. The driving unit is for providing a gate signal, a first boost control signal, and a first transmission control signal according a first driving signal and a high frequency clock signal. The boost unit is for boosting the voltage of the first driving signal according to a first boost signal. The pull up unit is for providing a second driving signal according to the first transmission control signal and the gate signal, and is for providing a second boost signal according to the first boost control signal and a second boost control signal. The key pull down unit is for pulling down the first driving signal according to a second transmission control signal.Type: GrantFiled: December 25, 2012Date of Patent: July 1, 2014Assignee: AU Optronics Corp.Inventors: Pin-Yu Chan, Yu-Chung Yang, Yung-Chih Chen, Ming-Yen Tsai