Patents by Inventor Ming-Yi Lin
Ming-Yi Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240041065Abstract: A production machine includes a first motor, a raw material mixer receiving a mixture of plant-based protein and stirring and mixing materials in the mixture; a raw material storage tank receiving and storing the mixture stirred and mixed by the raw material mixer; a vacuum pump evacuating the raw material storage tank; a second motor controlling discharging speed of the mixture from the raw material storage tank; a raw material delivery pump; a pressure pump receiving and pressurizing the mixture delivered by the raw material delivery pump from the raw material storage tank; a heating/cooling device heating the mixture to a preset heating temperature within a preset time period and cooling the mixture to a preset cooling temperature; a fiberizing and cooling mold receiving the cooled mixture and performing an extrusion operation thereon to form fibrous materials; and a forming mold shaping the fibrous materials to form an artificial meat.Type: ApplicationFiled: July 31, 2023Publication date: February 8, 2024Inventor: Ming-Yi Lin
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Patent number: 11719880Abstract: A perovskite optical element includes a light guiding unit and a luminescent layer. The light guiding unit is configured to conduct light and serves as a resonant cavity. The luminescent layer is a thin film made of perovskite material and clads the light guiding unit. The luminescent layer is configured to be excited by an excitation module to emit light. The light is conducted and output by the light guiding unit. A manufacturing method of a perovskite optical element includes preparing a dip coating solution; dipping a single crystal optical fiber in the dip coating solution for one hour, removing the single crystal optical fiber out of the dip coating solution, and drying the single crystal optical fiber; and placing the single crystal optical fiber into a tube furnace, heating the crystal optical fiber, and introducing synthetic molecules into the tube furnace.Type: GrantFiled: December 10, 2021Date of Patent: August 8, 2023Assignee: NATIONAL DONG HWA UNIVERSITYInventors: Duc-Huy Nguyen, Jia-Yuan Sun, Chia-Yao Lo, Jia-Ming Liu, Wan-Shao Tsai, Ming-Hung Li, Sin-Jhang Yang, Cheng-Chia Lin, Shien-Der Tzeng, Yuan-Ron Ma, Ming-Yi Lin, Chien-Chih Lai
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Publication number: 20230118309Abstract: A perovskite optical element includes a light guiding unit and a luminescent layer. The light guiding unit is configured to conduct light and serves as a resonant cavity. The luminescent layer is a thin film made of perovskite material and clads the light guiding unit. The luminescent layer is configured to be excited by an excitation module to emit light. The light is conducted and output by the light guiding unit. A manufacturing method of a perovskite optical element includes preparing a dip coating solution; dipping a single crystal optical fiber in the dip coating solution for one hour, removing the single crystal optical fiber out of the dip coating solution, and drying the single crystal optical fiber; and placing the single crystal optical fiber into a tube furnace, heating the crystal optical fiber, and introducing synthetic molecules into the tube furnace.Type: ApplicationFiled: December 10, 2021Publication date: April 20, 2023Inventors: DUC-HUY NGUYEN, JIA-YUAN SUN, CHIA-YAO LO, JIA-MING LIU, WAN-SHAO TSAI, MING-HUNG LI, SIN-JHANG YANG, CHENG-CHIA LIN, SHIEN-DER TZENG, YUAN-RON MA, MING-YI LIN, CHIEN-CHIH LAI
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Publication number: 20220277128Abstract: Various examples of conductor features in integrated circuit layouts are disclosed herein. In an example, a method includes receiving an integrated circuit layout, inserting, into the integrated circuit layout, a design containing a first set of Front-End Of Line (FEOL) shapes of an integrated circuit and a first set of Back-End Of Line (BEOL) shapes of the integrated circuit, inserting, into the integrated circuit layout, a set of cells containing a second set of FEOL shapes of the integrated circuit and a second set of BEOL shapes of the integrated circuit, removing a subset of the second set of BEOL shapes that conflict with the design, and providing the integrated circuit layout that includes the design and the set of cells for fabrication of the integrated circuit. The second set of FEOL shapes includes contact shapes that define contacts of the integrated circuit.Type: ApplicationFiled: May 16, 2022Publication date: September 1, 2022Inventors: Yu-Cheng Yeh, Yen-Sen Wang, Ming-Yi Lin
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Patent number: 11334703Abstract: Various examples of conductor features in integrated circuit layouts are disclosed herein. In an example, a method includes initializing a layout for fabricating an integrated circuit. A plurality of fill cells is inserted into the layout. The plurality of fill cells includes a plurality of fill line shapes that correspond to conductive lines of the integrated circuit. Thereafter, a design is inserted into the layout that includes a plurality of functional shapes. A conflicting subset of the plurality of fill line shapes of the plurality of fill cells that conflict with the plurality functional shapes are removed. The layout that includes the plurality of fill cells and the design is provided for fabricating the integrated circuit.Type: GrantFiled: June 29, 2017Date of Patent: May 17, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-Cheng Yeh, Yen-Sen Wang, Ming-Yi Lin
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Patent number: 11017460Abstract: An electronic shelf system includes a shelf, a first display unit, a first sensing unit, a storage unit and a processing unit, wherein the processing unit communicates with the first display unit, the first sensing unit and the storage unit. The shelf includes a compartment. The first display unit is disposed on the compartment. The first sensing unit is disposed on the shelf. The first sensing unit is configured to sense a characteristic parameter. The storage unit stores a plurality of display information. The processing unit receives the characteristic parameter from the first sensing unit and controls the first display unit to switch one of the display information being displayed currently to another one of the display information according to the characteristic parameter.Type: GrantFiled: April 27, 2020Date of Patent: May 25, 2021Assignee: Qisda CorporationInventors: Chih-Ren Lin, Cheng-Te Tseng, Wei-Min Chiu, Chen-Chen Tsai, Ming-Yi Lin
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Publication number: 20190061205Abstract: This invention relates to a PU thin covers with waterproof and moisture permeable function, the hydrophilicity of the PEG structure can diffuse the water molecules from the inside of the PU then covers to the outside of the PU thin covers, and then the water molecules at the outer surface of the PU thin covers will be volatilize to achieve the effect of high moisture permeability. Since the PU thin covers containing PEG structure has no perforations, the external water and air cannot directly penetrate into the inside of the PU thin covers to achieve high waterproof effect. Moreover, the PU materials containing PEG structure can use various special manufacturing methods to make the PU thin covers have the best waterproofness, moisture permeability, structural strength, lightness, low cost, low pollution, high environmental value and various functions can be customized.Type: ApplicationFiled: August 22, 2018Publication date: February 28, 2019Inventor: MING-YI LIN
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Publication number: 20190005180Abstract: Various examples of conductor features in integrated circuit layouts are disclosed herein. In an example, a method includes initializing a layout for fabricating an integrated circuit. A plurality of fill cells is inserted into the layout. The plurality of fill cells includes a plurality of fill line shapes that correspond to conductive lines of the integrated circuit. Thereafter, a design is inserted into the layout that includes a plurality of functional shapes. A conflicting subset of the plurality of fill line shapes of the plurality of fill cells that conflict with the plurality functional shapes are removed. The layout that includes the plurality of fill cells and the design is provided for fabricating the integrated circuit.Type: ApplicationFiled: June 29, 2017Publication date: January 3, 2019Inventors: Yu-Cheng Yeh, Yen-Sen Wang, Ming-Yi Lin
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Patent number: 10049956Abstract: A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric layer. The doped dielectric layer includes a first doped layer and a second doped layer. The passivation structure further includes a top dielectric layer over the doped dielectric layer.Type: GrantFiled: September 11, 2017Date of Patent: August 14, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Chi Chuang, Hsuan-Hui Hung, Kun-Ming Huang, Ming-Yi Lin
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Patent number: 10002761Abstract: A substrate for an integrated circuit includes a device wafer having a raw carrier concentration and an epitaxial layer disposed over the device wafer. The epitaxial layer has a first carrier concentration. The first carrier concentration is higher than the raw carrier concentration.Type: GrantFiled: July 6, 2015Date of Patent: June 19, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Long-Shih Lin, Fu-Hsiung Yang, Kun-Ming Huang, Ming-Yi Lin, Po-Tao Chu
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Patent number: 9945385Abstract: The present invention illustrates an electric fan includes a motor, a rotatable disc and a fan blade. The motor has a driving shaft extended outwardly, the rotatable disc is connected with an end of the motor, and a fan shaft is pivotally connected on the rotatable disc and obliquely disposed relative to the driving shaft. The fan blade is disposed on the fan shaft. A connecting member is disposed between the driving shaft and the fan shaft. The rotatable disc is driven by a driving device to drive the fan shaft to rotate about the driving shaft, so as to expand a blowing range of airflow generated by the fan blade.Type: GrantFiled: October 14, 2015Date of Patent: April 17, 2018Inventors: Ming Yi Lin, Ching Pai Ko
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Publication number: 20180020453Abstract: The present invention relates to wireless networks and more specifically directed to providing or acquiring an exemplary country code identifier or regulatory domain for a non-limiting device operating in a reduced functionality radio frequency (regulatory) mode based on exemplary location factors and exemplary confidence rankings. One embodiment includes an exemplary regulatory domain selection component configured to weigh location factors associated with a device, based on reliability associated with the location factors, and configured to determine an overall confidence of a country code identifier or a regulatory domain for the device.Type: ApplicationFiled: September 26, 2017Publication date: January 18, 2018Inventors: Ming-Yi Lin, Kun Ting Tsai, Yung-Jui Chen, Peter Hong
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Publication number: 20180012817Abstract: A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric layer. The doped dielectric layer includes a first doped layer and a second doped layer. The passivation structure further includes a top dielectric layer over the doped dielectric layer.Type: ApplicationFiled: September 11, 2017Publication date: January 11, 2018Inventors: Cheng-Chi CHUANG, Hsuan-Hui HUNG, Kun-Ming HUANG, Ming-Yi LIN
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Patent number: 9853121Abstract: A method of fabricating a transistor includes doping non-overlapping first, second, and third wells in a silicon layer of a substrate. The substrate, second and third wells have a first type of conductivity and the first well and silicon layer have a second type of conductivity. First and second insulating layers are thermally grown over the second well between the first well and the third well, and over the third well, respectively. A gate stack is formed over the first insulating layer and the third well. A first source region having the second type of conductivity is formed in the third well. A gate spacer is formed, a fourth well having the first type of conductivity is doped in the third well between the second insulating layer and the gate spacer, a second source region is formed over the fourth well, and a drain is formed in the first well.Type: GrantFiled: July 2, 2015Date of Patent: December 26, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Long-Shih Lin, Kun-Ming Huang, Ming-Yi Lin
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Patent number: 9839038Abstract: The present invention relates to wireless networks and more specifically directed to providing or acquiring an exemplary country code identifier or regulatory domain for a non-limiting device operating in a reduced functionality radio frequency (regulatory) mode based on exemplary location factors and exemplary confidence rankings. One embodiment includes an exemplary regulatory domain selection component configured to weigh location factors associated with a device, based on reliability associated with the location factors, and configured to determine an overall confidence of a country code identifier or a regulatory domain for the device.Type: GrantFiled: February 9, 2017Date of Patent: December 5, 2017Assignee: NETWORK PERFORMANCE RESEARCH GROUP LLCInventors: Ming-Yi Lin, Kun Ting Tsai, Yung-Jui Chen, Peter Hong
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Patent number: 9761504Abstract: A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric layer. The doped dielectric layer includes a first doped layer and a second doped layer. The passivation structure further includes a top dielectric layer over the doped dielectric layer.Type: GrantFiled: December 7, 2015Date of Patent: September 12, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Chi Chuang, Kun-Ming Huang, Hsuan-Hui Hung, Ming-Yi Lin
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Patent number: 9698024Abstract: Some embodiments of the present disclosure relate to a method to increase breakdown voltage of a power device. A power device is formed on a silicon-on-insulator (SOI) wafer made up of a device wafer, a handle wafer, and an intermediate oxide layer. A recess is formed in a lower surface of the handle wafer to define a recessed region of the handle wafer. The recessed region of the handle wafer has a first handle wafer thickness, which is greater than zero. An un-recessed region of the handle wafer has a second handle wafer thickness, which is greater than the first handle wafer thickness. The first handle wafer thickness of the recessed region provides a breakdown voltage improvement for the power device.Type: GrantFiled: July 14, 2014Date of Patent: July 4, 2017Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Long-Shih Lin, Fu-Hsiung Yang, Kun-Ming Huang, Ming-Yi Lin, Paul Chu
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Publication number: 20170156149Abstract: The present invention relates to wireless networks and more specifically directed to providing or acquiring an exemplary country code identifier or regulatory domain for a non-limiting device operating in a reduced functionality radio frequency (regulatory) mode based on exemplary location factors and exemplary confidence rankings. One embodiment includes an exemplary regulatory domain selection component configured to weigh location factors associated with a device, based on reliability associated with the location factors, and configured to determine an overall confidence of a country code identifier or a regulatory domain for the device.Type: ApplicationFiled: February 9, 2017Publication date: June 1, 2017Inventors: Ming-Yi Lin, Kun Ting Tsai, Yung-Jui Chen, Peter Hong
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Publication number: 20170107991Abstract: The present invention illustrates an electric fan includes a motor, a rotatable disc and a fan blade. The motor has a driving shaft extended outwardly, the rotatable disc is connected with an end of the motor, and a fan shaft is pivotally connected on the rotatable disc and obliquely disposed relative to the driving shaft. The fan blade is disposed on the fan shaft. A connecting member is disposed between the driving shaft and the fan shaft. The rotatable disc is driven by a driving device to drive the fan shaft to rotate about the driving shaft, so as to expand a blowing range of airflow generated by the fan blade.Type: ApplicationFiled: October 14, 2015Publication date: April 20, 2017Inventors: MING YI LIN, CHING PAI KO
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Patent number: 9620420Abstract: A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a metal connect over and connected to a first active region, over and connected to a second active region and over a shallow trench isolation (STI) region thereby connecting the first active region to the second active region. A metal contact is over and connected to a gate in the STI region. The metal connect is formed in a first opening and the metal contact is formed in a second opening, where the first opening and the second opening are formed concurrently using a single mask. The semiconductor arrangement formed using a single mask is less expensive to fabricate and requires fewer etching operations than a semiconductor arrangement formed using multiple masks.Type: GrantFiled: May 20, 2016Date of Patent: April 11, 2017Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Chen-Hung Lu, Chie-luan Lin, Ming-Yi Lin, Yen-Sen Wang, Jyh-Kang Ting