Patents by Inventor Ming Yu Huang

Ming Yu Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250098346
    Abstract: An image sensor structure and methods of forming the same are provided. An image sensor structure according to the present disclosure includes a semiconductor substrate including a photodiode, a transfer gate transistor disposed over the semiconductor substrate and having a first channel area, a first dielectric layer disposed over the semiconductor substrate, a semiconductor layer disposed over the first dielectric layer, a source follower transistor disposed over the semiconductor layer and having a second channel area, a row select transistor disposed over the semiconductor layer and having a third channel area, and a reset transistor disposed over the semiconductor layer and having a fourth channel area. The second channel area is greater than the first channel area, the third channel area or the fourth channel area.
    Type: Application
    Filed: January 19, 2024
    Publication date: March 20, 2025
    Inventors: Wen-Chung Chen, Chia-Yu Wei, Kuo-Cheng Lee, Cheng-Hao Chiu, Hsiu Chi Yu, Hsun-Ying Huang, Ming-Hong Su
  • Patent number: 12255070
    Abstract: In a semiconductor structure, a first conductive feature is formed in a trench by PVD and a glue layer is then deposited on the first conductive feature in the trench before CVD deposition of a second conductive feature there-over. The first conductive feature acts as a protection layer to keep silicide from being damaged by later deposition of metal or a precursor by CVD. The glue layer extends along the extent of the sidewall to enhance the adhesion of the second conductive features to the surrounding dielectric layer.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: March 18, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Min-Hsuan Lu, Kan-Ju Lin, Lin-Yu Huang, Sheng-Tsung Wang, Hung-Yi Huang, Chih-Wei Chang, Ming-Hsing Tsai, Chih-Hao Wang
  • Publication number: 20250089277
    Abstract: Semiconductor structures and methods are provided. An exemplary method includes depositing forming a first metal-insulator-metal (MIM) capacitor over a substrate and forming a second MIM capacitor over the first MIM capacitor. The forming of the first MIM capacitor includes forming a first conductor plate over a substrate, the first conductor plate comprising a first metal element, conformally depositing a first dielectric layer on the first conductor plate, the first dielectric layer comprising the first metal element, forming a first high-K dielectric layer on the first dielectric layer, conformally depositing a second dielectric layer on the first high-K dielectric layer, the second dielectric layer comprising a second metal element, and forming a second conductor plate over the second dielectric layer, the second conductor plate comprises the second metal element.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 13, 2025
    Inventors: Chia-Yueh Chou, Hsiang-Ku Shen, Chen-Chiu Huang, Dian-Hau Chen, Cheng-Hao Hou, Kun-Yu Lee, Ming-Ho Lin, Alvin Universe Tang, Chun-Hsiu Chiang
  • Publication number: 20250077180
    Abstract: A digital compute-in-memory (DCIM) macro includes a memory cell array and an arithmetic logic unit (ALU). The memory cell array stores weight data of a neural network. The ALU receives parallel bits of a same input channel in an activation input, and generates a convolution computation output of the parallel bits and target weight data in the memory cell array.
    Type: Application
    Filed: August 30, 2024
    Publication date: March 6, 2025
    Applicant: MEDIATEK INC.
    Inventors: Ming-Hung Lin, Ming-En Shih, Shih-Wei Hsieh, Ping-Yuan Tsai, You-Yu Nian, Pei-Kuei Tsung, Jen-Wei Liang, Shu-Hsin Chang, En-Jui Chang, Chih-Wei Chen, Po-Hua Huang, Chung-Lun Huang
  • Publication number: 20250076606
    Abstract: An optical zoom lens module includes: a first lens barrel including a straight groove and a protrusion; a second lens barrel disposed inside the first lens barrel, and including a convex rib; and an operating element disposed outside the first lens barrel, and including an oblique groove and a limiting groove, wherein the oblique groove is stacked on the straight groove in the radial direction, the convex rib passes through the straight groove and is positioned in the oblique groove, and the protrusion is located in the limiting groove; wherein when the operating element is rotated, the oblique groove make the convex rib of the second lens barrel move along the corresponding straight groove and oblique groove, and simultaneously the limiting groove is also moved relative to the protrusion.
    Type: Application
    Filed: October 30, 2023
    Publication date: March 6, 2025
    Inventors: Hung-Ta CHEN, Chia-Yu CHANG, Ming-Huang HUANG
  • Publication number: 20250074536
    Abstract: A rear wheel latching mechanism for a personal transport device and a corresponding personal transport device are provided. The mechanism includes a rear wheel attached to an arm, which includes an inner extrusion that slides on one axis of a fixed frame in a horizontal direction. The fixed frame comprises an outer extrusion that surrounds the inner extrusion. The mechanism also includes a rear wheel cam-latch, configured to lock the inner extrusion and the outer extrusion together. The rear wheel cam-latch allows the rear wheel to articulate when the rear wheel cam-latch is unlatched between a stored state and a deployed state. The mechanism also includes a rear wheel pin that catches and holds the rear wheel in the deployed state to fix a front portion of the inner extrusion and a rear portion of the outer extrusion before the rear wheel cam-latch clamps the inner and outer extrusions together.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 6, 2025
    Inventors: Nicholas P. ZIRALDO, Matthew B. STAAL, Jackie P. PORCHAY, Ming Hsein LEE, Ding Jong CHOU, Sheng Yu HUANG
  • Publication number: 20250077282
    Abstract: A digital compute-in-memory (DCIM) system includes a first DCIM macro. The first DCIM macro includes a first memory cell array and a first arithmetic logic unit (ALU). The first memory cell array has N rows that are configured to store weight data of a neural network in a single weight data download session, wherein N is a positive integer not smaller than two. The first ALU is configured to receive a first activation input, and perform convolution operations upon the first activation input and a single row of weight data selected from the N rows of the first memory cell array to generate first convolution outputs.
    Type: Application
    Filed: August 30, 2024
    Publication date: March 6, 2025
    Applicant: MEDIATEK INC.
    Inventors: Ming-Hung Lin, Ming-En Shih, Shih-Wei Hsieh, Ping-Yuan Tsai, You-Yu Nian, Pei-Kuei Tsung, Jen-Wei Liang, Shu-Hsin Chang, En-Jui Chang, Chih-Wei Chen, Po-Hua Huang, Chung-Lun Huang
  • Publication number: 20250074527
    Abstract: A mounting bracket for a foldable transport device includes a top portion, a bottom portion, a front wall connecting the top portion and the bottom portion, a first foot peg mounted to the mounting bracket by a first pin and moveably connected to the mounting bracket between a stowed configuration and a riding configuration, and a second foot peg mounted to the mounting bracket by a second pin and moveably connected to the mounting bracket between a stowed configuration and a riding configuration.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 6, 2025
    Inventors: Nicholas P. ZIRALDO, Matthew B. STAAL, Michael Jin KIM, Jackie P . PORCHAY, Ming Hsein LEE, Ding Jong CHOU, Sheng Yu HUANG
  • Publication number: 20250076561
    Abstract: A light guide assembly includes a housing element, at least one light guide element, and at least one light-shielding element. The housing element includes an outer surface and an inner surface. The light guide element is configured for a light to pass therethrough. The light guide element includes a light entrance surface, at least one light exit surface, and at least one wall surface. The wall surface surrounds and is connected to an edge of the light exit surface and extends toward the light entrance surface. The light exit surface is in contact with the inner surface. The at least one light-shielding element surrounds the at least one wall surface and is in contact with the inner surface.
    Type: Application
    Filed: September 3, 2024
    Publication date: March 6, 2025
    Inventors: Yong Jyun LU, Jing Wen CHEN, Chang Yu HUANG, Ming-Hung HUNG, Yen Pin LIU
  • Patent number: 12243848
    Abstract: Methods and systems for improving fusion bonding are disclosed. Plasma treatment is performed on a substrate prior to the fusion bonding, which leaves residual charge on the substrate to be fusion bonded. The residual charge is usually dissipated through an electrically conductive silicone cushion on a loading pin. In the methods, the amount of residual voltage on a test silicon wafer is measured. If the residual voltage is too high, this indicates the usable lifetime of the silicone cushion has passed, and the electrically conductive silicone cushion is replaced. This ensures the continued dissipation of residual charge during use in production, improving the quality of fusion bonds between substrates.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: March 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hong-Ta Kuo, Yen Hao Huang, I-Shi Wang, Ming-Yi Shen, Tzu-Ping Yang, Hsing-Yu Wang, Huang-Liang Lin, Yin-Tung Chou, Yuan-Hsin Chi, Sheng-Yuan Lin
  • Publication number: 20250070500
    Abstract: A cable assembly, configured to be mounted to a circuit board having a first conductive pad and a second conductive pad, includes a first cable, a second cable and a support member. The first cable includes a first core, a first insulator and a first shielding layer. The second cable includes a second core, a second insulator and a second shielding layer. The first core and the second core are configured to be in contact with the first conductive pad and the second conductive pad. The support member includes a support portion. The support portion is configured to support the first insulator and the second insulator. The connection portion is in contact with the first shielding layer and the second shielding layer. A cable connector having the cable assembly is also disclosed.
    Type: Application
    Filed: April 29, 2024
    Publication date: February 27, 2025
    Applicant: Luxshare Precision Industry Company Limited
    Inventors: Cheng-Kai LIAO, Wei WANG, Minquan YU, Po-Chang HUANG, Ming-Yu HO
  • Publication number: 20250064345
    Abstract: A gait evaluating system including a processor is provided. The processor identifies whether a gait type of the user belongs to a normal gait, a non-neuropathic gait or a neuropathic gait based on step feature values of a user and walking limb feature values of the user. In response to that the gait type of the user belongs to the non-neuropathic gait, the processor controls the display panel to display a first auxiliary information, a second auxiliary information, and a third auxiliary information. The first auxiliary information indicates a potential sarcopenia of the user. The second auxiliary information indicates a dietary guideline for muscle building and muscle strengthening. The third auxiliary information shows a motion instruction video for regaining or maintaining muscle strength of the user.
    Type: Application
    Filed: October 18, 2024
    Publication date: February 27, 2025
    Applicant: Industrial Technology Research Institute
    Inventors: Je-Ping Hu, Keng-Hsun Lin, Shih-Fang Yang Mao, Pin-Chou Li, Jian-Hong Wu, Szu-Ju Li, Hui-Yu Cho, Yu-Chang Chen, Yen-Nien Lu, Jyun-Siang Hsu, Nien-Ya Lee, Kuan-Ting Ho, Ming-Chieh Tsai, Ching-Yu Huang
  • Publication number: 20250068149
    Abstract: A data processing method applied in a data center is provided.
    Type: Application
    Filed: December 20, 2023
    Publication date: February 27, 2025
    Applicants: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Wei-Chao Chen, Ming-Chi Chang, Ghih-Pin Wei, Jing-Lun Huang, Siang-Yu Lan, Shu-Huei Yang
  • Patent number: 12237320
    Abstract: Provided are a package structure and a method of forming the same. The method includes providing a first package having a plurality of first dies and a plurality of second dies therein; performing a first sawing process to cut the first package into a plurality of second packages, wherein one of the plurality of second packages comprises three first dies and one second die; and performing a second sawing process to remove the second die of the one of the plurality of second packages, so that a cut second package is formed into a polygonal structure with the number of nodes greater than or equal to 5.
    Type: Grant
    Filed: November 21, 2023
    Date of Patent: February 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Hung Lin, Hui-Min Huang, Chang-Jung Hsueh, Wan-Yu Chiang, Ming-Da Cheng, Mirng-Ji Lii
  • Publication number: 20250057973
    Abstract: A drug carrier with a property of crossing the blood-brain barrier comprises an extracellular vesicle with a human leukocyte antigen-G antibody on its surface. This carrier can serve as a pharmaceutical composition for promoting apoptosis of brain tumor cells, inhibiting growth of brain tumor cells, or reducing expression of O6-methylguanine-DNA methyltransferase (MGMT) in brain tumor cells. These effects contribute to the treatment of glioblastoma multiforme (GBM).
    Type: Application
    Filed: August 13, 2024
    Publication date: February 20, 2025
    Inventors: Der-Yang Cho, Shao-Chih Chiu, Yi-Wen Chen, Ming-You Shie, Chih-Ming Pan, Shi-Wei Huang, Yen Chen, Cheng-Yu Chen, Kai-Wen Kan
  • Patent number: 12230545
    Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.
    Type: Grant
    Filed: November 30, 2023
    Date of Patent: February 18, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
  • Patent number: 12227102
    Abstract: Electric vehicle charging management methods and systems are provided. A server performs a charging scheduling operation for each electric vehicle charging station to determine a specific time point for each electric vehicle charging station to perform a charging operation in which the charging operation is to charge an electric vehicle coupled with the electric vehicle charging station. When the charging operation corresponding to each electric vehicle charging station is being performed, each electric vehicle charging station transmits charging information corresponding to the charging operation to the server through a network.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: February 18, 2025
    Assignee: NOODOE GROUP INC.
    Inventors: Yi-An Hou, Ming-San Huang, En-Yu Shih, Yu-Ting Liou, Chun-Hung Kung
  • Patent number: 12205888
    Abstract: Semiconductor packages and methods of forming the same are disclosed. An semiconductor package includes two dies, an encapsulant, a first metal line and a plurality of dummy vias. The encapsulant is disposed between the two dies. The first metal line is disposed over the two dies and the encapsulant, and electrically connected to the two dies. The plurality of dummy vias is disposed over the encapsulant and aside the first metal line.
    Type: Grant
    Filed: August 1, 2023
    Date of Patent: January 21, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd
    Inventors: Ching-Yu Huang, Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang, Yu-Sheng Hsieh
  • Patent number: 12014009
    Abstract: A method for obtaining a handwriting trajectory is provided. The method includes the following steps: capturing images of handwriting that is written with a writing brush on a piece of paper on a writing platform; obtaining positions where pixels in each of the images are lower than a threshold according to the threshold; and outputting handwriting images according to the positions.
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: June 18, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chia-Yuan Chang, Jung-Wen Chang, Chin-Kang Chang, Ming-Yu Huang
  • Publication number: 20230407161
    Abstract: A self-healing elastomeric compound for use in blowout preventer packers includes one or more elastomers, carbon black, silica, and a self-healing agent evenly distributed throughout the compound.
    Type: Application
    Filed: June 15, 2023
    Publication date: December 21, 2023
    Applicant: Hydril USA Distribution LLC
    Inventors: Joseph Incavo, Nusrat Farzana, Ming Yu Huang