Abstract: A method and system for combining a guard interval and a corresponding portion of a received symbol, whereby when receiving a signal that contains the symbol with a guard interval corresponding to the symbol, a portion of the guard interval that is free from inter-symbol interference may be extracted, and the extracted portion of the guard interval may be combined with the corresponding portion of the symbol. The extracting and combining may be done after a determining, based on a delay profile provided by the received signal, that a delay spread is smaller than a predetermined channel delay. The delay spread may be determined by filtering an instantaneous delay spread associated with the received signal. The filtering may be performed using a 1-tap infinite impulse response low-pass filter. The low-pass filter may include a time constant that is the inverse of a maximum Doppler frequency shift.

Abstract: Methods and systems for time interleaved analog-to-digital converter timing mismatch calibration and compensation may comprise receiving an analog signal on a chip, converting the analog signal to a digital signal utilizing a time interleaved analog-to-digital-converter (ADC), and reducing a blocker signal that is generated by timing offsets in the time interleaved ADC by estimating complex coupling coefficients between a desired digital output signal and the blocker signal. A decorrelation algorithm may comprise a symmetric adaptive decorrelation algorithm. The received analog signal may be generated by a calibration tone generator on the chip. An aliased signal may be summed with an output signal from a multiplier. The complex coupling coefficients may be determined utilizing the decorrelation algorithm on the summed signals. A multiplier may be configured to cancel the blocker signal utilizing the determined complex coupling coefficients.

Abstract: Methods and systems for time interleaved analog-to-digital converter timing mismatch calibration and compensation may include receiving an analog signal on a chip, converting the analog signal to a digital signal utilizing a time interleaved analog-to-digital-converter (ADC), and reducing a blocker signal that is generated by timing offsets in the time interleaved ADC by estimating complex coupling coefficients between a desired digital output signal and the blocker signal utilizing a decorrelation algorithm on frequencies within a desired frequency bandwidth. The decorrelation algorithm may include a symmetric adaptive decorrelation algorithm. The received analog signal may be generated by a calibration tone generator on the chip. An aliased signal may be summed with an output signal from a multiplier. The complex coupling coefficients may be determined utilizing the decorrelation algorithm on the summed signals.

Abstract: In an example implementation of this disclosure, a message passing low density parity check (LDPC) decoder may, during decoding of a first group of bits, lock a first variable node upon a bit-value probability of the first variable node reaching a determined threshold, and lock a first check node upon all variable nodes connected to the first check node being locked. The LDPC decoder may cease decoding the first group of bits upon all variable nodes of the LDPC decoder being locked, all check nodes of the LDPC decoder being locked, reaching a maximum number of iterations, or reaching a timeout. During a particular iteration of the decoding of the first group of bits in which the first variable node is locked, the LDPC decoder may refrain from generating a bit-value probability for the locked first variable node.

Abstract: Methods and systems for time interleaved analog-to-digital converter timing mismatch calibration and compensation may comprise receiving an analog signal on a chip, converting the analog signal to a digital signal utilizing a time interleaved analog-to-digital-converter (ADC), and reducing a blocker signal that is generated by timing offsets in the time interleaved ADC by estimating complex coupling coefficients between a desired digital output signal and the blocker signal utilizing a decorrelation algorithm on frequencies within a desired frequency bandwidth. The decorrelation algorithm may comprise a symmetric adaptive decorrelation algorithm. The received analog signal may be generated by a calibration tone generator on the chip. An aliased signal may be summed with an output signal from a multiplier. The complex coupling coefficients may be determined utilizing the decorrelation algorithm on the summed signals.

Abstract: An automatic gain control (AGC) circuit and method for performing AGC for an orthogonal frequency-division multiplexing (OFDM) receiver measures signal power of input digital signals that are derived from incoming data frames with preambles to produce gain change signals when the signal power differs from a reference target power level. The gain of an amplifier of the OFDM receiver is changed in response to the gain change signals until a preamble of the data frames is detected for the first time. The gain of the amplifier of the OFDM receiver is further changed in response to the gain change signals, after the preamble is detected, only during periods when the preambles of the data frames are being processed by the OFDM receiver such that the gain of the amplifier is not changed during periods when other portions of the data frames are being processed by the OFDM receiver.

Abstract: A method and system for combining a guard interval and a corresponding portion of a received symbol, whereby when receiving a signal that contains the symbol with a guard interval corresponding to the symbol, a portion of the guard interval that is free from inter-symbol interference may be extracted, and the extracted portion of the guard interval may be combined with the corresponding portion of the symbol. The extracting and combining may be done after a determining, based on a delay profile provided by the received signal, that a delay spread is smaller than a predetermined channel delay. The delay spread may be determined by filtering an instantaneous delay spread associated with the received signal. The filtering may be performed using a 1-tap infinite impulse response low-pass filter. The low-pass filter may include a time constant that is the inverse of a maximum Doppler frequency shift.

Abstract: An automatic gain control (AGC) circuit and method for performing AGC for an orthogonal frequency-division multiplexing (OFDM) receiver measures signal power of input digital signals that are derived from incoming data frames with preambles to produce gain change signals when the signal power differs from a reference target power level. The gain of an amplifier of the OFDM receiver is changed in response to the gain change signals until a preamble of the data frames is detected for the first time. The gain of the amplifier of the OFDM receiver is further changed in response to the gain change signals, after the preamble is detected, only during periods when the preambles of the data frames are being processed by the OFDM receiver such that the gain of the amplifier is not changed during periods when other portions of the data frames are being processed by the OFDM receiver.