Patents by Inventor Minoru Fujita
Minoru Fujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210343880Abstract: An object of the present invention is to provide a Schottky barrier diode less liable to cause dielectric breakdown due to concentration of an electric field. A Schottky barrier diode according to this disclosure includes a semiconductor substrate made of gallium oxide, a drift layer made of gallium oxide and provided on the semiconductor substrate, an anode electrode 40 brought into Schottky contact with the drift layer, a cathode electrode brought into ohmic contact with the semiconductor substrate, an insulating layer provided on the drift layer so as to surround the anode electrode in a plan view, and a semiconductor layer provided on a surface of a part of the drift layer that is positioned between the anode electrode and the insulating layer and on the insulating layer. The semiconductor layer has a conductivity type opposite to that of the drift layer.Type: ApplicationFiled: October 9, 2019Publication date: November 4, 2021Inventors: Jun ARIMA, Minoru FUJITA, Jun HIRABAYASHI, Kohei SASAKI
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Publication number: 20210343879Abstract: An object of the present invention is to provide a Schottky barrier diode less liable to cause dielectric breakdown due to concentration of an electric field. A Schottky barrier diode according to this disclosure includes a semiconductor substrate made of gallium oxide, a drift layer made of gallium oxide and provided on the semiconductor substrate, an anode electrode brought into Schottky contact with the drift layer, and a cathode electrode brought into ohmic contact with the semiconductor substrate. The drift layer has an outer peripheral trench surrounding the anode electrode in a plan view. The surface of the drift layer positioned between the anode electrode and the outer peripheral trench is covered with a semiconductor layer having a conductivity type opposite to that of the drift layer.Type: ApplicationFiled: October 9, 2019Publication date: November 4, 2021Inventors: Jun ARIMA, Minoru FUJITA, Jun HIRABAYASHI, Kohei SASAKI
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Patent number: 11164953Abstract: A semiconductor device includes a semiconductor layer including first and second electrode forming surfaces and side surface, an anode electrode formed on the first electrode forming surface, a cathode electrode formed on the second electrode forming surface; an insulating film continuously formed from the first electrode forming surface to the side surface so as to cover the first edge. The side surface of the semiconductor layer is covered with the insulating film, so that a leak current flowing along the side surface is reduced. Further, the side surface is protected by the insulating film, making cracking, chipping, cleavage, and the like less likely to occur.Type: GrantFiled: January 26, 2018Date of Patent: November 2, 2021Assignee: TDK CORPORATIONInventors: Jun Hirabayashi, Minoru Fujita, Yoshiaki Fukumitsu
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Patent number: 11152532Abstract: One of embodiments is a method of manufacturing driven element chips by dividing a semiconductor wafer into the driven element chips. The method includes preparing a semiconductor wafer which includes chip substrate portions arrayed in an array direction, and a clearance between the chip substrate portions adjacent to each other in the array direction. Each chip substrate portion includes: a conductive layer provided inside the chip substrate portion and including interconnect portions; and a dummy conductor provided in a part of the conductive layer where the interconnect portions are not provided.Type: GrantFiled: July 19, 2018Date of Patent: October 19, 2021Assignee: Oki Electric Industry Co., Ltd.Inventors: Akira Nagumo, Shinya Jumonji, Minoru Fujita
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Publication number: 20210167225Abstract: A Schottky barrier diode includes a semiconductor substrate made of gallium oxide, a drift layer made of gallium oxide and provided on the semiconductor substrate, an anode electrode brought into Schottky contact with the drift layer, and a cathode electrode brought into ohmic contact with the semiconductor substrate. The drift layer has a plurality of trenches formed in a position overlapping the anode electrode in a plan view. Among the plurality of trenches, a trench positioned at the end portion has a selectively increased width. Thus, the curvature radius of the bottom portion of the trench is increased, or an edge part constituted by the bottom portion as viewed in a cross section is divided into two parts. As a result, an electric field to be applied to the bottom portion of the trench positioned at the end portion is mitigated, making dielectric breakdown less likely to occur.Type: ApplicationFiled: September 26, 2018Publication date: June 3, 2021Inventors: Jun ARIMA, Jun HIRABAYASHI, Minoru FUJITA, Kohei SASAKI
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Publication number: 20210119062Abstract: An object of the present invention is to provide a Schottky barrier diode less apt to cause dielectric breakdown due to concentration of an electric field. A Schottky barrier diode includes a semiconductor substrate 20 made of gallium oxide, a drift layer 30 made of gallium oxide and provided on the semiconductor substrate 20, an anode electrode 40 brought into Schottky contact with the drift layer 30, and a cathode electrode 50 brought into ohmic contact with the semiconductor substrate 20. The drift layer 30 has an outer peripheral trench 10 that surrounds the anode electrode 40 in a plan view, and the outer peripheral trench 10 is filled with a semiconductor material 11 having a conductivity type opposite to that of the drift layer 30. An electric field is dispersed by the presence of the thus configured outer peripheral trench 10. This alleviates electric field concentration on the corner of the anode electrode 40, making it less apt to cause dielectric breakdown.Type: ApplicationFiled: March 11, 2019Publication date: April 22, 2021Inventors: Jun ARIMA, Minoru FUJITA, Jun HIRABAYASHI, Kohei SASAKI
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Publication number: 20210017668Abstract: A die for EFG-based single crystal growth includes a lower surface to be immersed into a raw material melt with an impurity added, a rectangular upper surface facing a seed crystal and having a long side and a short side, and a plurality of slit sections extending from the lower surface to the upper surface and causing the raw material melt to ascend from the lower surface to the upper surface. Respective longitudinal directions of openings of the plurality of slit sections on the upper surface are parallel to one another and non-parallel to the long side of the upper surface.Type: ApplicationFiled: January 25, 2019Publication date: January 21, 2021Applicant: TDK CORPORATIONInventors: Katsumi KAWASAKI, Jun HIRABAYASHI, Minoru FUJITA, Daisuke INOKUCHI, Jun ARIMA, Makio KONDO
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Publication number: 20210020789Abstract: A trench MOS Schottky diode includes a first semiconductor layer including a Ga2O3-based single crystal, a second semiconductor layer that is a layer stacked on the first semiconductor layer, includes a Ga2O3-based single crystal, and includes a trench opened on a surface thereof opposite to the first semiconductor layer, an anode electrode formed on the surface of the second semiconductor layer, a cathode electrode formed on a surface of the first semiconductor layer, an insulating film covering the inner surface of the trench of the second semiconductor layer, and a trench electrode that is buried in the trench of the second semiconductor layer so as to be covered with the insulating film and is in contact with the anode electrode. The second semiconductor layer includes an insulating dry-etching-damaged layer with a thickness of not more than 0.8 ?m in a region including the inner surface of the trench.Type: ApplicationFiled: February 25, 2019Publication date: January 21, 2021Applicants: TAMURA CORPORATION, Novel Crystal Technology, Inc., TDK CorporationInventors: Kohei SASAKI, Minoru FUJITA, Jun HIRABAYASHI, Jun ARIMA
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Patent number: 10840384Abstract: An object of the present invention is to provide a Schottky barrier diode using gallium oxide capable of suppressing heat generation and enhancing heat radiation performance while ensuring mechanical strength and handling performance. A Schottky barrier diode includes a semiconductor substrate 20 made of gallium oxide having a recessed part 23 on the second surface 22, an epitaxial layer 30 made of gallium oxide and provided on a first surface 21 of the semiconductor substrate 20; an anode electrode 40 provided at a position overlapping the recessed part 23 as viewed in the lamination direction and brought into Schottky contact with the epitaxial layer 30, and a cathode electrode 50 provided in the recessed part 23 of the semiconductor substrate 20 and brought into ohmic contact with the semiconductor substrate 20.Type: GrantFiled: September 11, 2017Date of Patent: November 17, 2020Assignee: TDK CORPORATIONInventors: Jun Hirabayashi, Yutaka Matsuo, Minoru Fujita, Jun Arima
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Publication number: 20200287060Abstract: An object of the present invention is to provide a Schottky barrier diode which is less likely to cause dielectric breakdown due to concentration of an electric field. A Schottky barrier diode includes a semiconductor substrate 20 made of gallium oxide, a drift layer 30 made of gallium oxide and provided on the semiconductor substrate 20, an anode electrode 40 brought into Schottky contact with the drift layer 30, and a cathode electrode 50 brought into ohmic contact with the semiconductor substrate 20. The drift layer 30 has an outer peripheral trench 10 formed at a position surrounding the anode electrode 40 in a plan view. An electric field is dispersed by the presence of the outer peripheral trench 10 formed in the drift layer 30. This alleviates concentration of the electric field on the corner of the anode electrode 40, making it unlikely to cause dielectric breakdown.Type: ApplicationFiled: August 30, 2018Publication date: September 10, 2020Inventors: Jun ARIMA, Jun HIRABAYASHI, Minoru FUJITA, Katsumi KAWASAKI, Daisuke INOKUCHI
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Publication number: 20200111882Abstract: A semiconductor device includes a semiconductor layer including first and second electrode forming surfaces and side surface, an anode electrode formed on the first electrode forming surface, a cathode electrode formed on the second electrode forming surface; an insulating film continuously formed from the first electrode forming surface to the side surface so as to cover the first edge. The side surface of the semiconductor layer is covered with the insulating film, so that a leak current flowing along the side surface is reduced. Further, the side surface is protected by the insulating film, making cracking, chipping, cleavage, and the like less likely to occur.Type: ApplicationFiled: January 26, 2018Publication date: April 9, 2020Inventors: Jun HIRABAYASHI, Minoru FUJITA, Yoshiaki FUKUMITSU
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Publication number: 20200058804Abstract: An object of the present invention is to provide a Schottky barrier diode using gallium oxide capable of suppressing heat generation and enhancing heat radiation performance while ensuring mechanical strength and handling performance. A Schottky barrier diode includes a semiconductor substrate 20 made of gallium oxide having a recessed part 23 on the second surface 22, an epitaxial layer 30 made of gallium oxide and provided on a first surface 21 of the semiconductor substrate 20; an anode electrode 40 provided at a position overlapping the recessed part 23 as viewed in the lamination direction and brought into Schottky contact with the epitaxial layer 30, and a cathode electrode 50 provided in the recessed part 23 of the semiconductor substrate 20 and brought into ohmic contact with the semiconductor substrate 20.Type: ApplicationFiled: May 17, 2018Publication date: February 20, 2020Applicant: TDK CORPORATIONInventors: Jun HIRABAYASHI, Yutaka MATSUO, Minoru FUJITA, Jun ARIMA
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Publication number: 20190035971Abstract: One of embodiments is a method of manufacturing driven element chips by dividing a semiconductor wafer into the driven element chips. The method includes preparing a semiconductor wafer which includes chip substrate portions arrayed in an array direction, and a clearance between the chip substrate portions adjacent to each other in the array direction. Each chip substrate portion includes: a conductive layer provided inside the chip substrate portion and including interconnect portions; and a dummy conductor provided in a part of the conductive layer where the interconnect portions are not provided.Type: ApplicationFiled: July 19, 2018Publication date: January 31, 2019Applicant: Oki Data CorporationInventors: Akira NAGUMO, Shinya JUMONJI, Minoru FUJITA
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Patent number: 9582130Abstract: The transparent conductor includes a transparent substrate, a first metal oxide layer, a metal layer, and a second metal oxide layer laminated. At least one of the first and the second metal oxide layers contains four components of Al2O3, ZnO, SnO2, and Ga2O3. X, Y, and Z are within a region surrounded by line segments between point a, point b, point c, point d, point e, and point f, in terms of (X, Y, Z) coordinates shown in a ternary diagram in FIG. 2, or on the line segments where X is a total molar ratio of the Al2O3 and the ZnO, Y is a molar ratio of the SnO2, and Z is a molar ratio of the Ga2O3, relative to the total amount of the four components. A molar ratio of the Al2O3 relative to the total amount of the four components is 1.5 to 3.5% by mole.Type: GrantFiled: January 20, 2015Date of Patent: February 28, 2017Assignee: TDK CORPORATIONInventors: Hiroshi Shingai, Minoru Fujita, Masahiro Oishi
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Publication number: 20150205409Abstract: The transparent conductor includes a transparent substrate, a first metal oxide layer, a metal layer, and a second metal oxide layer laminated. At least one of the first and the second metal oxide layers contains four components of Al2O3, ZnO, SnO2, and Ga2O3. X, Y, and Z are within a region surrounded by line segments between point a, point b, point c, point d, point e, and point f, in terms of (X, Y, Z) coordinates shown in a ternary diagram in FIG. 2, or on the line segments where X is a total molar ratio of the Al2O3 and the ZnO, Y is a molar ratio of the SnO2, and Z is a molar ratio of the Ga2O3, relative to the total amount of the four components. A molar ratio of the Al2O3 relative to the total amount of the four components is 1.5 to 3.5% by mole.Type: ApplicationFiled: January 20, 2015Publication date: July 23, 2015Inventors: Hiroshi SHINGAI, Minoru FUJITA, Masahiro OISHI
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Patent number: 8851682Abstract: A display module includes a light emitting element array and a lens array. The light emitting element array includes a plurality of light emitting elements arranged on a substrate and driven by driving signal to emit light. A lens array is configured to focus light emitted by the respective light emitting elements. The lens array includes a plurality of first lens pillars respectively provided on the light emitting elements, a plurality of second lens pillars respectively provided on the first lens pillars and having curved surfaces at tops thereof, and a plurality of lens portions formed so as to cover the first lens pillars and the second lens pillars, the lens portions having curved surfaces at tops thereof. A driving circuit is provided on the substrate.Type: GrantFiled: June 28, 2012Date of Patent: October 7, 2014Assignee: Oki Data CorporationInventors: Kenichi Tanigawa, Minoru Fujita
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Publication number: 20140038324Abstract: In a manufacturing method of a light emitting apparatus, an array of light emitting elements is formed on a substrate. A first lens-pillar-material layer is formed on the array, and first lens pillars are formed on the light emitting elements of the array by performing a photolithographic process on the first lens-pillar-material layer. A lens-portion-material layer is laminated on the first lens pillar using a dry film resist so that gaps are left between the first lens pillars. A plurality of lens portions that correspond to the first lens pillars are formed by performing a heat treatment on the first lens-portion-material layer so that it is softened and enters the gaps. The first lens pillars and the lens portions constitute a lens array that focuses light emitted by the light emitting elements.Type: ApplicationFiled: October 3, 2013Publication date: February 6, 2014Applicant: OKI DATA CORPORATIONInventors: Kenichi TANIGAWA, Minoru FUJITA
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Patent number: 8538276Abstract: According to one embodiment, a visible-light communication apparatus includes an image input unit, a calculation unit, a preamble detection unit, a bit train detection unit, and a reception unit. The image input unit is configured to input image data generated by photographing a source of visible light carrying data. The calculation unit is configured to generate, from the image data, luminance data about an image at a designated position. The preamble detection unit is configured to detect a preamble at the head of the data, on the basis of the luminance data. The bit train detection unit is configured to detect the data bit train from the image data, in accordance with the preamble. The reception unit is configured to reproduce the data from the data bit train.Type: GrantFiled: August 12, 2010Date of Patent: September 17, 2013Assignees: Kabushiki Kaisha Toshiba, Toshiba Solutions CorporationInventors: Shigehito Shimada, Hideki Ueno, Minoru Fujita, Atsushi Kataoka
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Patent number: 8440426Abstract: Disclosed is a method for producing an antimutagenic substance by using a lactic acid bacteria, which can produce the antimutagenic substance in a large quantity in an extremely simple manner and is economically advantageous; particularly a method for producing an antimutagenic substance effective for a carcinogenic substance, particularly a heterocyclic amine (HCA) which is a carcinogenic substance derived from a food, by using a lactic acid bacteria. Specifically disclosed is a method for producing an antimutagenic substance by using a lactic acid bacteria, which is characterized by suspending the lactic acid bacteria in a poorly nutrient or nutrient-free medium and leaving the lactic acid bacteria in the medium.Type: GrantFiled: April 18, 2008Date of Patent: May 14, 2013Assignee: Kigen Biogenics Institute Co., Ltd.Inventors: Minoru Fujita, Masaharu Nakayama, Yasuteru Nakamura, Takahiro Inoue
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Publication number: 20130002730Abstract: A display module includes a light emitting element array and a lens array. The light emitting element array includes a plurality of light emitting elements arranged on a substrate and driven by driving signal to emit light. A lens array is configured to focus light emitted by the respective light emitting elements. The lens array includes a plurality of first lens pillars respectively provided on the light emitting elements, a plurality of second lens pillars respectively provided on the first lens pillars and having curved surfaces at tops thereof, and a plurality of lens portions formed so as to cover the first lens pillars and the second lens pillars, the lens portions having curved surfaces at tops thereof. A driving circuit is provided on the substrate.Type: ApplicationFiled: June 28, 2012Publication date: January 3, 2013Applicant: Oki Data CorporationInventors: Kenichi TANIGAWA, Minoru Fujita