Patents by Inventor Minoru Ishida

Minoru Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240194718
    Abstract: To provide a solid-state imaging device and an electronic apparatus with further improved performance. A solid-state imaging device including: a first substrate on which a pixel unit is formed, and a first semiconductor substrate and a first multi-layered wiring layer are stacked; a second substrate on which a circuit having a predetermined function is formed, and a second semiconductor substrate and a second multi-layered wiring layer are stacked; and a third substrate on which a circuit having a predetermined function is formed, and a third semiconductor substrate and a third multi-layered wiring layer are stacked. The first substrate, the second substrate, and the third substrate are stacked in this order. The pixel unit has pixels arranged thereon. The first substrate and the second substrate are bonded together in a manner that the first multi-layered wiring layer and the second semiconductor substrate are opposed to each other.
    Type: Application
    Filed: February 20, 2024
    Publication date: June 13, 2024
    Inventors: HIDETO HASHIGUCHI, REIJIROH SHOHJI, HIROSHI HORIKOSHI, IKUE MITSUHASHI, TADASHI IIJIMA, TAKATOSHI KAMESHIMA, MINORU ISHIDA, MASAKI HANEDA
  • Patent number: 12002833
    Abstract: A solid-state imaging device including: a first substrate having a pixel unit, and a first semiconductor substrate and a first wiring layer; a second substrate with a circuit, and a second semiconductor substrate and a second wiring layer; and a third substrate with a circuit, and a third semiconductor substrate and a third wiring layer. The first and second substrates are bonded together such that the first wiring layer and the second semiconductor substrate are opposed to each other. The device includes a first coupling structure for electrically coupling a circuit of the first substrate and the circuit of the second substrate. The first coupling structure includes a via in which electrically-conductive materials are embedded in a first through hole that exposes a wiring line in the first wiring layer and in a second through hole that exposes a wiring line in the second wiring layer or a film-formed structure.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: June 4, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hideto Hashiguchi, Reijiroh Shohji, Hiroshi Horikoshi, Ikue Mitsuhashi, Tadashi Iijima, Takatoshi Kameshima, Minoru Ishida, Masaki Haneda
  • Patent number: 11990855
    Abstract: A drive system establishes a normal state in which a first switch is ON and a gang switch is OFF, in the case where it is determined that there is no abnormality in the state of a first rotating body driven by a first motor. In this normal state, the first motor is driven by a first inverter, while a second motor is driven by a second inverter. It the case where it is determined that there is abnormality in the state of the first rotating body, a first countermeasure state is established in which the first switch is OFF and the gang switch is ON. In this first countermeasure state, the second motor is driven by both the first inverter and the second inverter.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: May 21, 2024
    Assignee: DENSO CORPORATION
    Inventors: Minoru Ishida, Tsubasa Sakuishi, Yuki Takahashi
  • Publication number: 20240147555
    Abstract: A communication system (100) includes: a plurality of stacked containers (2) having conductivity; and a plurality of electric field communication terminals (5) attached to the containers (2) in such a manner as to perform electric field coupling with any of the plurality of containers (2), in which the plurality of containers (2) includes a container (2) that contains a sensing terminal (4) that acquires sensing data, the plurality of electric field communication terminals (5) includes a first electric field communication terminal (5) attached to an inner side of the container (2) in which the sensing terminal (4) is contained, and a second electric field communication terminal (5) attached to an outer side of at least one container (2) of the plurality of containers (2), and the first electric field communication terminal (5) transmits the sensing data from the sensing terminal (4) to the second electric field communication terminal (5) via the plurality of containers (2).
    Type: Application
    Filed: January 21, 2022
    Publication date: May 2, 2024
    Inventors: MOTOSUKE IRIE, KATSUKI HIRABAYASHI, YOSHINORI OOTA, KOICHI OSHIMA, MINORU ISHIDA
  • Patent number: 11973091
    Abstract: The present disclosure relates to reducing the size of a solid-state imaging apparatus. The solid-state imaging apparatus is configured by laminating a first structure body, comprising a pixel array unit in which pixels for performing photoelectric conversion are two-dimensionally aligned, and a second structure body, comprising an output circuit unit for outputting a pixel signal. The output circuit unit, including a through via which penetrates a semiconductor substrate constituting a part of the second structure body, and a signal output external terminal connected to the outside of the apparatus are arranged under the first structure body, the output circuit unit is connected to the signal output external terminal via the through via, and the outermost surface of the apparatus is a resin layer formed on an upper layer of an on-chip lens of the pixel array unit.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: April 30, 2024
    Assignee: Sony Corporation
    Inventors: Harumi Tanaka, Yoshiaki Masuda, Shinji Miyazawa, Minoru Ishida
  • Patent number: 11955500
    Abstract: There is provided a solid-state imaging device including: a first substrate including a first semiconductor substrate and a first wiring layer, the first semiconductor substrate having a pixel unit with pixels; a second substrate including a second semiconductor substrate and a second wiring layer, the second semiconductor substrate having a circuit with a predetermined function; and a third substrate including a third semiconductor substrate and a third wiring layer, the third semiconductor substrate having a circuit with a predetermined function, the first, second, and third substrates being stacked in this order, the first substrate and the second substrate being bonded together with the first wiring layer and the second wiring layer opposed to each other, a first coupling structure on bonding surfaces of the first substrate and the second substrate, and including an electrode junction structure with electrodes formed on the respective bonding surfaces in direct contact with each other.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: April 9, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Reijiroh Shohji, Masaki Haneda, Hiroshi Horikoshi, Minoru Ishida, Takatoshi Kameshima, Ikue Mitsuhashi, Hideto Hashiguchi, Tadashi Iijima
  • Patent number: 11948961
    Abstract: A solid-state imaging device including a first substrate on which a pixel unit is formed, and a first semiconductor substrate and a first multi-layered wiring layer are stacked, a second substrate on which a circuit having a predetermined function is formed, and a second semiconductor substrate and a second multi-layered wiring layer are stacked, and a third substrate on which a circuit having a predetermined function is formed, and a third semiconductor substrate and a third multi-layered wiring layer are stacked. The first substrate, the second substrate, and the third substrate are stacked in this order. A first coupling structure for electrically coupling a circuit of the first substrate and the circuit of the second substrate to each other does not include a coupling structure formed from the first substrate as a base over bonding surfaces of the first substrate and the second substrate.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: April 2, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideto Hashiguchi, Reijiroh Shohji, Hiroshi Horikoshi, Ikue Mitsuhashi, Tadashi Iijima, Takatoshi Kameshima, Minoru Ishida, Masaki Haneda
  • Patent number: 11923395
    Abstract: The present disclosure relates to a semiconductor device, a solid-state image pickup element, an image pickup device, and an electronic apparatus that are enabled to reduce restrictions on materials and restrictions on device configuration. A CSP imager and a mounting substrate are connected together with a connection portion other than a solder ball. With such a configuration, restrictions on materials and restrictions on device configuration are reduced, which has conventionally occurred because it is limited to a configuration in which solder balls are used for connection. The present disclosure can be applied to image pickup devices.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: March 5, 2024
    Assignee: Sony Group Corporation
    Inventors: Yoshiaki Masuda, Minoru Ishida
  • Publication number: 20240019382
    Abstract: In a device measuring an amount of moisture in a medium, the performance of the device is improved. The sensor device includes a transmission probe, a reception probe, and a measurement circuit. The transmission probe includes a plurality of transmission antennas, and the reception probe includes a plurality of reception antennas. In this sensor device, the measurement circuit performs time-divisional control in which control of selecting one transmission antenna among the plurality of transmission antennas each time and radiating electromagnetic waves is repeatedly performed until performance of radiation ends in all the antennas set in advance.
    Type: Application
    Filed: November 8, 2021
    Publication date: January 18, 2024
    Applicants: SONY GROUP CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takahiro OISHI, Norihito MIHOTA, Atsushi YAMADA, Sachio IIDA, Takuya ICHIHARA, Minoru ISHIDA
  • Publication number: 20240019383
    Abstract: A sensor device is disclosed for measuring an amount of moisture in a medium that includes: a transmission antenna; a reception antenna to receive electromagnetic waves transmitted from the transmission antenna and through a medium; a measurement unit to measure the electromagnetic waves propagating to the reception antenna; and a sensor casing and further includes a transmission substrate including a plurality of wiring layers and a reception substrate including a plurality of wiring layers, and a measurement unit substrate including a plurality of wiring layers and includes the measurement unit or a first coating layer that, in a part of the transmission substrate, coats an outer circumference of the substrate and is formed from an electromagnetic wave absorbent material and a second coating layer that, in a part of the reception substrate, coats an outer circumference of the substrate and is formed from an electromagnetic wave absorbent material.
    Type: Application
    Filed: November 8, 2021
    Publication date: January 18, 2024
    Applicants: SONY GROUP CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Norihito MIHOTA, Takuya ICHIHARA, Atsushi YAMADA, Sachio IIDA, Takahiro OISHI, Minoru ISHIDA
  • Publication number: 20240011924
    Abstract: A device for measuring the amount of moisture in a medium that includes a transmission antenna that sends a signal as an electromagnetic wave, a reception antenna that receives the electromagnetic wave sent from the transmission antenna and transmitted through a medium, a measurement section that measures the electromagnetic wave propagated to the reception antenna, and a sensor casing. The sensor device further includes a transmission substrate that includes a plurality of wiring layers and a reception substrate that includes a plurality of wiring layers, or a first covering layer that partially covers an outer periphery of the transmission substrate and a second covering layer that partially covers an outer periphery of the reception substrate The coverings are formed of an electromagnetic wave absorption material. The sensor casing includes a transmission probe casing that accommodates the transmission substrate and a reception probe casing that accommodates the reception substrate.
    Type: Application
    Filed: November 8, 2021
    Publication date: January 11, 2024
    Applicants: SONY GROUP CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takuya ICHIHARA, Norihito MIHOTA, Atsushi YAMADA, Sachio IIDA, Takahiro OISHI, Minoru ISHIDA
  • Publication number: 20240004030
    Abstract: In a device that measures an amount of moisture in a medium, performance of the device is improved. A sensor device includes a transmitter, a receiver, and a sensor control unit. In this sensor device, a transmitter supplies a transmission signal to a transmission antenna. In addition, in the sensor device, a receiver receives a reception signal corresponding to the transmission signal through a reception antenna. In the sensor device, before measuring a predetermined parameter on the basis of the reception signal, the sensor control unit adjusts electric power of the transmission signal on the basis the reception signal.
    Type: Application
    Filed: November 8, 2021
    Publication date: January 4, 2024
    Applicants: SONY GROUP CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Atsushi YAMADA, Norihito MIHOTA, Sachio IIDA, Takuya ICHIHARA, Takahiro OISHI, Minoru ISHIDA
  • Publication number: 20230417686
    Abstract: Measurement accuracy of the amount of moisture is improved by a device that measures the amount of moisture in a medium. The sensor device includes a pair of antennas, a measurement circuit, a transmission path, and a radio wave absorption section. In the sensor device which includes the pair of antennas, the measurement circuit, the transmission path, and the radio wave absorption section, the measurement circuit measures the amount of moisture in a medium between the pair of antennas. Also, the transmission path connects the pair of antennas to the measurement circuit in the sensor device. The radio wave absorption section is formed in the surroundings of the transmission path in the sensor device.
    Type: Application
    Filed: November 9, 2021
    Publication date: December 28, 2023
    Applicants: SONY GROUP CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Sachio IIDA, Atsushi YAMADA, Norihito MIHOTA, Takuya ICHIHARA, Takahiro OISHI, Minoru ISHIDA
  • Publication number: 20230420478
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.
    Type: Application
    Filed: September 14, 2023
    Publication date: December 28, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Keiichi NAKAZAWA, Yoshiaki KITANO, Hirofumi YAMASHITA, Minoru ISHIDA
  • Publication number: 20230395818
    Abstract: A catalyst for an oxygen reduction reaction containing catalyst particles having a shell-core structure containing a PtCo alloy or a PtCoMn alloy as a core, and platinum as a shell layer. A specific plane of a face-centered cubic lattice is formed by a plurality of platinum atoms contained in the shell layer, and a lattice constant of the plane of the face-centered cubic lattice on the catalyst particle surface is 3.70 ? or more and 4.05 ? or less (in a PtCo alloy), or 3.870 ? or more and 4.10 ? or less (in a PtCoMn alloy). A catalyst design method includes a step of calculating, with respect to an orientation plane such as the plane formed by platinum atoms of the shell layer, adsorption energies for an oxygen molecule, an OH group and a water molecule by first-principles calculation based on density functional theory.
    Type: Application
    Filed: December 13, 2021
    Publication date: December 7, 2023
    Applicants: TANAKA KIKINZOKU KOGYO K.K., NATIONAL INSTITUTE OF TECHNOLOGY
    Inventors: Minoru ISHIDA, Koichi MATSUTANI, Hiroshi NAKANISHI, Hideaki KASAI, Bhume CHANTARAMOLEE, Susan Menez ASPERA
  • Patent number: 11804507
    Abstract: A solid-state imaging device including a first substrate having a pixel unit formed thereon and including a first semiconductor substrate and a first multi-layered wiring layer stacked, a second substrate having a circuit formed thereon and including a second semiconductor substrate and a second multi-layered wiring layer, the circuit having a predetermined function, and a third substrate having a circuit formed thereon and including a third semiconductor substrate and a third multi-layered wiring layer. The first substrate and the second substrate are bonded together such that that the first multi-layered wiring layer and the second semiconductor substrate are opposed to each other. The solid-state imaging device includes a first coupling structure and a second coupling structure. The first coupling structure electrically couples a circuit of the first substrate and the circuit of the second substrate.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: October 31, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Ikue Mitsuhashi, Reijiroh Shohji, Minoru Ishida, Tadashi Iijima, Takatoshi Kameshima, Hideto Hashiguchi, Hiroshi Horikoshi, Masaki Haneda
  • Patent number: 11798972
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: October 24, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Keiichi Nakazawa, Yoshiaki Kitano, Hirofumi Yamashita, Minoru Ishida
  • Publication number: 20230154964
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.
    Type: Application
    Filed: December 12, 2022
    Publication date: May 18, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Keiichi NAKAZAWA, Yoshiaki KITANO, Hirofumi YAMASHITA, Minoru ISHIDA
  • Publication number: 20230124400
    Abstract: Provided are a first photoelectric conversion unit, a second photoelectric conversion unit having a smaller electric charge amount to be converted per unit time than the first photoelectric conversion unit, a charge accumulation unit that accumulates an electric charge generated by the second photoelectric conversion unit, a charge voltage conversion unit, a first transfer gate unit that transfers an electric charge from the first photoelectric conversion unit to the charge voltage conversion unit, a second transfer gate unit that couples potentials of the charge voltage conversion unit and the charge accumulation unit, a third transfer gate unit that transfers an electric charge from the second photoelectric conversion unit to the charge accumulation unit, an overflow path formed under a gate electrode of the third transfer gate unit, where the overflow path transfers an electric charge overflowing from the second photoelectric conversion unit to the charge accumulation unit, and a light reducing unit that r
    Type: Application
    Filed: October 27, 2022
    Publication date: April 20, 2023
    Inventors: TOMOHIKO ASATSUMA, MINORU ISHIDA
  • Patent number: 11600651
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: March 7, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Keiichi Nakazawa, Yoshiaki Kitano, Hirofumi Yamashita, Minoru Ishida