Patents by Inventor Minoru Ishida
Minoru Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240019383Abstract: A sensor device is disclosed for measuring an amount of moisture in a medium that includes: a transmission antenna; a reception antenna to receive electromagnetic waves transmitted from the transmission antenna and through a medium; a measurement unit to measure the electromagnetic waves propagating to the reception antenna; and a sensor casing and further includes a transmission substrate including a plurality of wiring layers and a reception substrate including a plurality of wiring layers, and a measurement unit substrate including a plurality of wiring layers and includes the measurement unit or a first coating layer that, in a part of the transmission substrate, coats an outer circumference of the substrate and is formed from an electromagnetic wave absorbent material and a second coating layer that, in a part of the reception substrate, coats an outer circumference of the substrate and is formed from an electromagnetic wave absorbent material.Type: ApplicationFiled: November 8, 2021Publication date: January 18, 2024Applicants: SONY GROUP CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Norihito MIHOTA, Takuya ICHIHARA, Atsushi YAMADA, Sachio IIDA, Takahiro OISHI, Minoru ISHIDA
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Publication number: 20240019382Abstract: In a device measuring an amount of moisture in a medium, the performance of the device is improved. The sensor device includes a transmission probe, a reception probe, and a measurement circuit. The transmission probe includes a plurality of transmission antennas, and the reception probe includes a plurality of reception antennas. In this sensor device, the measurement circuit performs time-divisional control in which control of selecting one transmission antenna among the plurality of transmission antennas each time and radiating electromagnetic waves is repeatedly performed until performance of radiation ends in all the antennas set in advance.Type: ApplicationFiled: November 8, 2021Publication date: January 18, 2024Applicants: SONY GROUP CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Takahiro OISHI, Norihito MIHOTA, Atsushi YAMADA, Sachio IIDA, Takuya ICHIHARA, Minoru ISHIDA
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Publication number: 20240011924Abstract: A device for measuring the amount of moisture in a medium that includes a transmission antenna that sends a signal as an electromagnetic wave, a reception antenna that receives the electromagnetic wave sent from the transmission antenna and transmitted through a medium, a measurement section that measures the electromagnetic wave propagated to the reception antenna, and a sensor casing. The sensor device further includes a transmission substrate that includes a plurality of wiring layers and a reception substrate that includes a plurality of wiring layers, or a first covering layer that partially covers an outer periphery of the transmission substrate and a second covering layer that partially covers an outer periphery of the reception substrate The coverings are formed of an electromagnetic wave absorption material. The sensor casing includes a transmission probe casing that accommodates the transmission substrate and a reception probe casing that accommodates the reception substrate.Type: ApplicationFiled: November 8, 2021Publication date: January 11, 2024Applicants: SONY GROUP CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Takuya ICHIHARA, Norihito MIHOTA, Atsushi YAMADA, Sachio IIDA, Takahiro OISHI, Minoru ISHIDA
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Publication number: 20240004030Abstract: In a device that measures an amount of moisture in a medium, performance of the device is improved. A sensor device includes a transmitter, a receiver, and a sensor control unit. In this sensor device, a transmitter supplies a transmission signal to a transmission antenna. In addition, in the sensor device, a receiver receives a reception signal corresponding to the transmission signal through a reception antenna. In the sensor device, before measuring a predetermined parameter on the basis of the reception signal, the sensor control unit adjusts electric power of the transmission signal on the basis the reception signal.Type: ApplicationFiled: November 8, 2021Publication date: January 4, 2024Applicants: SONY GROUP CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Atsushi YAMADA, Norihito MIHOTA, Sachio IIDA, Takuya ICHIHARA, Takahiro OISHI, Minoru ISHIDA
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Publication number: 20230420478Abstract: An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.Type: ApplicationFiled: September 14, 2023Publication date: December 28, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Keiichi NAKAZAWA, Yoshiaki KITANO, Hirofumi YAMASHITA, Minoru ISHIDA
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Publication number: 20230417686Abstract: Measurement accuracy of the amount of moisture is improved by a device that measures the amount of moisture in a medium. The sensor device includes a pair of antennas, a measurement circuit, a transmission path, and a radio wave absorption section. In the sensor device which includes the pair of antennas, the measurement circuit, the transmission path, and the radio wave absorption section, the measurement circuit measures the amount of moisture in a medium between the pair of antennas. Also, the transmission path connects the pair of antennas to the measurement circuit in the sensor device. The radio wave absorption section is formed in the surroundings of the transmission path in the sensor device.Type: ApplicationFiled: November 9, 2021Publication date: December 28, 2023Applicants: SONY GROUP CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Sachio IIDA, Atsushi YAMADA, Norihito MIHOTA, Takuya ICHIHARA, Takahiro OISHI, Minoru ISHIDA
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Publication number: 20230395818Abstract: A catalyst for an oxygen reduction reaction containing catalyst particles having a shell-core structure containing a PtCo alloy or a PtCoMn alloy as a core, and platinum as a shell layer. A specific plane of a face-centered cubic lattice is formed by a plurality of platinum atoms contained in the shell layer, and a lattice constant of the plane of the face-centered cubic lattice on the catalyst particle surface is 3.70 ? or more and 4.05 ? or less (in a PtCo alloy), or 3.870 ? or more and 4.10 ? or less (in a PtCoMn alloy). A catalyst design method includes a step of calculating, with respect to an orientation plane such as the plane formed by platinum atoms of the shell layer, adsorption energies for an oxygen molecule, an OH group and a water molecule by first-principles calculation based on density functional theory.Type: ApplicationFiled: December 13, 2021Publication date: December 7, 2023Applicants: TANAKA KIKINZOKU KOGYO K.K., NATIONAL INSTITUTE OF TECHNOLOGYInventors: Minoru ISHIDA, Koichi MATSUTANI, Hiroshi NAKANISHI, Hideaki KASAI, Bhume CHANTARAMOLEE, Susan Menez ASPERA
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Patent number: 11804507Abstract: A solid-state imaging device including a first substrate having a pixel unit formed thereon and including a first semiconductor substrate and a first multi-layered wiring layer stacked, a second substrate having a circuit formed thereon and including a second semiconductor substrate and a second multi-layered wiring layer, the circuit having a predetermined function, and a third substrate having a circuit formed thereon and including a third semiconductor substrate and a third multi-layered wiring layer. The first substrate and the second substrate are bonded together such that that the first multi-layered wiring layer and the second semiconductor substrate are opposed to each other. The solid-state imaging device includes a first coupling structure and a second coupling structure. The first coupling structure electrically couples a circuit of the first substrate and the circuit of the second substrate.Type: GrantFiled: November 23, 2021Date of Patent: October 31, 2023Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Ikue Mitsuhashi, Reijiroh Shohji, Minoru Ishida, Tadashi Iijima, Takatoshi Kameshima, Hideto Hashiguchi, Hiroshi Horikoshi, Masaki Haneda
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Patent number: 11798972Abstract: An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.Type: GrantFiled: December 12, 2022Date of Patent: October 24, 2023Assignee: Sony Semiconductor Solutions CorporationInventors: Keiichi Nakazawa, Yoshiaki Kitano, Hirofumi Yamashita, Minoru Ishida
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Publication number: 20230154964Abstract: An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.Type: ApplicationFiled: December 12, 2022Publication date: May 18, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Keiichi NAKAZAWA, Yoshiaki KITANO, Hirofumi YAMASHITA, Minoru ISHIDA
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Publication number: 20230124400Abstract: Provided are a first photoelectric conversion unit, a second photoelectric conversion unit having a smaller electric charge amount to be converted per unit time than the first photoelectric conversion unit, a charge accumulation unit that accumulates an electric charge generated by the second photoelectric conversion unit, a charge voltage conversion unit, a first transfer gate unit that transfers an electric charge from the first photoelectric conversion unit to the charge voltage conversion unit, a second transfer gate unit that couples potentials of the charge voltage conversion unit and the charge accumulation unit, a third transfer gate unit that transfers an electric charge from the second photoelectric conversion unit to the charge accumulation unit, an overflow path formed under a gate electrode of the third transfer gate unit, where the overflow path transfers an electric charge overflowing from the second photoelectric conversion unit to the charge accumulation unit, and a light reducing unit that rType: ApplicationFiled: October 27, 2022Publication date: April 20, 2023Inventors: TOMOHIKO ASATSUMA, MINORU ISHIDA
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Patent number: 11600651Abstract: An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.Type: GrantFiled: December 27, 2018Date of Patent: March 7, 2023Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Keiichi Nakazawa, Yoshiaki Kitano, Hirofumi Yamashita, Minoru Ishida
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Patent number: 11594567Abstract: A solid-state imaging device includes first through third substrates. The first substrate includes a first semiconductor substrate and a first multi-layered wiring layer stacked thereon. The second substrate includes a second semiconductor substrate and a second multi-layered wiring layer stacked thereon. The third substrate includes a third semiconductor substrate and a third multi-layered wiring layer stacked thereon. A coupling structure for electrically coupling at least two of the first through third substrates includes a via. The via exposes a predetermined wiring line in the second multi-layered wiring layer while exposing a portion of a predetermined wiring line in the first multi-layered wiring layer from a back surface side of the first substrate, or exposes a predetermined wiring line in the third multi-layered wiring layer while exposing a portion of the predetermined wiring line in the first multi-layered wiring layer or the second multi-layered wiring layer from the back surface.Type: GrantFiled: March 23, 2018Date of Patent: February 28, 2023Assignee: SONY GROUP CORPORATIONInventors: Tadashi Iijima, Takatoshi Kameshima, Ikue Mitsuhashi, Hiroshi Horikoshi, Hideto Hashiguchi, Reijiroh Shohji, Minoru Ishida, Masaki Haneda
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Patent number: 11563050Abstract: Provided are a first photoelectric conversion unit, a second photoelectric conversion unit having a smaller electric charge amount to be converted per unit time than the first photoelectric conversion unit, a charge accumulation unit that accumulates an electric charge generated by the second photoelectric conversion unit, a charge voltage conversion unit, a first transfer gate unit that transfers an electric charge from the first photoelectric conversion unit to the charge voltage conversion unit, a second transfer gate unit that couples potentials of the charge voltage conversion unit and the charge accumulation unit, a third transfer gate unit that transfers an electric charge from the second photoelectric conversion unit to the charge accumulation unit, an overflow path formed under a gate electrode of the third transfer gate unit and transfers an electric charge overflowing from the second photoelectric conversion unit to the charge accumulation unit, and a light reducing unit that reduces light to enterType: GrantFiled: February 24, 2017Date of Patent: January 24, 2023Assignee: SONY CORPORATIONInventors: Tomohiko Asatsuma, Minoru Ishida
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Publication number: 20230020137Abstract: A solid-state imaging device including: a first substrate having a pixel unit, and a first semiconductor substrate and a first wiring layer; a second substrate with a circuit, and a second semiconductor substrate and a second wiring layer; and a third substrate with a circuit, and a third semiconductor substrate and a third wiring layer. The first and second substrates are bonded together such that the first wiring layer and the second semiconductor substrate are opposed to each other. The device includes a first coupling structure for electrically coupling a circuit of the first substrate and the circuit of the second substrate. The first coupling structure includes a via in which electrically-conductive materials are embedded in a first through hole that exposes a wiring line in the first wiring layer and in a second through hole that exposes a wiring line in the second wiring layer or a film-formed structure.Type: ApplicationFiled: September 27, 2022Publication date: January 19, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Hideto HASHIGUCHI, Reijiroh SHOHJI, Hiroshi HORIKOSHI, Ikue MITSUHASHI, Tadashi IIJIMA, Takatoshi KAMESHIMA, Minoru ISHIDA, Masaki HANEDA
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Patent number: 11543621Abstract: There is provided a camera module including a stacked lens structure including a plurality of lens substrates. The plurality of lens substrates includes a first lens substrate including a first lens that is disposed at an inner side of a through-hole formed in the first lens substrate, and a second lens substrate including a second lens that is disposed at an inner side of a through-hole formed in the second lens substrate, wherein the first lens substrate is directly bonded to the second lens substrate. The camera module further includes an electromagnetic drive unit configured to adjust a distance between the stacked lens structure and a light-receiving element.Type: GrantFiled: January 16, 2018Date of Patent: January 3, 2023Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Munekatsu Fukuyama, Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Masanori Iwasaki, Toshihiko Hayashi, Shuzo Sato, Nobutoshi Fujii, Hiroshi Tazawa, Toshiaki Shiraiwa, Yusuke Moriya, Minoru Ishida
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Patent number: 11525984Abstract: The present technology relates to, for example, a lens attached substrate including a substrate which has a through-hole formed therein and a light shielding film formed on a side wall of the through-hole and a lens resin portion which is formed inside the through-hole of the substrate. The present technology can be applied to, for example, a lens attached substrate, a layered lens structure, a camera module, a manufacturing apparatus, a manufacturing method, an electronic device, a computer, a program, a storage medium, a system, and the like.Type: GrantFiled: October 26, 2021Date of Patent: December 13, 2022Assignee: Sony Semiconductor Solutions CorporationInventors: Yusuke Moriya, Masanori Iwasaki, Takashi Oinoue, Yoshiya Hagimoto, Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Nobutoshi Fujii, Hiroshi Tazawa, Toshiaki Shiraiwa, Minoru Ishida
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Patent number: 11527568Abstract: Provided are a first photoelectric conversion unit, a second photoelectric conversion unit having a smaller electric charge amount to be converted per unit time than the first photoelectric conversion unit, a charge accumulation unit that accumulates an electric charge generated by the second photoelectric conversion unit, a charge voltage conversion unit, a first transfer gate unit that transfers an electric charge from the first photoelectric conversion unit to the charge voltage conversion unit, a second transfer gate unit that couples potentials of the charge voltage conversion unit and the charge accumulation unit, a third transfer gate unit that transfers an electric charge from the second photoelectric conversion unit to the charge accumulation unit, an overflow path formed under a gate electrode of the third transfer gate unit and transfers an electric charge overflowing from the second photoelectric conversion unit to the charge accumulation unit, and a light reducing unit that reduces light to enterType: GrantFiled: February 24, 2017Date of Patent: December 13, 2022Assignee: SONY CORPORATIONInventors: Tomohiko Asatsuma, Minoru Ishida
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Publication number: 20220359605Abstract: To provide a solid-state imaging device and an electronic apparatus with further improved performance. A solid-state imaging device including: a first substrate on which a pixel unit is formed, and a first semiconductor substrate and a first multi-layered wiring layer are stacked; a second substrate on which a circuit having a predetermined function is formed, and a second semiconductor substrate and a second multi-layered wiring layer are stacked; and a third substrate on which a circuit having a predetermined function is formed, and a third semiconductor substrate and a third multi-layered wiring layer are stacked. The first substrate, the second substrate, and the third substrate are stacked in this order. The pixel unit has pixels arranged thereon. The first substrate and the second substrate are bonded together in a manner that the first multi-layered wiring layer and the second semiconductor substrate are opposed to each other.Type: ApplicationFiled: July 20, 2022Publication date: November 10, 2022Inventors: HIDETO HASHIGUCHI, REIJIROH SHOHJI, HIROSHI HORIKOSHI, IKUE MITSUHASHI, TADASHI IIJIMA, TAKATOSHI KAMESHIMA, MINORU ISHIDA, MASAKI HANEDA
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Publication number: 20220359603Abstract: A solid-state imaging device is provided that comprises a first substrate that includes a first multi-layered wiring layer stacked on a first semiconductor substrate, a second substrate that includes a second multi-layered wiring layer and an insulating layer stacked on a second semiconductor substrate, and a third substrate that includes a third multi-layered wiring layer stacked on a third semiconductor substrate. A first coupling structure electrically couples the first and second substrates to each other. A second coupling structure exists on bonding surfaces of the second and third substrates, and includes an electrode junction structure in which electrodes formed on respective bonding surfaces are in direct contact with each other. A first via penetrates the second semiconductor substrate and electrically couples a first electrode to a wiring in the second multi-layered wiring layer. A second via electrically couples the second electrode to another wiring in the third multi-layered wiring layer.Type: ApplicationFiled: July 25, 2022Publication date: November 10, 2022Inventors: TAKATOSHI KAMESHIMA, HIDETO HASHIGUCHI, IKUE MITSUHASHI, HIROSHI HORIKOSHI, REIJIROH SHOHJI, MINORU ISHIDA, TADASHI IIJIMA, MASAKI HANEDA