Patents by Inventor Minoru Taguchi

Minoru Taguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7791701
    Abstract: A circuit film comprises a first circuit formed on a film substrate for outputting a driving signal to a display device, and a plurality of input lines formed on the film substrate. The display device includes a display panel which has first and second signal lines, a second-circuit film which has a second circuit for outputting a driving signal to the second signal line, and a control board for controlling the first and second circuits. The plurality of input lines include a first input line for inputting a control signal to the first circuit and a second input line for inputting a control signal to the second circuit. The film substrate is connected to the control board and the display panel such that a driving signal is input from the control board to the first and second circuits through the first and second input lines, respectively.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: September 7, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Minoru Taguchi
  • Patent number: 7486264
    Abstract: Data (gray scale levels of source driver output) of two lines are compared between an actually charged line and a pre-charged line for which actual charging and pre-charging are carried out, respectively, during the same horizontal period. Based on the result of comparison, a pre-charged period of the pre-charged line is adjusted by adjusting a pulse width of a gate driver output. In this way, the pre-charge period is reduced and thereby overcharge is avoided in pixels which are likely to be overcharged by the pre-charging.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: February 3, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Minoru Taguchi
  • Patent number: 7384974
    Abstract: A 4,5-dihydronaphtho[1,2-b]thiophene derivative expressed by the formula: (wherein R1 is a C1 to C10 1-hydroxyalkyl group or a C1 to C10 acyl group, and R2 and R3 separately substitute in the 6-, 7-, 8-, or 9-positions, and are each independently a hydrogen atom, a halogen atom, a C1 to C10 alkyl group, a hydroxy group, a C1 to C10 alkoxy group, a C1 to C5 alkenyloxy group, a C1 to C5 alkynyloxy group, a benzyloxy group, or the like, provided that when R1 is an acyl group and R2 is a hydrogen atom, then R3 is neither a hydrogen atom nor an acetyl group), or a pharmaceutically acceptable salt thereof This is a novel compound that is effective in reducing triglyceride levels in the liver and reducing blood glucose levels.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: June 10, 2008
    Assignee: Taisha Pharmaceutical Co., Ltd.
    Inventors: Minoru Taguchi, Ryo Suzuki, Ayako Mikami
  • Publication number: 20060189678
    Abstract: A 4,5-dihydronaphtho[1,2-b]thiophene derivative expressed by the formula: (wherein R1 is a C1 to C10 1-hydroxyalkyl group or a C1 to C10 acyl group, and R2 and R3 separately substitute in the 6-, 7-, 8-, or 9-positions, and are each independently a hydrogen atom, a halogen atom, a C1 to C10 alkyl group, a hydroxy group, a C1 to C10 alkoxy group, a C1 to C5 alkenyloxy group, a C1 to C5 alkynyloxy group, a benzyloxy group, or the like, provided that when R1 is an acyl group and R2 is a hydrogen atom, then R3 is neither a hydrogen atom nor an acetyl group), or a pharmaceutically acceptable salt thereof This is a novel compound that is effective in reducing triglyceride levels in the liver and reducing blood glucose levels.
    Type: Application
    Filed: July 30, 2004
    Publication date: August 24, 2006
    Inventors: Minoru Taguchi, Ryo Suzuki, Ayako Mikami
  • Publication number: 20060023153
    Abstract: A circuit film comprises a first circuit formed on a film substrate for outputting a driving signal to a display device, and a plurality of input lines formed on the film substrate. The display device includes a display panel which has first and second signal lines, a second-circuit film which has a second circuit for outputting a driving signal to the second signal line, and a control board for controlling the first and second circuits. The plurality of input lines include a first input line for inputting a control signal to the first circuit and a second input line for inputting a control signal to the second circuit. The film substrate is connected to the control board and the display panel such that a driving signal is input from the control board to the first and second circuits through the first and second input lines, respectively.
    Type: Application
    Filed: July 25, 2005
    Publication date: February 2, 2006
    Inventor: Minoru Taguchi
  • Publication number: 20050195671
    Abstract: Data (gray scale levels of source driver output) of two lines are compared between an actually charged line and a pre-charged line for which actual charging and pre-charging are carried out, respectively, during the same horizontal period. Based on the result of comparison, a pre-charged period of the pre-charged line is adjusted by adjusting a pulse width of a gate driver output. In this way, the pre-charge period is reduced and thereby overcharge is avoided in pixels which are likely to be overcharged by the pre-charging.
    Type: Application
    Filed: March 3, 2005
    Publication date: September 8, 2005
    Inventor: Minoru Taguchi
  • Patent number: 6162832
    Abstract: A 2-phenoxyaniline derivative represented by the formula: ##STR1## wherein R.sup.1 is a hydrogen atom or a lower alkoxy group, R.sup.2 is a halogen atom or a nitro group, and R.sup.3 is a hydrogen atom or a halogen atom, or a pharmaceutically acceptable salt thereof.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: December 19, 2000
    Assignee: Taisho Pharmaceutical Co., Inc.
    Inventors: Tomomi Ota, Misa Nakanishi, Izumi Aibe, Minoru Taguchi, Kazuyuki Tomisawa
  • Patent number: 6156801
    Abstract: A 2-phenoxyaniline derivative represented by the formula: ##STR1## wherein R.sup.1 is a hydrogen atom, an amino group or an NHCOR.sup.3 group, R.sup.2 is a halogen atom, an amino group, a cyano group, a C.sub.1-6 alkyl group, a C.sub.1-3 perfluoroalkyl group, an NHCOR.sup.3 group, a CH.sub.2 OR.sup.4 group, an OCH.sub.2 R.sup.5 group or a COR.sup.6 group, R.sup.3 is a C.sub.1-6 alkyl group, R.sup.4 is a hydrogen atom or a C.sub.1-6 alkyl group, R.sup.5 is a hydrogen atom, a C.sub.1-6 alkyl group, a C.sub.1-5 aminoalkyl group, a C.sub.2-7 alkoxy-carbonyl group or a carbamoyl group, and R.sup.6 is a C.sub.1-6 alkyl group or a C.sub.3-8 cycloalkyl group which is unsubstituted or substituted by a halogen atom, an amino group, a cyano group or a straight or branched C.sub.1-6 alkyl group; or a pharmaceutically acceptable salt thereof.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: December 5, 2000
    Assignee: Taisho Pharmaceutical Co., Ltd.
    Inventors: Tomomi Ota, Misa Nakanishi, Minoru Taguchi, Kazuyuki Tomisawa
  • Patent number: 5691730
    Abstract: A retractable broad-band antenna for a portable telephone which includes a first antenna element which resonates in the lower region of the frequency band, a second antenna element which is coupled in series to the first antenna element via electrostatic capacitance and resonates in the higher region, and a call-receiving third antenna element mounted to the tip end of the second antenna element. The first and second antenna elements are shortened antenna elements in a form of helical coils. The first antenna element has an electrical length of .lambda.L/8 and is a non-grounded type having broad band characteristics by means of a matching device; and the second element has an electrical length of .lambda.H/2 wherein .lambda.H and .lambda.L are respectively the wave lengths at a center frequency of the higher and lower region of the frequency band used.
    Type: Grant
    Filed: September 9, 1996
    Date of Patent: November 25, 1997
    Assignee: Harada Kogyo Kabushiki Kaisha
    Inventors: Yoshimi Egashira, Minoru Taguchi
  • Patent number: 5548537
    Abstract: Output signals of an electronic part are sampled at regular intervals, and a function representing a relationship between the output signal and a changing quantity of a characteristic of the electronic part is calculated with an interpolation formula. A changing quantity for setting the output signal to a desired value is calculated with the calculated function, and electronic part is adjusted by the calculated changing quantity.
    Type: Grant
    Filed: January 18, 1995
    Date of Patent: August 20, 1996
    Assignee: Pioneer Electronic Corporation
    Inventor: Minoru Taguchi
  • Patent number: 5489545
    Abstract: An integrated circuit comprises a charge coupled device and an MOS transistor. The charge coupled device has a lower and an upper gate electrode on the substrate. The insulating film between the substrate and the electrodes comprises silicon nitride. The insulating film between the electrodes is formed by thermal oxidizing the lower gate electrode using the silicon nitride film as a mask.
    Type: Grant
    Filed: March 14, 1994
    Date of Patent: February 6, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Minoru Taguchi
  • Patent number: 5376822
    Abstract: A heterojunction type of compound semiconductor integrated circuit in which a PNP transistor has an N type substrate made of a first compound semiconductor for mounting the PNP transistor and for insulating positive holes transmitted in the PNP transistor, a P type second compound semiconductor limitedly arranged on a part of the substrate for functioning as an emitter of the PNP transistor, an N type third compound semiconductor arranged on both the second compound semiconductor and the substrate for functioning as a base of the PNP transistor, electrons being applied from the substrate to the third compound semiconductor, a P type fourth compound semiconductor limitedly arranged on a part of the N type third compound semiconductor, a P.sup.
    Type: Grant
    Filed: June 15, 1992
    Date of Patent: December 27, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Minoru Taguchi
  • Patent number: 5321282
    Abstract: An integrated circuit comprises a charge coupled device and an MOS transistor. The charge coupled device has a lower and an upper gate electrode on the substrate. The insulating film between the substrate and the electrodes comprises silicon nitride. The insulating film between the electrodes is formed by thermal oxidizing the lower gate electrode using the silicon nitride film as a mask.
    Type: Grant
    Filed: March 3, 1992
    Date of Patent: June 14, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Minoru Taguchi
  • Patent number: 5286986
    Abstract: In a semiconductor device, a charge transfer device, a bipolar transistor, and a MOSFET are formed on a single chip, and the peripheral portion of the charge transfer device is surrounded by an N.sup.+ -type region. Since the charge transfer device block is surrounded by the N.sup.+ -type region and the N.sup.+ -type buried layer, leaked charge of clocks from the charge transfer device is absorbed by the N.sup.+ -type region and the N.sup.+ -type buried layer.
    Type: Grant
    Filed: February 18, 1992
    Date of Patent: February 15, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuo Kihara, Minoru Taguchi
  • Patent number: 5268250
    Abstract: Disclosed herein is an electrophotographic photoreceptor comprising a charge generation layer and a charge transport layer disposed in lamination on a substrate, in which at least one of said charge generation layer and said charge transport layer is a vacuum vapor deposition film containing a binding polymer.
    Type: Grant
    Filed: April 20, 1992
    Date of Patent: December 7, 1993
    Assignee: Ricoh Company, Ltd.
    Inventors: Minoru Matsuo, Minoru Taguchi
  • Patent number: 5260228
    Abstract: A semiconductor device having a semiconductor substrate of a first conductivity type, an epitaxial layer of a second conductivity type formed on a major surface of the semiconductor substrate, an isolation layer of the first conductivity type formed in the epitaxial layer and extending from a surface thereof to the major surface of the semiconductor substrate. The isolation layer divides the epitaxial layer into first, second, and third islands. The device further has two wells of the first conductivity type, formed in the first and second islands, respectively, and extending to the substrate, a charge transfer device having a back gate formed of the first well, an insulated-gate FET of the first conductivity type, having a back gate formed of the second island, an insulated-gate FET of the second conductivity type, having a back gate formed of the second well, and a bipolar transistor having a collector formed of the third island.
    Type: Grant
    Filed: November 17, 1992
    Date of Patent: November 9, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Minoru Taguchi
  • Patent number: 5241208
    Abstract: A semiconductor device, comprises a semiconductor substrate, a digital element part as a pair of MOS transistors formed on the semiconductor substrate; and an analog element part as a pair of MOS transistors formed on the semiconductor substrate, wherein a gate insulator film of the analogue element part comprises at least a first silicon oxide film and a silicon nitride film, a gate insulator film of the digital element part comprises a second silicon oxide, and the gate insulation film of the analogue element part is thicker than the gate insulation film of the digital element part. A fabrication method of the semiconductor device also is described.
    Type: Grant
    Filed: September 6, 1991
    Date of Patent: August 31, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Minoru Taguchi
  • Patent number: 5220190
    Abstract: A semiconductor device according to the present invention has a semiconductor body of a first conductivity type, three islands of a second conductivity type, formed in the surface of the semiconductor body. Two wells of the first conductivity are formed in the first and second islands. The device further has a charge transfer device which back gate is formed of the first well, an insulated-gate FET of the first conductivity type which back gate is formed of the second island, an insulated-gate FET of the second conductivity type which back gate is formed of the second well, and a bipolar transistor which collector is formed of the third island. The first island surrounds the first well which serves as back gate of the charge transfer device, and blocks the noise generated in the first well. Hence, the other islands are free from the influence of the noise.
    Type: Grant
    Filed: January 16, 1991
    Date of Patent: June 15, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Minoru Taguchi, Kazuo Kihara
  • Patent number: D341362
    Type: Grant
    Filed: April 30, 1991
    Date of Patent: November 16, 1993
    Assignee: Harada Kogyo Kabushiki Kaisha
    Inventor: Minoru Taguchi
  • Patent number: D341835
    Type: Grant
    Filed: April 30, 1991
    Date of Patent: November 30, 1993
    Assignee: Harada Kogyo Kabushiki Kaisha
    Inventor: Minoru Taguchi