Patents by Inventor Misaki Takahashi
Misaki Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11949005Abstract: Provided is a semiconductor device that includes a first conductivity type well region below a gate runner portion, wherein a diode region includes first contact portions, a first conductivity type anode region, and a second conductivity type cathode region; wherein the well region contacts the diode region in the first direction, and when an end of the well region, an end of at least one of first contact portions, and an end of the cathode region that face one another in the first direction are imaginary projected on an upper surface of the semiconductor substrate, a first distance is longer than a second distance, the first distance being a distance between the end of the well region and the end of the cathode region, and the second distance being a distance between the end of the well region and the end of the at least one first contact portion.Type: GrantFiled: June 23, 2022Date of Patent: April 2, 2024Assignee: FUJI ELECTRIC CO., LTD.Inventors: Misaki Takahashi, Yuichi Harada, Kouta Yokoyama
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Publication number: 20240011061Abstract: The purpose of the present invention is to provide very long chain polyunsaturated fatty acids and/or derivatives thereof. Substance production of very long chain polyunsaturated fatty acids and/or derivatives thereof has been possible by the conventional technology. However, concentrations of the produced substances have been low. The substance production of very long chain polyunsaturated fatty acids and/or derivatives thereof has been possible. However, the substances produced cannot be obtained in sufficient concentrations and cannot be used as compositions. The present invention provides very long chain polyunsaturated fatty acids and/or derivatives thereof with increased concentrations. Moreover, the object of the present invention is to provide a composition comprising very long chain polyunsaturated fatty acids and/or derivatives thereof.Type: ApplicationFiled: August 4, 2023Publication date: January 11, 2024Applicant: Nissui CorporationInventors: Takayoshi Sekiguchi, Misaki Takahashi, Ryutaro Eko, Seizo Sato
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Publication number: 20230335599Abstract: A device includes a substrate with upper/lower surfaces, including hydrogen containing region having hydrogen chemical concentration peaks in a depth direction. A carrier concentration distribution of the hydrogen containing region includes a first carrier concentration peak, a second carrier concentration peak closest to the first carrier concentration peak, a third carrier concentration peak arranged closer to the upper surface than the second carrier concentration peak, a first inter peak region arranged between the first and second carrier concentration peaks, a second inter peak region arranged between the second and third carrier concentration peaks, and an inter-peaks concentration peak arranged in the second inter peak region such that the concentration peak does not overlap the hydrogen chemical concentration peaks in the second and third carrier concentration peaks. A local minimum value of a carrier concentration in the first inter peak region is smaller than that of the second inter peak region.Type: ApplicationFiled: June 13, 2023Publication date: October 19, 2023Inventors: Yoshiharu KATO, Toru AJIKI, Tohru SHIRAKAWA, Misaki TAKAHASHI, Kaname MITSUZUKA, Takashi YOSHIMURA, Yuichi ONOZAWA, Hiroshi TAKISHITA, Soichi YOSHIDA
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Patent number: 11715771Abstract: Provided is a semiconductor device comprising a semiconductor substrate, wherein the semiconductor substrate includes a hydrogen containing region including hydrogen, and the hydrogen containing region includes a high concentration region with a higher carrier concentration than a virtual carrier concentration determined based on a concentration of hydrogen included and an activation ratio of hydrogen. The semiconductor substrate includes an N type drift region, an N type emitter region that has a higher carrier concentration than that in the drift region, a P type base region, a P type collector region provided to be in contact with a lower surface of the semiconductor substrate, and an N type buffer region that is provided between the collector region and the drift region, and has a higher carrier concentration than that in the drift region, and the hydrogen containing region is included in the buffer region.Type: GrantFiled: October 22, 2020Date of Patent: August 1, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yoshiharu Kato, Toru Ajiki, Tohru Shirakawa, Misaki Takahashi, Kaname Mitsuzuka, Takashi Yoshimura, Yuichi Onozawa, Hiroshi Takishita, Soichi Yoshida
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Patent number: 11569092Abstract: A semiconductor device is provided. The semiconductor device includes: a first region formed on a front surface side of a semiconductor substrate; a drift region formed closer to a rear surface of the semiconductor substrate than the first region is; a buffer region that: is formed closer to the rear surface of the semiconductor substrate than the drift region is; and has one or more peaks of an impurity concentration that are higher than an impurity concentration of the drift region; and a lifetime killer that: is arranged on a rear surface side of the semiconductor substrate; and shortens a carrier lifetime, wherein a peak of a concentration of the lifetime killer is arranged between: a peak that is closest to a front surface of the semiconductor substrate among the peaks of the impurity concentration in the buffer region; and the rear surface of the semiconductor substrate.Type: GrantFiled: November 18, 2021Date of Patent: January 31, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Takahiro Tamura, Yuichi Onozawa, Misaki Takahashi
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Publication number: 20220328664Abstract: Provided is a semiconductor device that includes a first conductivity type well region below a gate runner portion, wherein a diode region includes first contact portions, a first conductivity type anode region, and a second conductivity type cathode region; wherein the well region contacts the diode region in the first direction, and when an end of the well region, an end of at least one of first contact portions, and an end of the cathode region that face one another in the first direction are imaginary projected on an upper surface of the semiconductor substrate, a first distance is longer than a second distance, the first distance being a distance between the end of the well region and the end of the cathode region, and the second distance being a distance between the end of the well region and the end of the at least one first contact portion.Type: ApplicationFiled: June 23, 2022Publication date: October 13, 2022Inventors: Misaki TAKAHASHI, Yuichi HARADA, Kouta YOKOYAMA
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Publication number: 20220271152Abstract: To provide a semiconductor device having excellent conduction characteristics of a transistor portion and a diode portion. The semiconductor device having a transistor portion and a diode portion, the semiconductor device includes: a drift region of a first conductivity type provided on a semiconductor substrate, a first well region of a second conductivity type provided on an upper surface side of the semiconductor substrate, an anode region of the second conductivity provided on the upper surface side of the semiconductor substrate, in the diode portion, and a first high concentration region of a second conductivity type which is provided in contact with a first well region between the anode region and the first well region, and has a higher doping concentration than the anode region.Type: ApplicationFiled: May 10, 2022Publication date: August 25, 2022Inventors: Kaname MITSUZUKA, Misaki TAKAHASHI, Tohru SHIRAKAWA
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Patent number: 11380784Abstract: Provided is a semiconductor device that includes a first conductivity type well region below a gate runner portion, wherein a diode region includes first contact portions, a first conductivity type anode region, and a second conductivity type cathode region; wherein the well region contacts the diode region in the first direction, and when an end of the well region, an end of at least one of first contact portions, and an end of the cathode region that face one another in the first direction are imaginary projected on an upper surface of the semiconductor substrate, a first distance is longer than a second distance, the first distance being a distance between the end of the well region and the end of the cathode region, and the second distance being a distance between the end of the well region and the end of the at least one first contact portion.Type: GrantFiled: January 27, 2020Date of Patent: July 5, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventors: Misaki Takahashi, Yuichi Harada, Kouta Yokoyama
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Patent number: 11335795Abstract: To provide a semiconductor device having excellent conduction characteristics of a transistor portion and a diode portion. The semiconductor device having a transistor portion and a diode portion, the semiconductor device includes: a drift region of a first conductivity type provided on a semiconductor substrate, a first well region of a second conductivity type provided on an upper surface side of the semiconductor substrate, an anode region of the second conductivity provided on the upper surface side of the semiconductor substrate, in the diode portion, and a first high concentration region of a second conductivity type which is provided in contact with a first well region between the anode region and the first well region, and has a higher doping concentration than the anode region.Type: GrantFiled: November 24, 2019Date of Patent: May 17, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventors: Kaname Mitsuzuka, Misaki Takahashi, Tohru Shirakawa
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Publication number: 20220076956Abstract: A semiconductor device is provided. The semiconductor device includes: a first region formed on a front surface side of a semiconductor substrate; a drift region formed closer to a rear surface of the semiconductor substrate than the first region is; a buffer region that: is formed closer to the rear surface of the semiconductor substrate than the drift region is; and has one or more peaks of an impurity concentration that are higher than an impurity concentration of the drift region; and a lifetime killer that: is arranged on a rear surface side of the semiconductor substrate; and shortens a carrier lifetime, wherein a peak of a concentration of the lifetime killer is arranged between: a peak that is closest to a front surface of the semiconductor substrate among the peaks of the impurity concentration in the buffer region; and the rear surface of the semiconductor substrate.Type: ApplicationFiled: November 18, 2021Publication date: March 10, 2022Inventors: Takahiro TAMURA, Yuichi ONOZAWA, Misaki TAKAHASHI
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Patent number: 11183388Abstract: A semiconductor device is provided. The semiconductor device includes: a first region formed on a front surface side of a semiconductor substrate; a drift region formed closer to a rear surface of the semiconductor substrate than the first region is; a buffer region that: is formed closer to the rear surface of the semiconductor substrate than the drift region is; and has one or more peaks of an impurity concentration that are higher than an impurity concentration of the drift region; and a lifetime killer that: is arranged on a rear surface side of the semiconductor substrate; and shortens a carrier lifetime, wherein a peak of a concentration of the lifetime killer is arranged between: a peak that is closest to a front surface of the semiconductor substrate among the peaks of the impurity concentration in the buffer region; and the rear surface of the semiconductor substrate.Type: GrantFiled: July 20, 2020Date of Patent: November 23, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventors: Takahiro Tamura, Yuichi Onozawa, Misaki Takahashi
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Publication number: 20210324433Abstract: The purpose of the present invention is to provide an oil/lipid that contains dihomo-?-linolenic acid at a higher purity. Provided is a microbial oil/lipid that is specified by a high content of dihomo-?-linolenic acid contained therein and/or a reduced content of undesirable constituting fatty acid(s).Type: ApplicationFiled: June 28, 2021Publication date: October 21, 2021Applicant: Nippon Suisan Kaisha, Ltd.Inventors: Seizo SATO, Takayoshi SEKIGUCHI, Misaki TAKAHASHI
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Patent number: 11139291Abstract: A semiconductor device is provided, including a semiconductor substrate, wherein the semiconductor substrate has: a diode region; a transistor region; and a boundary region that is positioned between the diode region and the transistor region, the boundary region includes a defect region that is provided: at a predetermined depth position on a front surface-side of the semiconductor substrate; and to extend from an end portion of the boundary region adjacent to the diode region toward the transistor region, at least part of the boundary region does not include a first conductivity-type emitter region exposed on a front surface of the semiconductor substrate, and the transistor region does not have the defect region below a mesa portion that is sandwiched by two adjacent trench portions, and closest to the boundary region among the mesa portions having the emitter region.Type: GrantFiled: November 29, 2019Date of Patent: October 5, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventors: Takahiro Tamura, Yuichi Onozawa, Misaki Takahashi, Kaname Mitsuzuka, Daisuke Ozaki, Akinori Kanetake
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Patent number: 11107910Abstract: Provided is a semiconductor device that includes: a first conductivity type anode region provided in the semiconductor substrate in the diode region; a second conductivity type drift region that is located below the anode region in the semiconductor substrate; a second conductivity type accumulation region that is located between the anode region and the drift region in a depth direction of the semiconductor substrate; and an insulating film that includes a plurality of contact portions extending in a first direction and is provided on an upper surface of the semiconductor substrate; wherein the plurality of contact portions include a first contact portion provided in the diode region; and the first contact portion includes a first non-overlapping region in which an end of the first contact portion and the accumulation region in the first direction do not overlap in the depth direction.Type: GrantFiled: January 27, 2020Date of Patent: August 31, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yuichi Harada, Misaki Takahashi, Kouta Yokoyama
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Publication number: 20210043739Abstract: Provided is a semiconductor device comprising a semiconductor substrate, wherein the semiconductor substrate includes a hydrogen containing region including hydrogen, and the hydrogen containing region includes a high concentration region with a higher carrier concentration than a virtual carrier concentration determined based on a concentration of hydrogen included and an activation ratio of hydrogen. The semiconductor substrate includes an N type drift region, an N type emitter region that has a higher carrier concentration than that in the drift region, a P type base region, a P type collector region provided to be in contact with a lower surface of the semiconductor substrate, and an N type buffer region that is provided between the collector region and the drift region, and has a higher carrier concentration than that in the drift region, and the hydrogen containing region is included in the buffer region.Type: ApplicationFiled: October 22, 2020Publication date: February 11, 2021Inventors: Yoshiharu KATO, Toru AJIKI, Tohru SHIRAKAWA, Misaki TAKAHASHI, Kaname MITSUZUKA, Takashi YOSHIMURA, Yuichi ONOZAWA, Hiroshi TAKISHITA, Soichi YOSHIDA
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Publication number: 20200350170Abstract: A semiconductor device is provided. The semiconductor device includes: a first region formed on a front surface side of a semiconductor substrate; a drift region formed closer to a rear surface of the semiconductor substrate than the first region is; a buffer region that: is formed closer to the rear surface of the semiconductor substrate than the drift region is; and has one or more peaks of an impurity concentration that are higher than an impurity concentration of the drift region; and a lifetime killer that: is arranged on a rear surface side of the semiconductor substrate; and shortens a carrier lifetime, wherein a peak of a concentration of the lifetime killer is arranged between: a peak that is closest to a front surface of the semiconductor substrate among the peaks of the impurity concentration in the buffer region; and the rear surface of the semiconductor substrate.Type: ApplicationFiled: July 20, 2020Publication date: November 5, 2020Inventors: Takahiro TAMURA, Yuichi ONOZAWA, Misaki TAKAHASHI
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Patent number: 10763252Abstract: A semiconductor device including a semiconductor substrate and a plurality of trench structures formed on the semiconductor substrate. The semiconductor substrate includes a first element region for forming an insulated gate bipolar transistor therein, and a second element region for forming a diode therein, the semiconductor substrate constituting a drift layer. The plurality of trench structures includes a plurality of gate trench structures provided on a front surface side of the first element region, each gate trench structure having an electrode provided therein that is based on a gate potential, and a plurality of floating trench structures provided on a front surface side of the second element region, each floating trench structure having an electrode provided therein that has a floating potential.Type: GrantFiled: January 30, 2018Date of Patent: September 1, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Akio Yamano, Misaki Takahashi
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Insulated-gate bipolar transistor (IGBT) or diode including buffer region and lifetime killer region
Patent number: 10734230Abstract: A semiconductor device is provided. The semiconductor device includes: a first region formed on a front surface side of a semiconductor substrate; a drift region formed closer to a rear surface of the semiconductor substrate than the first region is; a buffer region that: is formed closer to the rear surface of the semiconductor substrate than the drift region is; and has one or more peaks of an impurity concentration that are higher than an impurity concentration of the drift region; and a lifetime killer that: is arranged on a rear surface side of the semiconductor substrate; and shortens a carrier lifetime, wherein a peak of a concentration of the lifetime killer is arranged between: a peak that is closest to a front surface of the semiconductor substrate among the peaks of the impurity concentration in the buffer region; and the rear surface of the semiconductor substrate.Type: GrantFiled: January 24, 2018Date of Patent: August 4, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Takahiro Tamura, Yuichi Onozawa, Misaki Takahashi -
Publication number: 20200161460Abstract: Provided is a semiconductor device that includes: a first conductivity type anode region provided in the semiconductor substrate in the diode region; a second conductivity type drift region that is located below the anode region in the semiconductor substrate; a second conductivity type accumulation region that is located between the anode region and the drift region in a depth direction of the semiconductor substrate; and an insulating film that includes a plurality of contact portions extending in a first direction and is provided on an upper surface of the semiconductor substrate; wherein the plurality of contact portions include a first contact portion provided in the diode region; and the first contact portion includes a first non-overlapping region in which an end of the first contact portion and the accumulation region in the first direction do not overlap in the depth direction.Type: ApplicationFiled: January 27, 2020Publication date: May 21, 2020Inventors: Yuichi HARADA, Misaki TAKAHASHI, Kouta YOKOYAMA
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Publication number: 20200161457Abstract: Provided is a semiconductor device that includes a first conductivity type well region below a gate runner portion, wherein a diode region includes first contact portions, a first conductivity type anode region, and a second conductivity type cathode region; wherein the well region contacts the diode region in the first direction, and when an end of the well region, an end of at least one of first contact portions, and an end of the cathode region that face one another in the first direction are imaginary projected on an upper surface of the semiconductor substrate, a first distance is longer than a second distance, the first distance being a distance between the end of the well region and the end of the cathode region, and the second distance being a distance between the end of the well region and the end of the at least one first contact portion.Type: ApplicationFiled: January 27, 2020Publication date: May 21, 2020Inventors: Misaki TAKAHASHI, Yuichi HARADA, Kouta YOKOYAMA