Patents by Inventor Misaki Takahashi

Misaki Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10622350
    Abstract: Provided is a semiconductor device including transistor regions and diode regions each extending from a given one edge of an active region to a different edge of the active region, a first-conductivity-type pad well region in contact with a gate runner region shaped like a rectangular ring and provided within the gate runner region, and first-conductivity-type collector regions provided in the transistor regions in a one-to-one correspondence and second-conductivity-type cathode regions provided in the diode regions in a one-to-one correspondence. Here, an edge of the pad well region at which the pad well region ends in an arranging direction extends in an extending direction, and the arranging direction is orthogonal to the extending direction in which the transistor regions and the diode regions extend, and any one or more of the collector regions are positioned below the edge of the pad well region.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: April 14, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Akinori Kanetake, Misaki Takahashi
  • Publication number: 20200098747
    Abstract: A semiconductor device is provided, including a semiconductor substrate, wherein the semiconductor substrate has: a diode region; a transistor region; and a boundary region that is positioned between the diode region and the transistor region, the boundary region includes a defect region that is provided: at a predetermined depth position on a front surface-side of the semiconductor substrate; and to extend from an end portion of the boundary region adjacent to the diode region toward the transistor region, at least part of the boundary region does not include a first conductivity-type emitter region exposed on a front surface of the semiconductor substrate, and the transistor region does not have the defect region below a mesa portion that is sandwiched by two adjacent trench portions, and closest to the boundary region among the mesa portions having the emitter region.
    Type: Application
    Filed: November 29, 2019
    Publication date: March 26, 2020
    Inventors: Takahiro TAMURA, Yuichi ONOZAWA, Misaki TAKAHASHI, Kaname MITSUZUKA, Daisuke OZAKI, Akinori KANETAKE
  • Publication number: 20200091329
    Abstract: To provide a semiconductor device having excellent conduction characteristics of a transistor portion and a diode portion. The semiconductor device having a transistor portion and a diode portion, the semiconductor device includes: a drift region of a first conductivity type provided on a semiconductor substrate, a first well region of a second conductivity type provided on an upper surface side of the semiconductor substrate, an anode region of the second conductivity provided on the upper surface side of the semiconductor substrate, in the diode portion, and a first high concentration region of a second conductivity type which is provided in contact with a first well region between the anode region and the first well region, and has a higher doping concentration than the anode region.
    Type: Application
    Filed: November 24, 2019
    Publication date: March 19, 2020
    Inventors: Kaname MITSUZUKA, Misaki TAKAHASHI, Tohru SHIRAKAWA
  • Publication number: 20190252374
    Abstract: Provided is a semiconductor device including transistor regions and diode regions each extending from a given one edge of an active region to a different edge of the active region, a first-conductivity-type pad well region in contact with a gate runner region shaped like a rectangular ring and provided within the gate runner region, and first-conductivity-type collector regions provided in the transistor regions in a one-to-one correspondence and second-conductivity-type cathode regions provided in the diode regions in a one-to-one correspondence. Here, an edge of the pad well region at which the pad well region ends in an arranging direction extends in an extending direction, and the arranging direction is orthogonal to the extending direction in which the transistor regions and the diode regions extend, and any one or more of the collector regions are positioned below the edge of the pad well region.
    Type: Application
    Filed: December 6, 2018
    Publication date: August 15, 2019
    Inventors: Akinori KANETAKE, Misaki TAKAHASHI
  • Patent number: 10205012
    Abstract: Provided is a semiconductor device comprising: a semiconductor substrate; a plurality of first trench portions formed at a front surface side of the semiconductor substrate and extending in a predetermined extending direction in a planar view; an emitter region of a first conductivity type formed between adjacent trenches of the plurality of first trench portions at the front surface side of the semiconductor substrate; a first contact region of a second conductivity type formed between the adjacent trenches of the plurality of first trench portions, the first contact region and the emitter region being arranged alternately in the extending direction; and a second contact region of a second conductivity type formed above the first contact region to be apart from the emitter region and having a higher doping concentration than the first contact region.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: February 12, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Yuichi Onozawa, Kota Ohi, Tatsuya Naito, Misaki Takahashi
  • Publication number: 20180269202
    Abstract: A semiconductor device including a semiconductor substrate and a plurality of trench structures formed on the semiconductor substrate. The semiconductor substrate includes a first element region for forming an insulated gate bipolar transistor therein, and a second element region for forming a diode therein, the semiconductor substrate constituting a drift layer. The plurality of trench structures includes a plurality of gate trench structures provided on a front surface side of the first element region, each gate trench structure having an electrode provided therein that is based on a gate potential, and a plurality of floating trench structures provided on a front surface side of the second element region, each floating trench structure having an electrode provided therein that has a floating potential.
    Type: Application
    Filed: January 30, 2018
    Publication date: September 20, 2018
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Akio YAMANO, Misaki TAKAHASHI
  • Publication number: 20180261594
    Abstract: A semiconductor device includes an IGBT region and a FWD region. The IGBT region includes a plurality of trench structures, p-type base regions provided between the trench structures, n+ emitter regions provided on the p-type base regions, an interlayer insulating film provided on the n+ emitter regions and containing contact holes therein, and an emitter electrode connected to the n+ emitter regions through the contact holes. In a portion of the IGBT region that abuts the FWD region, the interlayer insulating film covers and insulates the trench structures without having the contact holes.
    Type: Application
    Filed: February 6, 2018
    Publication date: September 13, 2018
    Applicant: Fuji Electric Co., Ltd.
    Inventors: Akio YAMANO, Misaki TAKAHASHI
  • Publication number: 20180166279
    Abstract: A semiconductor device is provided. The semiconductor device includes: a first region formed on a front surface side of a semiconductor substrate; a drift region formed closer to a rear surface of the semiconductor substrate than the first region is; a buffer region that: is formed closer to the rear surface of the semiconductor substrate than the drift region is; and has one or more peaks of an impurity concentration that are higher than an impurity concentration of the drift region; and a lifetime killer that: is arranged on a rear surface side of the semiconductor substrate; and shortens a carrier lifetime, wherein a peak of a concentration of the lifetime killer is arranged between: a peak that is closest to a front surface of the semiconductor substrate among the peaks of the impurity concentration in the buffer region; and the rear surface of the semiconductor substrate.
    Type: Application
    Filed: January 24, 2018
    Publication date: June 14, 2018
    Inventors: Takahiro TAMURA, Yuichi ONOZAWA, Misaki TAKAHASHI
  • Patent number: 9793343
    Abstract: To improve withstand capability of a semiconductor device during reverse recovery, provided is a semiconductor device including a semiconductor substrate having a first conduction type; a first region having a second conduction type that is formed in a front surface of the semiconductor substrate; a second region having a second conduction type that is formed adjacent to the first region in the front surface of the semiconductor substrate and has a higher concentration than the first region; a third region having a second conduction type that is formed adjacent to the second region in the front surface of the semiconductor substrate and has a higher concentration than the second region; an insulating film that covers a portion of the second region and the third region; and an electrode connected to the second region and the first region that are not covered by the insulating film.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: October 17, 2017
    Assignee: FUJI ELECTRIC., LTD.
    Inventors: Eri Ogawa, Hiroki Wakimoto, Misaki Takahashi, Yuichi Onozawa
  • Publication number: 20170263740
    Abstract: Provided is a semiconductor device comprising: a semiconductor substrate; a plurality of first trench portions formed at a front surface side of the semiconductor substrate and extending in a predetermined extending direction in a planar view; an emitter region of a first conductivity type formed between adjacent trenches of the plurality of first trench portions at the front surface side of the semiconductor substrate; a first contact region of a second conductivity type formed between the adjacent trenches of the plurality of first trench portions, the first contact region and the emitter region being arranged alternately in the extending direction; and a second contact region of a second conductivity type formed above the first contact region to be apart from the emitter region and having a higher doping concentration than the first contact region.
    Type: Application
    Filed: March 9, 2017
    Publication date: September 14, 2017
    Inventors: Yuichi ONOZAWA, Kota OHI, Tatsuya Naito, Misaki TAKAHASHI
  • Publication number: 20170077217
    Abstract: To improve withstand capability of a semiconductor device during reverse recovery, provided is a semiconductor device including a semiconductor substrate having a first conduction type; a first region having a second conduction type that is formed in a front surface of the semiconductor substrate; a second region having a second conduction type that is formed adjacent to the first region in the front surface of the semiconductor substrate and has a higher concentration than the first region; a third region having a second conduction type that is formed adjacent to the second region in the front surface of the semiconductor substrate and has a higher concentration than the second region; an insulating film that covers a portion of the second region and the third region; and an electrode connected to the second region and the first region that are not covered by the insulating film.
    Type: Application
    Filed: September 6, 2016
    Publication date: March 16, 2017
    Inventors: Eri OGAWA, Hiroki WAKIMOTO, Misaki TAKAHASHI, Yuichi ONOZAWA
  • Patent number: 9582910
    Abstract: A display-screen-data editing apparatus including: a storing unit that stores therein a variable table in which a device and a comment for the device are associated with each other; a table generating unit that generates a history table by analyzing screen data and furthermore generating a history-inclusive variable table by combining the variable table and the history table; and a search processing unit that performs a search process on a device and a comment in the history-inclusive variable table on a basis of a character string input to one of a device input field and a comment input field and displays extracted device or comment as a list, wherein a device or a comment that is selected from the displayed list is input to the device input field and the comment input field.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: February 28, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventor: Misaki Takahashi
  • Publication number: 20140333628
    Abstract: A display-screen-data editing apparatus including: a storing unit that stores therein a variable table in which a device and a comment for the device are associated with each other; a table generating unit that generates a history table by analyzing screen data and furthermore generating a history-inclusive variable table by combining the variable table and the history table; and a search processing unit that performs a search process on a device and a comment in the history-inclusive variable table on a basis of a character string input to one of a device input field and a comment input field and displays extracted device or comment as a list, wherein a device or a comment that is selected from the displayed list is input to the device input field and the comment input field.
    Type: Application
    Filed: December 28, 2011
    Publication date: November 13, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Misaki Takahashi