Patents by Inventor Mitsuhiro Aizawa
Mitsuhiro Aizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240136265Abstract: An interconnect substrate includes an insulating layer, an electrode disposed on the insulating layer and having a first surface not covered with the insulating layer, and an external connection terminal disposed on the first surface of the electrode, wherein the electrode has a recess in the first surface, wherein the external connection terminal includes a first conductor filling the recess and a second conductor disposed on the first conductor, and a melting point of the first conductor is higher than a melting point of the second conductor, and wherein a metal material of the electrode is different from a metal material of the first conductor.Type: ApplicationFiled: October 17, 2023Publication date: April 25, 2024Inventors: Kei MURAYAMA, Mitsuhiro AIZAWA
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Publication number: 20240021556Abstract: A connection structural body includes a first connection terminal, a second connection terminal facing the first connection terminal, and a bonding member bonding the first connection terminal and the second connection terminal. The bonding member includes an intermetallic compound layer that is formed by a roughened-surface metal film, structured by deposits of metal piled over one another such that a large number of pores are formed, and a solder layer that is disposed in the pores.Type: ApplicationFiled: July 6, 2023Publication date: January 18, 2024Inventor: Mitsuhiro Aizawa
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Patent number: 11817381Abstract: A semiconductor device includes a lower substrate, a semiconductor element mounted on an upper surface of the lower substrate, an upper substrate disposed on an upper surface of the semiconductor element, an encapsulation resin disposed between the lower substrate and the upper substrate and encapsulating the semiconductor element, a wiring layer disposed on an upper surface of the upper substrate, and a covering resin formed from a material having a coefficient of thermal expansion similar to a coefficient of thermal expansion of the encapsulation resin. The covering resin is disposed on the upper surface of the upper substrate and covers a side surface of the wiring layer.Type: GrantFiled: July 15, 2021Date of Patent: November 14, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kei Murayama, Mitsuhiro Aizawa, Amane Kaneko, Kiyoshi Oi
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Publication number: 20230317650Abstract: A connection structural body includes: a first connection terminal including a first opposing surface; a first roughened-surface copper metal film formed on the first opposing surface; a second connection terminal including a second opposing surface facing the first opposing surface; and a second roughened-surface copper metal film formed on the second opposing surface and bonded to the first roughened-surface copper metal film. The first roughened-surface copper metal film includes a structure in which first deposits of copper are piled over one another on the first opposing surface. The second roughened-surface copper metal film includes a structure in which second deposits of copper are piled over one another on the second opposing surface. A bonded portion of the first and second roughened-surface copper metal films includes a structure in which the first deposits and the second deposits are piled such that the bonded portion includes pores.Type: ApplicationFiled: February 22, 2023Publication date: October 5, 2023Inventors: Mitsuhiro AIZAWA, Susumu ARAI
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Patent number: 11706877Abstract: A composite wiring substrate includes a first wiring substrate including a first connection terminal, a second wiring substrate including a second connection terminal facing the first connection terminal, and a joint material joining the first connection terminal and the second connection terminal. The first outline of the first connection terminal is inside the second outline of the second connection terminal in a plan view. The joint material includes a first portion formed of an intermetallic alloy of copper and tin, and contacting each of the first connection terminal and the second connection terminal, and a second portion formed of an alloy of tin and bismuth, and including a portion between the first outline and the second outline in the plan view. The second portion contains the bismuth at a higher concentration than in the eutectic composition of a tin-bismuth alloy, and is separated from the second connection terminal.Type: GrantFiled: May 2, 2022Date of Patent: July 18, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Shota Miki, Koyuki Kawakami, Kiyoshi Oi, Kei Murayama, Mitsuhiro Aizawa
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Publication number: 20220361342Abstract: A composite wiring substrate includes a first wiring substrate including a first connection terminal, a second wiring substrate including a second connection terminal facing the first connection terminal, and a joint material joining the first connection terminal and the second connection terminal. The first outline of the first connection terminal is inside the second outline of the second connection terminal in a plan view. The joint material includes a first portion formed of an intermetallic alloy of copper and tin, and contacting each of the first connection terminal and the second connection terminal, and a second portion formed of an alloy of tin and bismuth, and including a portion between the first outline and the second outline in the plan view. The second portion contains the bismuth at a higher concentration than in the eutectic composition of a tin-bismuth alloy, and is separated from the second connection terminal.Type: ApplicationFiled: May 2, 2022Publication date: November 10, 2022Inventors: Shota MIKI, Koyuki KAWAKAMI, Kiyoshi OI, Kei MURAYAMA, Mitsuhiro AIZAWA
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Publication number: 20220028774Abstract: A semiconductor device includes a lower substrate, a semiconductor element mounted on an upper surface of the lower substrate, an upper substrate disposed on an upper surface of the semiconductor element, an encapsulation resin disposed between the lower substrate and the upper substrate and encapsulating the semiconductor element, a wiring layer disposed on an upper surface of the upper substrate, and a covering resin formed from a material having a coefficient of thermal expansion similar to a coefficient of thermal expansion of the encapsulation resin. The covering resin is disposed on the upper surface of the upper substrate and covers a side surface of the wiring layer.Type: ApplicationFiled: July 15, 2021Publication date: January 27, 2022Inventors: Kei MURAYAMA, Mitsuhiro AIZAWA, Amane KANEKO, Kiyoshi OI
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Patent number: 10959328Abstract: A wiring substrate includes: a wiring structure that includes a wiring layer and an insulating layer laminated; a plurality of first posts that are formed along a periphery of a predetermined area on a surface of the wiring structure, and that protrude out from the surface of the wiring structure; and a second post that is connected to the wiring layer at a position surrounded by the first posts, and that protrudes out from the surface of the wiring structure. The first posts are formed such that a post arranged at a central portion of a side constituting the periphery of the predetermined area is lower in height from the surface of the wiring structure than posts arranged at both ends of the side.Type: GrantFiled: June 29, 2020Date of Patent: March 23, 2021Inventors: Naoki Kobayashi, Kei Murayama, Mitsuhiro Aizawa, Shota Miki
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Publication number: 20210007220Abstract: A wiring substrate includes: a wiring structure that includes a wiring layer and an insulating layer laminated; a plurality of first posts that are formed along a periphery of a predetermined area on a surface of the wiring structure, and that protrude out from the surface of the wiring structure; and a second post that is connected to the wiring layer at a position surrounded by the first posts, and that protrudes out from the surface of the wiring structure. The first posts are formed such that a post arranged at a central portion of a side constituting the periphery of the predetermined area is lower in height from the surface of the wiring structure than posts arranged at both ends of the side.Type: ApplicationFiled: June 29, 2020Publication date: January 7, 2021Inventors: Naoki Kobayashi, Kei Murayama, Mitsuhiro Aizawa, Shota Miki
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Patent number: 10319963Abstract: A battery includes a supporting substrate, resin layers, and a plurality of cells. Each resin layer includes a first resin and has 0.5 MPa to 10 MPa in tensile strength. The cells are stacked on the supporting substrate with the resin layers between the cells.Type: GrantFiled: June 3, 2014Date of Patent: June 11, 2019Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kazuyuki Kubota, Mitsuhiro Aizawa, Yoshihiro Ihara
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Publication number: 20180204807Abstract: A semiconductor device includes: a circuit board including a substrate made of an inorganic material, and a resin insulating layer formed on the substrate; a semiconductor element mounted on a main face of the circuit board through a bump; and a resin layer formed on the main face to extend along sides or diagonal lines of the circuit board, wherein a thermal expansion of the resin layer is larger than that of the substrate.Type: ApplicationFiled: January 10, 2018Publication date: July 19, 2018Inventor: Mitsuhiro Aizawa
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Patent number: 9488677Abstract: A probe card includes a wiring substrate including an opening portion and a connection pad arranged on an upper face of the wiring substrate located on the periphery of the opening portion, a resin portion formed in the opening portion of the wiring substrate, and the resin portion formed of a material having elasticity, a contact terminal arranged to protrude from the lower face of the resin portion, and wire buried in the resin portion and connecting the contact terminal and the connection pad, wherein the contact terminal is formed of an end part of the wire, and is formed integrally with the wire.Type: GrantFiled: October 28, 2013Date of Patent: November 8, 2016Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Ryo Fukasawa, Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Mitsuhiro Aizawa
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Patent number: 9476913Abstract: A probe card includes a wiring substrate including an opening portion, a first connection pad, and a second connection pad arranged in an opposite area to the first connection pad, a resin portion formed in the opening portion, a first wire buried in the resin portion, in which one end is connected to the first connection pad and other end constitutes a first contact terminal, and a second wire buried in the resin portion, in which one end is connected to the second connection pad and other end constitutes a second contact terminal, wherein the first and second wires extend on one line, and the first and second contact terminals are arranged on the one line, and the first and second contact terminals are gathered to be separated such that the first and second contact terminals touch one electrode pad of a text object with a pair.Type: GrantFiled: July 10, 2014Date of Patent: October 25, 2016Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Ryo Fukasawa, Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Mitsuhiro Aizawa
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Patent number: 9470718Abstract: A probe card, includes, a wiring substrate having an opening portion and including a first connection pad and a second connection pad, the first connection pad being arranged at a periphery of the opening portion, the second connection pad being arranged to be adjacent to the first connection pad, a resin portion formed inside the opening portion of the wiring substrate, a first wire buried in the resin portion and having one end connected to the first connection pad and the other end constituting a first contact terminal protruding from a lower face of the resin portion, and a second wire buried in the resin portion and having one end connected to the second connection pad and the other end constituting a second contact terminal protruding from a lower face of the resin portion.Type: GrantFiled: July 10, 2014Date of Patent: October 18, 2016Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Ryo Fukasawa, Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Mitsuhiro Aizawa
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Patent number: 9374889Abstract: An interposer includes a wiring member including a first inorganic substrate, a reinforcement member including a second inorganic substrate, and an adhesive part interposed between the wiring member and the reinforcement member. Each of the first and second inorganic substrates includes first and second surfaces. Multiple inorganic insulating layers formed on the first surface of each of the first and second inorganic substrates have the same layer configuration and are arranged symmetrically in a vertical direction with the adhesive part centered therebetween. An inorganic insulating layer and an organic insulating layer formed on the second surface of each of the first and second inorganic substrates have the same layer configuration and are arranged symmetrically in the vertical direction with the adhesive part. An organic insulating layer formed on the second surface of each of the first and second inorganic substrates is an outermost insulating layer.Type: GrantFiled: March 10, 2014Date of Patent: June 21, 2016Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kei Murayama, Mitsuhiro Aizawa, Koji Hara
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Patent number: 9137890Abstract: There is provided a wiring board. The wiring board includes: a first insulating layer; a plurality of wiring patterns on the first insulating layer so as to be spaced apart from each other; a plating layer on at least one of the wiring patterns; a second insulating layer containing silicone therein and having an opening, wherein an outermost surface of the plating layer is exposed from the opening and serves as a connection pad; and a silica film on the outermost surface of the plating layer.Type: GrantFiled: February 11, 2014Date of Patent: September 15, 2015Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kazutaka Kobayashi, Mitsuhiro Aizawa, Hiroshi Shimizu, Mina Iwai
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Patent number: 9006894Abstract: There is provided a wiring board for mounting a light emitting element thereon. The wiring board includes: an insulating layer; a wiring pattern on the insulating layer; a reflecting layer on the insulating layer to cover the wiring pattern, wherein the light emitting element is to be mounted on a surface of the reflecting layer; and a silica film on the surface of the reflecting layer.Type: GrantFiled: March 12, 2014Date of Patent: April 14, 2015Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kazutaka Kobayashi, Yasuyoshi Horikawa, Mitsuhiro Aizawa, Koji Hara
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Publication number: 20150022230Abstract: A probe card includes a wiring substrate including an opening portion, a first connection pad, and a second connection pad arranged in an opposite area to the first connection pad, a resin portion formed in the opening portion, a first wire buried in the resin portion, in which one end is connected to the first connection pad and other end constitutes a first contact terminal, and a second wire buried in the resin portion, in which one end is connected to the second connection pad and other end constitutes a second contact terminal, wherein the first and second wires extend on one line, and the first and second contact terminals are arranged on the one line, and the first and second contact terminals are gathered to be separated such that the first and second contact terminals touch one electrode pad of a text object with a pair.Type: ApplicationFiled: July 10, 2014Publication date: January 22, 2015Inventors: Ryo FUKASAWA, Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Mitsuhiro AIZAWA
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Publication number: 20150022229Abstract: A probe card, includes, a wiring substrate having an opening portion and including a first connection pad and a second connection pad, the first connection pad being arranged at a periphery of the opening portion, the second connection pad being arranged to be adjacent to the first connection pad, a resin portion formed inside the opening portion of the wiring substrate, a first wire buried in the resin portion and having one end connected to the first connection pad and the other end constituting a first contact terminal protruding from a lower face of the resin portion, and a second wire buried in the resin portion and having one end connected to the second connection pad and the other end constituting a second contact terminal protruding from the lower face of the resin portion, wherein diameters of the first contact terminal and the second contact terminal are equal to diameters of the first wire and the second wire in the resin portion, and the first contact terminal and the second contact terminal are gType: ApplicationFiled: July 10, 2014Publication date: January 22, 2015Inventors: Ryo FUKASAWA, Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Mitsuhiro AIZAWA
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Publication number: 20140370365Abstract: A battery includes a supporting substrate, resin layers, and a plurality of cells. Each resin layer includes a first resin and has 0.5 MPa to 10 MPa in tensile strength. The cells are stacked on the supporting substrate with the resin layers between the cells.Type: ApplicationFiled: June 3, 2014Publication date: December 18, 2014Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kazuyuki KUBOTA, Mitsuhiro AIZAWA, Yoshihiro IHARA