Abstract: A battery includes a supporting substrate, resin layers, and a plurality of cells. Each resin layer includes a first resin and has 0.5 MPa to 10 MPa in tensile strength. The cells are stacked on the supporting substrate with the resin layers between the cells.

Abstract: An interposer includes a wiring member including a first inorganic substrate, a reinforcement member including a second inorganic substrate, and an adhesive part interposed between the wiring member and the reinforcement member. Each of the first and second inorganic substrates includes first and second surfaces. Multiple inorganic insulating layers formed on the first surface of each of the first and second inorganic substrates have the same layer configuration and are arranged symmetrically in a vertical direction with the adhesive part centered therebetween. An inorganic insulating layer and an organic insulating layer formed on the second surface of each of the first and second inorganic substrates have the same layer configuration and are arranged symmetrically in the vertical direction with the adhesive part. An organic insulating layer formed on the second surface of each of the first and second inorganic substrates is an outermost insulating layer.

Abstract: There is provided a wiring board for mounting a light emitting element thereon. The wiring board includes: an insulating layer; a wiring pattern on the insulating layer; a reflecting layer on the insulating layer to cover the wiring pattern, wherein the light emitting element is to be mounted on a surface of the reflecting layer; and a silica film on the surface of the reflecting layer.

Abstract: There is provided a wiring board. The wiring board includes: a first insulating layer; a plurality of wiring patterns on the first insulating layer so as to be spaced apart from each other; a plating layer on at least one of the wiring patterns; a second insulating layer containing silicone therein and having an opening, wherein an outermost surface of the plating layer is exposed from the opening and serves as a connection pad; and a silica film on the outermost surface of the plating layer.

Abstract: A semiconductor package includes: a first wiring substrate; a first spacer on the first wiring substrate, wherein the first spacer has a rectangular shape; a second spacer on the first wiring substrate to be separated from the first spacer, wherein the second spacer has a rectangular shape; a second wiring substrate on the first spacer and the second spacer and having a first surface and a second surface which is opposite to the first surface, wherein the second wiring substrate has opposed sides; a first semiconductor chip on the first surface of the second wiring substrate; and a second semiconductor chip on the second surface of the second wiring substrate to be disposed between the first spacer and the second spacer. The opposed long sides of the first and second spacers are substantially parallel with the opposed sides of the second wiring substrate.

Abstract: A probe card includes a wiring substrate including an opening portion and a connection pad arranged on an upper face of the wiring substrate located on the periphery of the opening portion, a resin portion formed in the opening portion of the wiring substrate, and the resin portion formed of a material having elasticity, a contact terminal arranged to protrude from the lower face of the resin portion, and wire buried in the resin portion and connecting the contact terminal and the connection pad, wherein the contact terminal is formed of an end part of the wire, and is formed integrally with the wire.

Abstract: A plurality of chip sealing bodies stacked on a wiring substrate with a connection terminal. The chip sealing body includes a semiconductor chip having a semiconductor integrated circuit, a pad and a conductive connecting material, and a resin sealing the semiconductor chip. The chip sealing body is shaped into a cubic form in which a portion of the conductive connecting material except an end portion located on an external device side and all surfaces of semiconductor chip is sealed by the resin and the end portion of the conductive connecting material located on the external device side is exposed from the cubic form. A conductive bonding wire connects the end portions of the conductive connecting materials and the connection terminal respectively. A resin sealing material seals the plurality of chip sealing bodies, the conductive bonding wire, and the wiring substrate.

Abstract: A method of making a semiconductor chip stacked structure includes dicing a semiconductor wafer into semiconductor chips, the semiconductor chips respectively having a first surface and a second surface opposite thereto, the semiconductor chips having integrated circuits and pads on the first surfaces, arranging the semiconductor chips at intervals on a film having adhesive property, connecting the pads through joining members, sealing with resin the joining members and surfaces of the semiconductor chips excluding the second surfaces to produce a chip sealing structure, dividing the chip sealing structure to produce separate chip sealing structures having ends of the joining members exposed at surfaces thereof, removing the film to expose the second surfaces, stacking the chip sealing structures one over another and connecting the exposed ends of the joining members through a bonding wire to produce a chip stacked structure, and mounting the chip stacked structure on a wiring substrate.

Abstract: In a semiconductor inspecting device having a contact to be electrically connected to an electrode pad formed in a semiconductor device which is an object to be measured, and a substrate provided with the contact, the contact is provided obliquely to a main surface of the substrate.

Abstract: A semiconductor device includes a stacked chip structure provided on a board and made up of semiconductor chips that are stacked via insulators. Each semiconductor chip has an integrated circuit surface, pads provided on the integrated circuit surface, and conductive connecting members having a wave shape with first ends electrically connected to the pads, and second ends extending outwardly from the at least one edge part and electrically connected to the connection terminals on the board.

Abstract: A plurality of chip sealing bodies stacked on a wiring substrate with a connection terminal. The chip sealing body includes a semiconductor chip having a semiconductor integrated circuit, a pad and a conductive connecting material, and a resin sealing the semiconductor chip. The chip sealing body is shaped into a cubic form in which a portion of the conductive connecting material except an end portion located on an external device side and all surfaces of semiconductor chip is sealed by the resin and the end portion of the conductive connecting material located on the external device side is exposed from the cubic form. A conductive bonding wire connects the end portions of the conductive connecting materials and the connection terminal respectively. A resin sealing material seals the plurality of chip sealing bodies, the conductive bonding wire, and the wiring substrate.

Abstract: In a semiconductor inspecting device having a contact to be electrically connected to an electrode pad formed in a semiconductor device which is an object to be measured, and a substrate provided with the contact, the contact is provided obliquely to a main surface of the substrate.

Abstract: A method for production of a semiconductor package which enables uniform conduction processing for all through holes covered by the conduction processing without being limited to any specific structure, is free from surface relief shapes and internal voids, and enables conduction processing simply, in a short time, at a low cost utilizing existing facilities, wherein the conduction processing of the through holes includes a step of press fitting a conductor into the through holes by a ball bonder and a step of flattening the exposed heads of the press-fit conductors by coining.

Abstract: A method for production of a semiconductor package which enables uniform conduction processing for all through holes covered by the conduction processing without being limited to any specific structure, is free from surface relief shapes and internal voids, and enables conduction processing simply, in a short time, at a low cost utilizing existing facilities, wherein the conduction processing of the through holes includes a step of press fitting a conductor into the through holes by a ball bonder and a step of flattening the exposed heads of the press-fit conductors by coining.

Abstract: A semiconductor device including a substrate and a lens panel that is fixed to an upper surface of the substrate with bumps is provided. An optical transmitter is fixed to the bottom surface of the substrate with bumps and a transparent resin material. Metal films are formed on the upper and bottom surfaces of the substrate at points where the bumps for fixing the lens panel or the optical transmitter connect with the substrate. In the manufacturing process of the semiconductor device, adjustment operations are performed for arranging the optical axes of lens portions of the lens panel to be coaxial with the optical axes of laser diodes of the optical transmitter. The lens panel may be connected to the metal film formed on the upper surface of the substrate by propagating an ultrasonic wave to the bumps implemented between the lens panel and the substrate when alignment marks of the lens panel and alignment marks of the substrate correspond.

Abstract: An assembly of semiconductor devices, wherein the device comprises a chip with electrodes on one side for electrical connection with an external circuit, and a flexible base comprising an insulation film having an inner opening and outer openings outside the inner opening, and the conductor pattern comprising a plurality of inner leads having an end extending to the inner opening of the film, and the outer leads being positioned to bridge the outer opening of the film; and the chip being mounted on the flexible base by bonding the lead-out electrodes thereof to the ends of inner leads, and wherein the devices are assembled to be connected with each other through the outer leads of semiconductor devices which are adjacent to each other, and the semiconductor chips, which face a substrate on which the assembly is to be mounted, have external connection electrodes, on which an external connection terminal for mounting is provided.

Abstract: A novel assembly of semiconductor devices useful for miniaturization of electronic appliances, wherein the semiconductor device comprises a semiconductor chip and a flexible base, the semiconductor chip being provided with lead-out electrodes on one side thereof for electrical connection with an external circuit, and the flexible base comprising an insulation film and a conductor pattern, the insulation film having an inner opening and outer openings arranged outside the inner opening, and the conductor pattern being located on one side of the insulation film, and comprising a plurality of pairs of an inner lead and an outer lead, the inner and outer leads in each pair being connected with each other, the inner lead having an end extending to the inner opening of the insulation film and being exposed therein, and the outer leads being positioned so as to bridge the outer opening of the insulation film and being exposed therein; and the semiconductor chip being mounted on the flexible base by bonding the lead-