Abstract: According to one embodiment, a wafer includes a substrate and a crystal layer. The substrate includes a plurality of SiC regions including SiC and an inter-SiC region including Si provided between the SiC regions. The crystal layer includes a first layer, and a first intermediate layer provided between the substrate and the first layer in a first direction. The first layer includes SiC and nitrogen. The first intermediate layer includes SiC and nitrogen. A second concentration of nitrogen in the first intermediate layer is higher than a first concentration of nitrogen in the first layer.

Abstract: A semiconductor device of the embodiment includes: a first region provided in a silicon carbide layer; and a second region provided around the first region in the silicon carbide layer, the second region having a higher concentration of at least one kind of a lifetime killer impurity selected from the group consisting of B (boron), Ti (titanium), V (vanadium), He (helium) and H+ (proton) than a concentration of a lifetime killer impurity in the first region.

Abstract: A semiconductor device of the embodiment includes: a first region provided in a silicon carbide layer; and a second region provided around the first region in the silicon carbide layer, the second region having a higher concentration of at least one kind of a lifetime killer impurity selected from the group consisting of B (boron), Ti (titanium), V (vanadium), He (helium) and H+ (proton) than a concentration of a lifetime killer impurity in the first region.

Abstract: A semiconductor device of the embodiment includes: a first region provided in a silicon carbide layer; and a second region provided around the first region in the silicon carbide layer, the second region having a higher concentration of at least one kind of a lifetime killer impurity selected from the group consisting of B (boron), Ti (titanium), V (vanadium), He (helium) and H+ (proton) than a concentration of a lifetime killer impurity in the first region.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region including first and second compounds including silicon and carbon. The first semiconductor region includes first to third regions contacting the second semiconductor region. The third region is positioned between the first and second regions. The first and second regions include a first element. The first element includes at least one selected from the group consisting of second and third elements. The second element includes at least one selected from the group consisting of Ar, Kr, Xe, and Rn. The third element includes at least one selected from the group consisting of Cl, Br, I, and At. The third region does not include the first element, or a concentration of the first element in the third region is lower than concentrations of the first element in the first and second regions.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region including a first compound including silicon and carbon, and a second semiconductor region including a second compound including silicon and carbon. The first semiconductor region includes first to third regions contacting the second semiconductor region. The third region is positioned between the first region and the second region. The first region and the second region include germanium. The third region does not include germanium, or a concentration of germanium in the third region is lower than a concentration of germanium in the first region and lower than a concentration of germanium in the second region.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region including first and second compounds including silicon and carbon. The first semiconductor region includes first to third regions contacting the second semiconductor region. The third region is positioned between the first and second regions. The first and second regions include a first element. The first element includes at least one selected from the group consisting of second and third elements. The second element includes at least one selected from the group consisting of Ar, Kr, Xe, and Rn. The third element includes at least one selected from the group consisting of Cl, Br, I, and At. The third region does not include the first element, or a concentration of the first element in the third region is lower than concentrations of the first element in the first and second regions.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region including a first compound including silicon and carbon, and a second semiconductor region including a second compound including silicon and carbon. The first semiconductor region includes first to third regions contacting the second semiconductor region. The third region is positioned between the first region and the second region. The first region and the second region include germanium. The third region does not include germanium, or a concentration of germanium in the third region is lower than a concentration of germanium in the first region and lower than a concentration of germanium in the second region.

Abstract: A semiconductor device of the embodiment includes: a first region provided in a silicon carbide layer; and a second region provided around the first region in the silicon carbide layer, the second region having a higher concentration of at least one kind of a lifetime killer impurity selected from the group consisting of B (boron), Ti (titanium), V (vanadium), He (helium) and H+ (proton) than a concentration of a lifetime killer impurity in the first region.

Abstract: A nitride semiconductor wafer includes a silicon substrate, a first layer, a second layer, a third layer, a fourth layer, a fifth layer, and a sixth layer. The first layer is provided on the silicon substrate. The second layer is provided on the first layer. The third layer is provided on the second layer. The fourth layer is provided on the third layer. The fifth layer is provided on the fourth layer. The sixth layer is provided on the fifth layer. A composition ratio x4 of the fourth layer decreases in a first direction from the third layer toward the fifth layer. A maximum value of the composition ratio x4 is not more than a composition ratio of the third layer. A minimum value of the composition ratio x4 is not less than a composition ratio of the fifth layer.

Abstract: A nitride semiconductor wafer includes a silicon substrate, a first layer, a second layer, a third layer, a fourth layer, a fifth layer, and a sixth layer. The first layer is provided on the silicon substrate. The second layer is provided on the first layer. The third layer is provided on the second layer. The fourth layer is provided on the third layer. The fifth layer is provided on the fourth layer. The sixth layer is provided on the fifth layer. A composition ratio x4 of the fourth layer decreases in a first direction from the third layer toward the fifth layer. A maximum value of the composition ratio x4 is not more than a composition ratio of the third layer. A minimum value of the composition ratio x4 is not less than a composition ratio of the fifth layer.

Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structure body and an electrode. The stacked structure body has a first conductivity type first semiconductor layer including a nitride-based semiconductor, a second conductivity type second semiconductor layer including a nitride-based semiconductor, and a light emitting layer provided between the first and second semiconductor layers. The electrode has first, second and third metal layers. The first metal layer is provided on the second semiconductor layer and includes silver or silver alloy. The second metal layer is provided on the first metal layer and includes at least one element of platinum, palladium, rhodium, iridium, ruthenium, osmium. The third metal layer is provided on the second metal layer. A thickness of the third metal layer along a direction from the first toward the second semiconductor layer is equal to or greater than a thickness of the second metal layer.

Abstract: A nitride semiconductor wafer includes a silicon substrate, a first layer, a second layer, a third layer, a fourth layer, a fifth layer, and a sixth layer. The first layer is provided on the silicon substrate. The second layer is provided on the first layer. The third layer is provided on the second layer. The fourth layer is provided on the third layer. The fifth layer is provided on the fourth layer. The sixth layer is provided on the fifth layer. A composition ratio x4 of the fourth layer decreases in a first direction from the third layer toward the fifth layer. A maximum value of the composition ratio x4 is not more than a composition ratio of the third layer. A minimum value of the composition ratio x4 is not less than a composition ratio of the fifth layer.

Abstract: A semiconductor light emitting device includes: a stacked structure unit including first and second semiconductor layers and a light emitting layer between the first and second semiconductor layers; a first electrode on a first major surface of the stacked structure unit on the second semiconductor layer side to connect to the first semiconductor layer; and a second electrode on the first major surface of the stacked structure unit to connect to the second semiconductor layer. The second electrode includes: a first film on the second semiconductor layer and a second film on a rim of the first film. The first film has a relatively lower contact resistance with the second semiconductor layer, compared to the second film. A distance from an outer edge of the second film to the first film is smaller at a central portion than at a peripheral portion of the first major surface.

Abstract: According to one embodiment, a semiconductor light emitting element includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer including a nitride semiconductor, a light emitting unit, a first layer, a second layer, and a third layer. The light emitting unit is provided between the n-type and p-type semiconductor layers, and includes a first well layer including a nitride semiconductor. The first layer is provided between the first well layer and the p-type semiconductor layer, and includes Alx1Ga1-x1-y1Iny1N having a first Mg concentration. The second layer is provided between the first layer and the p-type semiconductor layer, and includes Alx2Ga1-x2-y2Iny2N having a second Mg concentration higher than the first Mg concentration. The third layer is provided between the second layer and the p-type semiconductor layer, and includes Alx3Ga1-x3-y3Iny3N having a third Mg concentration higher than the first Mg concentration and lower than the second Mg concentration.

Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structure body, first and second electrodes. The stacked structure body includes first and second semiconductor layers and a light emitting layer provided between the second and first semiconductor layers, and has first and second major surfaces. The first electrode has a first contact part coming into contact with the first semiconductor layer. The second electrode has a part coming into contact with the second semiconductor layer. A surface of the first semiconductor layer on a side of the first major surface has a first part having a part overlapping a contact surface with the first semiconductor layer and a second part having a part overlapping the second semiconductor layer. The second part has irregularity. A pitch of the irregularity is longer than a peak wavelength of emission light. The first part has smaller irregularity than the second part.

Abstract: A method for manufacturing a semiconductor light emitting apparatus includes causing a semiconductor light emitting device and a mounting member to face each other.

Abstract: A nitride semiconductor wafer includes a silicon substrate, a first layer, a second layer, a third layer, a fourth layer, a fifth layer, and a sixth layer. The first layer is provided on the silicon substrate. The second layer is provided on the first layer. The third layer is provided on the second layer. The fourth layer is provided on the third layer. The fifth layer is provided on the fourth layer. The sixth layer is provided on the fifth layer. A composition ratio x4 of the fourth layer decreases in a first direction from the third layer toward the fifth layer. A maximum value of the composition ratio x4 is not more than a composition ratio of the third layer. A minimum value of the composition ratio x4 is not less than a composition ratio of the fifth layer.

Abstract: A semiconductor light emitting element, includes: a laminated structure body including an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer; a p-side electrode provided in contact with the p-type semiconductor layer; an n-side electrode provided in contact with the n-type semiconductor layer; a highly reflective insulating layer provided in contact with the n-type semiconductor layer and having a higher reflectance than a reflectance of the n-side electrode; and an upper metal layer provided on at least a part of the n-side electrode and on at least a part of the highly reflective insulating layer and electrically connected to the n-side electrode. An area of a region of the n-side electrode in contact with the n-type semiconductor layer is smaller than an area of a region of the highly reflective insulating layer sandwiched between the n-type semiconductor layer and the upper metal layer.

Abstract: A nitride semiconductor wafer includes a silicon substrate, a first layer, a second layer, a third layer, a fourth layer, a fifth layer, and a sixth layer. The first layer is provided on the silicon substrate. The second layer is provided on the first layer. The third layer is provided on the second layer. The fourth layer is provided on the third layer. The fifth layer is provided on the fourth layer. The sixth layer is provided on the fifth layer. A composition ratio x4 of the fourth layer decreases in a first direction from the third layer toward the fifth layer. A maximum value of the composition ratio x4 is not more than a composition ratio of the third layer. A minimum value of the composition ratio x4 is not less than a composition ratio of the fifth layer.