Patents by Inventor Mitsuhiro Kushibe

Mitsuhiro Kushibe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150255684
    Abstract: A semiconductor light-emitting device includes: a laminated structure, a first electrode, a second electrode and a dielectric laminated film. The laminated structure includes, a first semiconductor layer, a second semiconductor layer, and a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer, in which the second semiconductor layer and the light-emitting layer are selectively removed and a part of the first semiconductor layer is exposed to a first main surface on the side of the second semiconductor layer.
    Type: Application
    Filed: May 26, 2015
    Publication date: September 10, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi KATSUNO, Yasuo OHBA, Kei KANEKO, Mitsuhiro KUSHIBE
  • Patent number: 9130106
    Abstract: A method for manufacturing a semiconductor light emitting apparatus having first semiconductor layer and second semiconductor layer sandwiching a light emitting layer, first and second electrodes provided on respective major surfaces of the first semiconductor and second semiconductor layers to connect thereto, stacked dielectric films having different refractive indexes provided on portions of the major surfaces not covered by the first and second electrodes, and a protruding portion erected on at least a portion of a rim of at least one of the first and second electrodes. The mounting member includes a connection member connected to at least one of the first and second electrodes. The method includes causing the semiconductor light emitting device and a mounting member to face each other, and causing the connection member to contact and join to the at least one of the first and second electrodes using the protruding portion as a guide.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: September 8, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Kei Kaneko, Mitsuhiro Kushibe
  • Patent number: 9130127
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structure body, first and second electrodes. The stacked structure body includes first and second semiconductor layers and a light emitting layer provided between the second and first semiconductor layers, and has first and second major surfaces. The first electrode has a first contact part coming into contact with the first semiconductor layer. The second electrode has a part coming into contact with the second semiconductor layer. A surface of the first semiconductor layer on a side of the first major surface has a first part having a part overlapping a contact surface with the first semiconductor layer and a second part having a part overlapping the second semiconductor layer. The second part has irregularity. A pitch of the irregularity is longer than a peak wavelength of emission light. The first part has smaller irregularity than the second part.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: September 8, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Satoshi Mitsugi, Shinji Yamada, Mitsuhiro Kushibe, Kei Kaneko
  • Patent number: 9093614
    Abstract: A semiconductor light emitting element, includes: a laminated structure body including an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer; a p-side electrode provided in contact with the p-type semiconductor layer; an n-side electrode provided in contact with the n-type semiconductor layer; a highly reflective insulating layer provided in contact with the n-type semiconductor layer and having a higher reflectance than a reflectance of the n-side electrode; and an upper metal layer provided on at least a part of the n-side electrode and on at least a part of the highly reflective insulating layer and electrically connected to the n-side electrode. An area of a region of the n-side electrode in contact with the n-type semiconductor layer is smaller than an area of a region of the highly reflective insulating layer sandwiched between the n-type semiconductor layer and the upper metal layer.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: July 28, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Kei Kaneko, Mitsuhiro Kushibe
  • Patent number: 9070837
    Abstract: A semiconductor light-emitting device includes: a laminated structure, a first electrode, a second electrode and a dielectric laminated film. The laminated structure includes, a first semiconductor layer, a second semiconductor layer, and a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer, in which the second semiconductor layer and the light-emitting layer are selectively removed and a part of the first semiconductor layer is exposed to a first main surface on the side of the second semiconductor layer.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: June 30, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Kei Kaneko, Mitsuhiro Kushibe
  • Patent number: 9059374
    Abstract: A method for manufacturing a semiconductor light emitting device is provided. The device includes: an n-type semiconductor layer; a p-type semiconductor layer; and a light emitting unit provided between the n-type semiconductor layer and the p-type semiconductor layer. The method includes: forming a buffer layer made of a crystalline AlxGa1?xN (0.8?x?1) on a first substrate made of c-plane sapphire and forming a GaN layer on the buffer layer; stacking the n-type semiconductor layer, the light emitting unit, and the p-type semiconductor layer on the GaN layer; and separating the first substrate by irradiating the GaN layer with a laser having a wavelength shorter than a bandgap wavelength of GaN from the first substrate side through the first substrate and the buffer layer.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: June 16, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuo Ohba, Kei Kaneko, Toru Gotoda, Hiroshi Katsuno, Mitsuhiro Kushibe
  • Patent number: 9012888
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first layer of n-type and a second layer of p-type including a nitride semiconductor, a light emitting unit provided between the first and second layers, a first stacked structure provided between the first layer and the light emitting unit, and a second stacked structure provided between the first layer and the first stacked structure. The light emitting unit includes barrier layers and a well layer provided between the barrier layers. The first stacked structure includes third layers including a nitride semiconductor, and fourth layers stacked with the third layers and including GaInN. The fourth layers have a thinner thickness than the well layer. The second stacked structure includes fifth layers including a nitride semiconductor, and sixth layers stacked with the fifth layers and including GaInN. The sixth layers have a thinner thickness than the well layer.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: April 21, 2015
    Assignee: Kabushiki kaisha Toshiba
    Inventors: Mitsuhiro Kushibe, Yasuo Ohba, Hiroshi Katsuno, Kei Kaneko, Shinji Yamada
  • Patent number: 9006706
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting layer, a first intermediate layer, and a second intermediate layer. The n-type and p-type semiconductor layers include a nitride semiconductor. The light emitting layer is provided between the n-type and p-type semiconductor layers, and includes barrier layers and a well layer. A bandgap energy of the well layer is less than that of the barrier layers. The first intermediate layer is provided between the light emitting layer and the p-type semiconductor layer. A bandgap energy of the first intermediate layer is greater than that of the barrier layers. The second intermediate layer includes first and second portions. The first portion is in contact with a p-side barrier layer most proximal to the p-type semiconductor layer. The second portion is in contact with the first intermediate layer.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: April 14, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hung Hung, Yoshiyuki Harada, Jongil Hwang, Mitsuhiro Kushibe, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20150084069
    Abstract: According to one embodiment, a semiconductor light emitting element includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer including a nitride semiconductor, a light emitting unit, a first layer, a second layer, and a third layer. The light emitting unit is provided between the n-type and p-type semiconductor layers, and includes a first well layer including a nitride semiconductor. The first layer is provided between the first well layer and the p-type semiconductor layer, and includes Alx1Ga1-x1-y1Iny1N having a first Mg concentration. The second layer is provided between the first layer and the p-type semiconductor layer, and includes Alx2Ga1-x2-y2Iny2N having a second Mg concentration higher than the first Mg concentration. The third layer is provided between the second layer and the p-type semiconductor layer, and includes Alx3Ga1-x3-y3Iny3N having a third Mg concentration higher than the first Mg concentration and lower than the second Mg concentration.
    Type: Application
    Filed: August 26, 2014
    Publication date: March 26, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro KUSHIBE, Kei KANEKO, Yasuo OHBA, Hiroshi KATSUNO, Shinji YAMADA
  • Publication number: 20150072459
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structure body and an electrode. The stacked structure body has a first conductivity type first semiconductor layer including a nitride-based semiconductor, a second conductivity type second semiconductor layer including a nitride-based semiconductor, and a light emitting layer provided between the first and second semiconductor layers. The electrode has first, second and third metal layers. The first metal layer is provided on the second semiconductor layer and includes silver or silver alloy. The second metal layer is provided on the first metal layer and includes at least one element of platinum, palladium, rhodium, iridium, ruthenium, osmium. The third metal layer is provided on the second metal layer. A thickness of the third metal layer along a direction from the first toward the second semiconductor layer is equal to or greater than a thickness of the second metal layer.
    Type: Application
    Filed: November 19, 2014
    Publication date: March 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Shinji Yamada, Mitsuhiro Kushibe, Kei Kaneko
  • Publication number: 20150056729
    Abstract: A method for manufacturing a semiconductor light emitting apparatus having first semiconductor layer and second semiconductor layer sandwiching a light emitting layer, first and second electrodes provided on respective major surfaces of the first semiconductor and second semiconductor layers to connect thereto, stacked dielectric films having different refractive indexes provided on portions of the major surfaces not covered by the first and second electrodes, and a protruding portion erected on at least a portion of a rim of at least one of the first and second electrodes. The mounting member includes a connection member connected to at least one of the first and second electrodes. The method includes causing the semiconductor light emitting device and a mounting member to face each other, and causing the connection member to contact and join to the at least one of the first and second electrodes using the protruding portion as a guide.
    Type: Application
    Filed: October 3, 2014
    Publication date: February 26, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi KATSUNO, Yasuo Ohba, Kei Kaneko, Mitsuhiro Kushibe
  • Patent number: 8963177
    Abstract: A semiconductor light emitting element, includes: a laminated structure body including an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer; a p-side electrode provided in contact with the p-type semiconductor layer; an n-side electrode provided in contact with the n-type semiconductor layer; a highly reflective insulating layer provided in contact with the n-type semiconductor layer and having a higher reflectance than a reflectance of the n-side electrode; and an upper metal layer provided on at least a part of the n-side electrode and on at least a part of the highly reflective insulating layer and electrically connected to the n-side electrode. An area of a region of the n-side electrode in contact with the n-type semiconductor layer is smaller than an area of a region of the highly reflective insulating layer sandwiched between the n-type semiconductor layer and the upper metal layer.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: February 24, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Kei Kaneko, Mitsuhiro Kushibe
  • Patent number: 8937325
    Abstract: According to one embodiment, a semiconductor device includes a first layer of n-type including a nitride semiconductor, a second layer of p-type including a nitride semiconductor, a light emitting unit, and a first stacked body. The light emitting unit is provided between the first and second layers. The first stacked body is provided between the first layer and the light emitting unit. The first stacked body includes a plurality of third layers including AlGaInN, and a plurality of fourth layers alternately stacked with the third layers and including GaInN. The first stacked body has a first surface facing the light emitting unit. The first stacked body has a depression provided in the first surface. A part of the light emitting unit is embedded in a part of the depression. A part of the second layer is disposed on the part of the light emitting unit.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: January 20, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro Kushibe, Yasuo Ohba, Hiroshi Katsuno, Kei Kaneko, Shinji Yamada
  • Patent number: 8921886
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structure body and an electrode. The stacked structure body has a first conductivity type first semiconductor layer including a nitride-based semiconductor, a second conductivity type second semiconductor layer including a nitride-based semiconductor, and a light emitting layer provided between the first and second semiconductor layers. The electrode has first, second and third metal layers. The first metal layer is provided on the second semiconductor layer and includes silver or silver alloy. The second metal layer is provided on the first metal layer and includes at least one element of platinum, palladium, rhodium, iridium, ruthenium, osmium. The third metal layer is provided on the second metal layer. A thickness of the third metal layer along a direction from the first toward the second semiconductor layer is equal to or greater than a thickness of the second metal layer.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: December 30, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Shinji Yamada, Mitsuhiro Kushibe, Kei Kaneko
  • Publication number: 20140361345
    Abstract: A nitride semiconductor wafer includes a silicon substrate, a first layer, a second layer, a third layer, a fourth layer, a fifth layer, and a sixth layer. The first layer is provided on the silicon substrate. The second layer is provided on the first layer. The third layer is provided on the second layer. The fourth layer is provided on the third layer. The fifth layer is provided on the fourth layer. The sixth layer is provided on the fifth layer. A composition ratio x4 of the fourth layer decreases in a first direction from the third layer toward the fifth layer. A maximum value of the composition ratio x4 is not more than a composition ratio of the third layer. A minimum value of the composition ratio x4 is not less than a composition ratio of the fifth layer.
    Type: Application
    Filed: February 7, 2014
    Publication date: December 11, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kei KANEKO, Mitsuhiro Kushibe, Hiroshi Katsuno, Shinji Yamada, Jumpei Tajima, Yasuo Ohba
  • Patent number: 8890193
    Abstract: A method for manufacturing a semiconductor light emitting apparatus having first semiconductor layer and second semiconductor layer sandwiching a light emitting layer, first and second electrodes provided on respective major surfaces of the first semiconductor and second semiconductor layers to connect thereto, stacked dielectric films having different refractive indexes provided on portions of the major surfaces not covered by the first and second electrodes, and a protruding portion erected on at least a portion of a rim of at least one of the first and second electrodes. The mounting member includes a connection member connected to at least one of the first and second electrodes. The method includes causing the semiconductor light emitting device and a mounting member to face each other, and causing the connection member to contact and join to the at least one of the first and second electrodes using the protruding portion as a guide.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: November 18, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Kei Kaneko, Mitsuhiro Kushibe
  • Publication number: 20140327027
    Abstract: A semiconductor light emitting element, includes: a laminated structure body including an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer; a p-side electrode provided in contact with the p-type semiconductor layer; an n-side electrode provided in contact with the n-type semiconductor layer; a highly reflective insulating layer provided in contact with the n-type semiconductor layer and having a higher reflectance than a reflectance of the n-side electrode; and an upper metal layer provided on at least a part of the n-side electrode and on at least a part of the highly reflective insulating layer and electrically connected to the n-side electrode. An area of a region of the n-side electrode in contact with the n-type semiconductor layer is smaller than an area of a region of the highly reflective insulating layer sandwiched between the n-type semiconductor layer and the upper metal layer.
    Type: Application
    Filed: July 16, 2014
    Publication date: November 6, 2014
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Kei Kaneko, Mitsuhiro Kushibe
  • Patent number: 8791498
    Abstract: A semiconductor light emitting device, includes: a stacked structural unit including a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting layer provided therebetween; and an electrode including a first and second metal layers, the first metal layer including silver or silver alloy and being provided on a side of the second semiconductor layer opposite to the light emitting layer, the second metal layer including at least one element selected from gold, platinum, palladium, rhodium, iridium, ruthenium, and osmium and being provided on a side of the first metal layer opposite to the second semiconductor layer. A concentration of the element in a region including an interface between the first and second semiconductor layers is higher than that of the element in a region of the first metal layer distal to the interface.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: July 29, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Kei Kaneko, Mitsuhiro Kushibe
  • Patent number: 8729583
    Abstract: According to one embodiment, a semiconductor light-emitting device includes a first semiconductor layer, a second semiconductor layer, a light-emitting layer, a third semiconductor layer and a first electrode. The first semiconductor layer of a first conductivity type has a first major surface provided with a first surface asperity. The second semiconductor layer of a second conductivity type is provided on an opposite side of the first semiconductor layer from the first major surface. The light-emitting layer is provided between the first and second semiconductor layers. The first semiconductor layer is disposed between a third semiconductor layer and the light-emitting layer. The third semiconductor layer has an impurity concentration lower than an impurity concentration of the first semiconductor layer, and includes an opening exposing the first surface asperity.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: May 20, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Mitsuhiro Kushibe, Kei Kaneko, Shinji Yamada
  • Patent number: 8692228
    Abstract: A semiconductor light emitting device includes a first layer including at least one of n-type GaN and n-type AlGaN; a second layer including Mg-containing p-type AlGaN; and a light emitting section provided between the first and second layers. The light emitting section includes barrier layers of Si-containing AlxGa1-x-yInyN (0?x, 0?y, x+y?1), and a well layer provided between the barrier layers and made of GaInN or AlGaInN. The barrier layers have a nearest barrier layer nearest to the second layer among the barrier layers and a far barrier layer. The nearest barrier layer includes a first portion made of Si-containing AlxGa1-x-yInyN (0?x, 0?y, x+y?1), and a second portion provided between the first portion and the second layer and made of AlxGa1-x-yInyN (0?x, 0?y, x+y?1). The Si concentration in the second portion is lower than those in the first portion and in the far barrier layer.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: April 8, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kei Kaneko, Yasuo Ohba, Hiroshi Katsuno, Mitsuhiro Kushibe