Patents by Inventor Mitsunaga Saito

Mitsunaga Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190296215
    Abstract: A multilayer ultrasonic transducer of an embodiment includes: a plurality of stacked oscillators; external electrodes disposed on outer exposed surfaces of two oscillators disposed in the outermost layers out of the plurality of oscillators; and a plurality of internal electrodes each disposed between two of the plurality of oscillators. There are provided electrode regions in which the plurality of internal electrodes are arranged such that the number of layers of the internal electrodes in a direction in which the oscillators are stacked gradiently increases from an inner region toward an outer peripheral region of the plurality of oscillators, and ultrasonic waves emitted from the plurality of oscillators are focused toward at least the inner region.
    Type: Application
    Filed: September 14, 2018
    Publication date: September 26, 2019
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuyoshi KOBAYASHI, Noriko Yamamoto, Yasuharu Hosono, Mitsunaga Saito, Kazuhiro Itsumi, Akiko Hirao, Tomio Ono
  • Publication number: 20190285589
    Abstract: A parameter estimation method, comprises: acquiring appearance information including a shape information and a position information of at least one package; vibrating the at least one package at least at one position selected in accordance with the appearance information, and acquiring at least one data showing a vibration of the at least one package, and estimating a value of at least one parameter of the at least one package in accordance with a relation between the at least one data and the at least one parameter.
    Type: Application
    Filed: September 10, 2018
    Publication date: September 19, 2019
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akiko HIRAO, Satoshi TAKAYAMA, Tomio ONO, Noriko YAMAMOTO, Yasuharu HOSONO, Tsuyoshi KOBAYASHI, Kazuhiro ITSUMI, Mitsunaga SAITO
  • Publication number: 20190081190
    Abstract: The present embodiments provide a transparent electrode having a laminate structure of: a metal oxide layer having an amorphous structure and electroconductivity, and a metal nanowire layer; and further comprising an auxiliary metal wiring. The auxiliary metal wiring covers a part of the metal nanowire layer or of the metal oxide layer, and is connected to the metal nanowire layer.
    Type: Application
    Filed: March 13, 2018
    Publication date: March 14, 2019
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Katsuyuki NAITO, Naomi SHIDA, Mitsunaga SAITO, Takeshi NllMOTO
  • Publication number: 20190027622
    Abstract: The present embodiments provide a transparent electrode having a laminate structure of: a first metal oxide layer having an amorphous structure and electroconductivity, a metal layer made of a metallic material containing silver or copper, a second metal oxide layer having an amorphous structure and electroconductivity, and a third metal oxide layer having an amorphous structure and continuity, stacked in this order.
    Type: Application
    Filed: March 13, 2018
    Publication date: January 24, 2019
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naomi Shida, Katsuyuki Naito, Mitsunaga Saito, Takeshi Niimoto
  • Patent number: 10090468
    Abstract: According to one embodiment, a photoelectric conversion element includes a first electrode, a second electrode, a photoelectric conversion layer and a first layer. The photoelectric conversion layer is provided between the first electrode and the second electrode. The first layer is provided between the first electrode and the photoelectric conversion layer. The first layer includes at least a first metal oxide. The first layer has a plurality of orientation planes. At least one of the orientation planes satisfies the relationship L1>L2, where L1 is a length of the one of the plurality of orientation planes, and L2 is a thickness of the first layer along a first direction. The first direction is from the first electrode toward the second electrode.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: October 2, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Gotanda, Hyangmi Jung, Atsuko Iida, Mitsunaga Saito, Yoshihiko Nakano
  • Publication number: 20170077402
    Abstract: A photoelectric conversion material dispersion liquid of an embodiment includes: perovskite crystal particles having a composition represented as ABX3, where A is a monovalent cation of an amine compound, B is a divalent cation of a metal element, and X is a monovalent anion of a halogen element, and having an average particle diameter of not less than 10 nm nor more than 10000 nm; and a dispersion medium which is composed of a poor solvent to the perovskite crystal particles, and in which the perovskite crystal particles are dispersed.
    Type: Application
    Filed: August 30, 2016
    Publication date: March 16, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Haruhi OOOKA, Hideyuki NAKAO, Mitsunaga SAITO
  • Publication number: 20160380221
    Abstract: According to one embodiment, a photoelectric conversion element includes a first interconnect, a second interconnect, a photoelectric conversion layer and an insulating layer. The second interconnect is separated from the first interconnect. The photoelectric conversion layer is provided between the first interconnect and the second interconnect. The insulating layer is arranged with the first interconnect. A face formed by the first interconnect and the insulating layer is substantially flat. The face contacts the photoelectric conversion layer.
    Type: Application
    Filed: September 13, 2016
    Publication date: December 29, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takeshi GOTANDA, Shigehiko Mori, Mitsunaga Saito, Haruhi Cooka, Kenji Todori, Hideyuki Nakao, Satoshi Takayama
  • Publication number: 20160285022
    Abstract: According to one embodiment, a photoelectric conversion element includes a first electrode, a second electrode, a photoelectric conversion layer and a first layer. The photoelectric conversion layer is provided between the first electrode and the second electrode. The first layer is provided between the first electrode and the photoelectric conversion layer. The first layer includes at least a first metal oxide. The first layer has a plurality of orientation planes. At least one of the orientation planes satisfies the relationship L1>L2, where L1 is a length of the one of the plurality of orientation planes, and L2 is a thickness of the first layer along a first direction. The first direction is from the first electrode toward the second electrode.
    Type: Application
    Filed: March 15, 2016
    Publication date: September 29, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takeshi GOTANDA, Hyangmi JUNG, Atsuko IIDA, Mitsunaga SAITO, Yoshihiko NAKANO
  • Patent number: 9296848
    Abstract: According to one embodiment, a polymer material includes two or more different repeating units each containing a quinoxaline backbone. At least one of the repeating units includes a halogen atom.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: March 29, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroki Iwanaga, Fumihiko Aiga, Masahiro Hosoya, Mitsunaga Saito, Haruhi Oooka, Akihiko Ono
  • Patent number: 9178171
    Abstract: According to one embodiment, there is provided a method for manufacturing a photovoltaic cell. The method includes forming a structure including a pair of electrodes which are arranged apart from each other, and a hetero-junction type photoelectric conversion layer interposed between the electrodes and containing a p-type semiconductor and a n-type semiconductor, and annealing the photoelectric conversion layer thermally while applying an AC voltage having a frequency of 0.01 kHz or more and less than 1 kHz to control a mixed state of the p-type semiconductor and n-type semiconductor in the photoelectric conversion layer.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: November 3, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mitsunaga Saito, Masahiro Hosoya
  • Publication number: 20150228919
    Abstract: According to one embodiment, there is provided an organic photovoltaic cell including substrate having a plurality of inclined surfaces and a plurality of solar cells formed on the inclined surfaces of the substrate. Each of the solar cells includes a pair of electrodes and a bulk heterojunction active layer interposed between the electrodes, the active layer containing a p-type organic semiconductor and an n-type organic semiconductor. An inclination of each of the inclined surfaces of the substrate against the horizontal plane is in the range of 60 to 89°, and the active layer exhibits a transmission of light within visible wavelength range of 3% or greater.
    Type: Application
    Filed: April 24, 2015
    Publication date: August 13, 2015
    Inventors: Mitsunaga SAITO, Masahiro HOSOYA, Michihiko INABA
  • Publication number: 20150155507
    Abstract: According to one embodiment, there is provided a method for manufacturing a photovoltaic cell. The method includes forming a structure including a pair of electrodes which are arranged apart from each other, and a hetero-junction type photoelectric conversion layer interposed between the electrodes and containing a p-type semiconductor and a n-type semiconductor, and annealing the photoelectric conversion layer thermally while applying an AC voltage having a frequency of 0.01 kHz or more and less than 1 kHz to control a mixed state of the p-type semiconductor and n-type semiconductor in the photoelectric conversion layer.
    Type: Application
    Filed: February 4, 2015
    Publication date: June 4, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mitsunaga SAITO, Masahiro HOSOYA
  • Patent number: 8980672
    Abstract: According to one embodiment, there is provided a method for manufacturing a photovoltaic cell. The method includes forming a structure including a pair of electrodes which are arranged apart from each other, and a hetero-junction type photoelectric conversion layer interposed between the electrodes and containing a p-type semiconductor and a n-type semiconductor, and annealing the photoelectric conversion layer thermally while applying an AC voltage having a frequency of 0.01 kHz or more and less than 1 kHz to control a mixed state of the p-type semiconductor and n-type semiconductor in the photoelectric conversion layer.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: March 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsunaga Saito, Masahiro Hosoya
  • Patent number: 8907207
    Abstract: A solar cell module according to an embodiment includes a solar cell device and a support structure supporting the solar cell device. The solar cell device is a belt-like solar cell device including first portions arranged in one direction such that major surfaces thereof face each other, and a second portion interposed between the first portions. The edges of the first portions that correspond to a pair of long sides of the solar cell device are parallel to each other. Two adjacent first portions incline forwardly and backwardly with respect to the one direction. The second portion includes one or more planar or curved surfaces to connect the two adjacent first portions to each other.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: December 9, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhi Oooka, Mitsunaga Saito, Masahiro Hosoya, Hiroki Iwanaga, Michihiko Inaba
  • Publication number: 20130213461
    Abstract: According to one embodiment, there is provided a method for manufacturing a photovoltaic cell. The method includes forming a structure including a pair of electrodes which are arranged apart from each other, and a hetero-junction type photoelectric conversion layer interposed between the electrodes and containing a p-type semiconductor and a n-type semiconductor, and annealing the photoelectric conversion layer thermally while applying an AC voltage having a frequency of 0.01 kHz or more and less than 1 kHz to control a mixed state of the p-type semiconductor and n-type semiconductor in the photoelectric conversion layer.
    Type: Application
    Filed: August 21, 2012
    Publication date: August 22, 2013
    Inventors: Mitsunaga SAITO, Masahiro HOSOYA
  • Publication number: 20120248878
    Abstract: According to one embodiment, a polymer material includes two or more different repeating units each containing a quinoxaline backbone. At least one of the repeating units includes a halogen atom.
    Type: Application
    Filed: March 26, 2012
    Publication date: October 4, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroki Iwanaga, Fumihiko Aiga, Masahiro Hosoya, Mitsunaga Saito, Haruhi Oooka, Akihiko Ono
  • Publication number: 20120234389
    Abstract: A solar cell module according to an embodiment includes a solar cell device and a support structure supporting the solar cell device. The solar cell device is a belt-like solar cell device including first portions arranged in one direction such that major surfaces thereof face each other, and a second portion interposed between the first portions. The edges of the first portions that correspond to a pair of long sides of the solar cell device are parallel to each other. Two adjacent first portions incline forwardly and backwardly with respect to the one direction. The second portion includes one or more planar or curved surfaces to connect the two adjacent first portions to each other.
    Type: Application
    Filed: March 16, 2012
    Publication date: September 20, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Haruhi Oooka, Mitsunaga Saito, Masahiro Hosoya, Hiroki Iwanaga, Michihiko Inaba
  • Publication number: 20120214272
    Abstract: Certain embodiments provide a method of manufacturing an organic thin film solar cell comprising forming, on a first electrode, a first transport layer having an uneven pattern and a photoelectric conversion layer provided on a surface of the uneven pattern, forming a second transport layer on a second electrode, and bringing the uneven pattern having the photoelectric conversion layer is formed thereon into contact with the second transport layer to mold the second transport layer.
    Type: Application
    Filed: September 13, 2011
    Publication date: August 23, 2012
    Inventors: Tsukasa Azuma, Ikuo Yoneda, Akiko Mimotogi, Ryoichi Inanami, Mitsunaga Saito, Hiroki Iwanaga, Akiko Hirao
  • Publication number: 20120055536
    Abstract: According to one embodiment, there is provided an organic photovoltaic cell including substrate having a plurality of inclined surfaces and a plurality of solar cells formed on the inclined surfaces of the substrate. Each of the solar cells includes a pair of electrodes and a bulk heterojunction active layer interposed between the electrodes, the active layer containing a p-type organic semiconductor and an n-type organic semiconductor. An inclination of each of the inclined surfaces of the substrate against the horizontal plane is in the range of 60 to 89°, and the active layer exhibits a transmission of light within visible wavelength range of 3% or greater.
    Type: Application
    Filed: March 11, 2011
    Publication date: March 8, 2012
    Inventors: Mitsunaga Saito, Masahiro Hosoya, Michihiko Inaba
  • Patent number: 7648813
    Abstract: By using an intaglio plate for holding a pattern formed by a developing agent, a transfer device for transferring patterns developed on the intaglio plate to a transfer object medium, and a baking chamber for eliminating an electrode layer after transfer or heightening resistance thereof, the patterns developed on the intaglio plate are transferred onto the electrode layer disposed at the opposite side of the transfer object medium, and then heated in the baking chamber, whereby the electrode layer is eliminated or heightened in resistance.
    Type: Grant
    Filed: November 11, 2008
    Date of Patent: January 19, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsunaga Saito, Yasushi Shinjiyo, Yoshihiro Tajima, Koichi Ishii, Masahiro Hosoya, Ken Takahashi