Abstract: A semiconductor device includes a circuit substrate having a first surface on which a high-frequency circuit is located; a first metal layer disposed on a second surface of the circuit substrate; bump wirings on the first surface of the circuit substrate and electrically connected to the high-frequency circuit; a metal wall disposed on the first surface of the circuit substrate surrounding the high-frequency circuit; a wiring substrate having one surface on which substrate wirings corresponding to the bump wirings are located, the wiring substrate being disposed on the circuit substrate so that the substrate wirings are electrically connected to the bump wirings, and in contact with the metal wall, sealing a region including the high-frequency circuit; and a second metal layer disposed on a second surface of the wiring substrate. An electromagnetic shielding effect sufficient for use in a high-frequency circuit is obtained and fabricating cost is considerably reduced.

Abstract: A semiconductor device includes a semiconductor substrate having first and second main surfaces; a function element layer having heating element portions generating heat during operation, disposed on the first main surface that is thinned; and a plated heat sink of a heat conductive material, having a thickness equal to or greater than that of the semiconductor substrate, disposed on a circumferential region of the second main surface at the perimeter of the semiconductor substrate inward, on main heat generating regions of the second main surface including regions opposite the heating element portions, and on supporting regions of the second main surface connecting the circumferential region to the main heat generating regions. The semiconductor device maintains the heat generating function and the handling performance of the plated heat sink, reduces internal stress during plating and repeated stress produced by heat cycles during fabricating processes, and lessens chip breakage and plating peeling.

Abstract: A pattern transfer mask for use in an optical exposure process includes a transparent substrate having a surface; a light shielding film of a desired pattern disposed on the surface of the transparent substrate for shielding a part of a photoresist film from light transmitted through the mask and incident on the photoresist film and for transferring the desired pattern to the photoresist film; and a plurality of projections disposed at equal intervals on one side of and contacting the light shielding film pattern for reducing the intensity of light transmitted through the transparent substrate where the projections are present.

Abstract: In a method for producing a field effect transistor, a positive photoresist is deposited on a surface of a semiconductor substrate, the positive photoresist is exposed to light having an asymmetric intensity profile where a gate electrode is to be formed, the positive photoresist is converted into a negative photoresist, the negative photoresist is developed to form a pattern having an aperture opposite the gate electrode formation region of the substrate and asymmetric overhanging portions at the aperture, the semiconductor substrate is wet etched using the photoresist pattern as a mask to form a recess in the semiconductor substrate, and a gate metal is deposited using the photoresist pattern as a mask to form a gate electrode in the recess. Therefore, only one exposure process provides a photoresist pattern having asymmetric overhanging portions at the aperture of the pattern.

Abstract: A phase shift mask having a phase shifter with an edge angle ranging from 70.degree. to 85.degree. or 95.degree. to 110.degree. is used as a reticle in forming a resist pattern so that the exposure pattern applied to the resist has a light intensity distribution with constant light intensity contrast. A fine resist pattern having a predetermined width no more than the wavelength of the light used to form the pattern is produced precisely and reproducibly under constant developing conditions. In addition, there is provided on the side wall of the phase shifter of the phase shift mask a light shielding film which, due to its width, cannot be resolved as an exposure pattern itself. A region in which the light intensity is reduced from the constant level corresponding to the width of the light shielding film in the exposure pattern is formed by the projection lens.

Abstract: A method of manufacturing a field effect transistor comprises sequentially epitaxially growing on a semi-insulating compound semiconductor substrate an active layer of the first compound semiconductor having a first dopant concentration and a source layer of the first compound semiconductor having a second dopant concentration higher than the first dopant concentration, removing part of the source layer to leave a source region on the substrate, forming a gate electrode on the active layer spaced from the source region, forming a drain region in the substrate spaced from the gate electrode, on the opposite side of the gate electrode from the source region, adjacent to and in contact with the active layer and having a dopant concentration intermediate the dopant concentrations of the active layer and the source region, and forming source and drain electrodes on the source and drain regions, respectively.

Abstract: A method for fabrication a field effect transistor having a T-shaped gate electrode in a stepped recess includes forming an active layer in a substrate, forming two spaced apart ohmic electrodes on the active layer, forming spaced apart first side wall films on side walls of and between the two ohmic electrodes, forming a first recess by etching the active layer using the first side wall films as a mask, forming spaced apart second side wall films in the first recess contacting the first side wall films, forming a second recess narrower than and within the first recess by etching the active layer using the second side wall films as a mask, and forming a T-shaped gate in the second recess in contact with the second side wall films.

Abstract: A field effect transistor comprises a semi-insulating first compound semiconductor substrate having a surface, a first compound semiconductor active layer disposed at the surface of the substrate and having a first dopant concentration, a gate electrode disposed on the active layer, an epitaxial first compound semiconductor source region disposed on part of the active layer spaced from the gate electrode wherein the source region has a second dopant concentration higher than the first dopant concentration, a source electrode disposed on the source region, an electrically insulating layer disposed on the active layer between the contacting the source region and the gate electrode, a drain region disposed in the substrate adjacent to and in contact with the active layer on an opposite side of the gate electrode from the source region having a dopant concentration intermediate the dopant concentrations of the source region and the active layer, and a drain electrode disposed on the drain region.

Abstract: A method of producing a three-dimensional feature on a substrate and adjacent electrically insulating films comprising producing a resist on a portion of a surface of a substrate; etching the substrate to remove portions of the substrate not covered by the resist, leaving an etched surface on part of the substrate, and producing a three-dimensional feature having side walls intersecting the etched surface of the substrate underlying and undercutting the resist so that the resist includes overhanging portions spaced from the etched surface of the substrate, the three-dimensional feature having a height between the resist and the etched surface of the substrate; depositing, in a chemical vapor deposition process at a relatively low temperature, a discontinuous electrically insulating film to a thickness no greater than the height of the three-dimensional feature in a first segment on the resist and in a second segment, discontinuous from the first segment, on the etched surface of the substrate adjacent the thr

Abstract: A method of producing a field effect transistor includes forming a first conductivity type active layer having a first concentration of dopant impurities producing the first conductivity type in a semi-insulating semiconductor substrate, forming a mask film on the substrate on part of the first conductivity type region, depositing a gate metal film on the mask film and on the substrate not covered by the mask film, etching the gate metal film and leaving a portion of the gate metal film on the substrate adjacent to and contacting the mask film as a gate electrode, implanting dopant impurities producing a second conductivity type in the substrate using the mask film and the gate electrode as an implantation mask, annealing the substrate at an elevated temperature to activate the implanted dopant impurities whereby some of the implanted dopant impurities diffuse laterally within the substrate to produce a second conductivity type region in the substrate underneath part of the gate electrode, removing the mask f