Patents by Inventor Mitsuo Ikeda

Mitsuo Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11990417
    Abstract: A semiconductor memory device includes a first insulating layer, a first conductive layer, a first pillar, a second pillar, and a second insulating layer. The first conductive layer contains tungsten. The first conductive layer includes a first sub conductive layer and a second sub conductive layer. The first pillar and the second pillar pass through the first insulating layer and the first conductive layer. The second insulating layer divides the first insulating layer and the first conductive layer. The first sub conductive layer is in contact with the second sub conductive layer and is provided between the second sub conductive layer and the first insulating layer. A fluorine concentration in the first sub conductive layer is lower than that in the second sub conductive layer.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: May 21, 2024
    Assignee: Kioxia Corporation
    Inventors: Hiroki Kitayama, Mitsuo Ikeda, Daisuke Ikeno, Akihiro Kajita
  • Publication number: 20230413555
    Abstract: According to one embodiment, a semiconductor storage device includes a memory pillar extending in a first direction. The memory pillar includes a tunnel insulation film, a charge storage layer on the tunnel insulation film, and a first block insulation film on the charge storage layer. A conductor layer extends in a second direction intersecting the first direction to meet a portion of the memory pillar. The conductor layer includes a first layer comprising molybdenum and a second layer comprising tungsten. The first layer is between the memory pillar and the second layer in the second direction.
    Type: Application
    Filed: March 2, 2023
    Publication date: December 21, 2023
    Inventors: Hiroki KITAYAMA, Tomotaka ARIGA, Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
  • Patent number: 11764532
    Abstract: The metal graphite grounding brush including silver is made in slide contact with a peripheral surface of an axle and grounds the axle. The mass ratio between silver and carbonaceous components including a volatile component in the brush is silver above 30% and up to 90% and carbonaceous components less than 70% and down to 10%. When the total of silver and carbonaceous components is made 100%, the volatile component is down to 2.0% and up to 15%. The brush grounds the axle reliably so that noise from a car radio is reduced and has a long service life and mechanical strength.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: September 19, 2023
    Assignee: TRIS INC.
    Inventors: Mitsuo Ikeda, Hirotada Kanagawa, Mitsuhiro Hirota, Yoshihiro Nishimura
  • Publication number: 20230092843
    Abstract: According to one embodiment, a semiconductor device includes a tunnel insulating film, a charge trap film on the tunnel insulating film, and a block insulating film on the charge trap film. The charge trap film is between the tunnel insulating film and the block insulating film. A conductive film is on the block insulating film. The block insulating film is between the charge trap film and the conductive film. The conductive film includes a first metal film adjacent to the block insulating film and a second metal film on the first metal film. The first metal film is between the block insulating film and the second metal film. The first metal film has an interfacial roughness on a side facing the second metal film that is greater than an interfacial roughness on a side facing the block insulating film.
    Type: Application
    Filed: February 25, 2022
    Publication date: March 23, 2023
    Inventors: Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
  • Publication number: 20230046783
    Abstract: A semiconductor memory device includes a first insulating layer, a first conductive layer, a first pillar, a second pillar, and a second insulating layer. The first conductive layer contains tungsten. The first conductive layer includes a first sub conductive layer and a second sub conductive layer. The first pillar and the second pillar pass through the first insulating layer and the first conductive layer. The second insulating layer divides the first insulating layer and the first conductive layer. The first sub conductive layer is in contact with the second sub conductive layer and is provided between the second sub conductive layer and the first insulating layer. A fluorine concentration in the first sub conductive layer is lower than that in the second sub conductive layer.
    Type: Application
    Filed: December 14, 2021
    Publication date: February 16, 2023
    Applicant: Kioxia Corporation
    Inventors: Hiroki KITAYAMA, Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
  • Publication number: 20230006405
    Abstract: The metal graphite grounding brush including silver is made in slide contact with a peripheral surface of an axle and grounds the axle. The mass ratio between silver and carbonaceous components including a volatile component in the brush is silver above 30% and up to 90% and carbonaceous components less than 70% and down to 10%. When the total of silver and carbonaceous components is made 100%, the volatile component is down to 2.0% and up to 15%. The brush grounds the axle reliably so that noise from a car radio is reduced and has a long service life and mechanical strength.
    Type: Application
    Filed: November 18, 2020
    Publication date: January 5, 2023
    Inventors: Mitsuo IKEDA, Hirotada KANAGAWA, Mitsuhiro HIROTA, Yoshihiro NISHIMURA
  • Patent number: 11527478
    Abstract: A semiconductor device according to an embodiment includes: a semiconductor substrate; a conductor including tungsten (W) or molybdenum (Mo); a first film provided between the conductor and the semiconductor substrate and including titanium (Ti) and silicon (Si); an insulating layer surrounding the conductor; and a second film provided between the conductor and the insulating layer, surrounding the conductor, and including titanium (Ti) and nitrogen (N). A first distance between the semiconductor substrate and an end portion of the second film on a side opposite to the semiconductor substrate is smaller than a second distance between the semiconductor substrate and an end portion of the conductor on a side opposite to the semiconductor substrate.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: December 13, 2022
    Assignee: Kioxia Corporation
    Inventors: Mitsuo Ikeda, Daisuke Ikeno, Akihiro Kajita
  • Patent number: 11227934
    Abstract: According to one embodiment, a semiconductor device includes a substrate, a plurality of insulating films and a plurality of electrode films provided alternately on the substrate. The semiconductor device further includes a first insulating film, a first charge storage film, a third insulating film, a second charge storage film, a second insulating film, and a first semiconductor film that are sequentially provided along at least one side surface of each of the electrode films. The first charge storage film includes either (i) molybdenum, or (ii) titanium and nitrogen, and the second charge storage film includes a semiconductor film.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: January 18, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Mitsuo Ikeda, Daisuke Ikeno, Akihiro Kajita
  • Publication number: 20210296238
    Abstract: A semiconductor device according to an embodiment includes: a semiconductor substrate; a conductor including tungsten (W) or molybdenum (Mo); a first film provided between the conductor and the semiconductor substrate and including titanium (Ti) and silicon (Si); an insulating layer surrounding the conductor; and a second film provided between the conductor and the insulating layer, surrounding the conductor, and including titanium (Ti) and nitrogen (N). A first distance between the semiconductor substrate and an end portion of the second film on a side opposite to the semiconductor substrate is smaller than a second distance between the semiconductor substrate and an end portion of the conductor on a side opposite to the semiconductor substrate.
    Type: Application
    Filed: December 15, 2020
    Publication date: September 23, 2021
    Applicant: Kioxia Corporation
    Inventors: Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
  • Publication number: 20210083069
    Abstract: According to one embodiment, a semiconductor device includes a substrate, a plurality of insulating films and a plurality of electrode films provided alternately on the substrate. The semiconductor device further includes a first insulating film, a first charge storage film, a third insulating film, a second charge storage film, a second insulating film, and a first semiconductor film that are sequentially provided along at least one side surface of each of the electrode films. The first charge storage film includes either (i) molybdenum, or (ii) titanium and nitrogen, and the second charge storage film includes a semiconductor film.
    Type: Application
    Filed: March 2, 2020
    Publication date: March 18, 2021
    Applicant: KIOXIA CORPORATION
    Inventors: Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
  • Patent number: 8902981
    Abstract: A video signal generation apparatus for decoding a bit stream to generate a video signal, includes: a writing unit configured to write a flag value indicating whether a decoding target block has been coded by intra-coding or inter-coding in a specified bit position on one bit plane having a size the same as that of the decoding target block, to write information indicating a coding division form of the decoding target block in a specified common area on the one bit plane, and to write the coding information in a specified switch interpretation area on the one bit plane according to a data format conforming to the intra-coding if the decoding target block has been coded by intra-coding, and to write the coding information in the specified switch interpretation area according to a data format conforming to the inter-coding if the decoding target block has been coded by inter-coding; and a generation unit configured to generate a video signal by superimposing the one bit plane on a decoded image of the decoding
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: December 2, 2014
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Atsushi Sagata, Mitsuo Ikeda, Hiroaki Matsuda, Jirou Naganuma
  • Patent number: 8421278
    Abstract: In order to actualize a power feeding control apparatus and a charging system that are capable of efficiently charging plural storage batteries using a load-capacity controlled power source, the power feeding control apparatus 1 is configured so that a changeover control of the feeding of the alternating-current voltage to each charger will be performed monitoring the magnitude of the alternating current flowing in each of the plural chargers 4 to 6, therewith, the power feeding control apparatus performs the feeding changeover control comprising the steps of: feeding only to a predetermined one particular charger at the early stage of the start of charging, in which stage a large charging current flows into a storage battery; monitoring inflow current of the predetermined one particular charger; and switching power feeding to another charger to start feeding thereto when the inflow current reduces to the charging saturation current (a current still flowing even at the fully charged state).
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: April 16, 2013
    Assignees: Japan Atomic Energy Agency, Hitachi Industrial Equipment Systems Co., Ltd.
    Inventors: Yuzo Yamamoto, Kiichiro Uno, Hideyuki Higo, Mitsuo Ikeda
  • Patent number: 8052286
    Abstract: A method includes generating a plurality of beams that each illuminate a separate portion of a spatial light modulator. The spatial light modulator has a first dimension of a first length and a second dimension of a second length. Each of the beams spans a portion of the first length of the first dimension and a portion of the second length of the second dimension. The method also includes scrolling the plurality of beams along the second dimension of the spatial light modulator while maintaining at least a first gap between each of the plurality of beams.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: November 8, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Philip Scott King, Gregory James Hewlett, Roger Mitsuo Ikeda, Jeffrey Scott Farris
  • Publication number: 20110211167
    Abstract: A method includes generating a plurality of beams that each illuminate a separate portion of a spatial light modulator. The spatial light modulator has a first dimension of a first length and a second dimension of a second length. Each of the beams spans a portion of the first length of the first dimension and a portion of the second length of the second dimension. The method also includes scrolling the plurality of beams along the second dimension of the spatial light modulator while maintaining at least a first gap between each of the plurality of beams.
    Type: Application
    Filed: March 29, 2011
    Publication date: September 1, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Philip Scott King, Gregory James Hewlett, Roger Mitsuo Ikeda, Jeffrey Scott Farris
  • Publication number: 20110122948
    Abstract: A video signal generation apparatus for decoding a bit stream to generate a video signal, includes: a writing unit configured to write a flag value indicating whether a decoding target block has been coded by intra-coding or inter-coding in a specified bit position on one bit plane having a size the same as that of the decoding target block, to write information indicating a coding division form of the decoding target block in a specified common area on the one bit plane, and to write the coding information in a specified switch interpretation area on the one bit plane according to a data format conforming to the intra-coding if the decoding target block has been coded by intra-coding, and to write the coding information in the specified switch interpretation area according to a data format conforming to the inter-coding if the decoding target block has been coded by inter-coding; and a generation unit configured to generate a video signal by superimposing the one bit plane on a decoded image of the decoding
    Type: Application
    Filed: August 27, 2008
    Publication date: May 26, 2011
    Applicant: Nippon Telegraph and Telephone Corp.
    Inventors: Atsushi Sagata, Mitsuo Ikeda, Hiroaki Matsuda, Jirou Naganuma
  • Patent number: 7918563
    Abstract: A method includes generating a plurality of beams that each illuminate a separate portion of a spatial light modulator. The spatial light modulator has a first dimension of a first length and a second dimension of a second length. Each of the beams spans a portion of the first length of the first dimension and a portion of the second length of the second dimension. The method also includes scrolling the plurality of beams along the second dimension of the spatial light modulator while maintaining at least a first gap between each of the plurality of beams.
    Type: Grant
    Filed: August 1, 2007
    Date of Patent: April 5, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Philip Scott King, Gregory James Hewlett, Roger Mitsuo Ikeda, Jeffrey Scott Farris
  • Patent number: 7879586
    Abstract: A gene encoding a methylated catechin synthase that can effectively synthesize methylated catechins having high antiallergic activity. The gene encoding a methylated catechin synthase contains at least one nucleotide sequence selected from the group consisting of SEQ ID NOs: 1, 3 and 5.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: February 1, 2011
    Assignees: Incorporated Administrative Agency National Agriculture and Food Research Organization, Asahi Breweries, Ltd.
    Inventors: Mari Yamamoto, Masanobu Kirita, Manabu Sami, Mitsuo Ikeda
  • Patent number: 7840822
    Abstract: To make such an ordinary hub as works on the power fed through a power adapter connected to a commercial power supply be capable of maintaining its hub-function without interruption even when a commercial power supply failure occurs. The ordinary hub is connected to a line securement power supply unit 8 that is power-fed from a POE-compliant power-feeding hub 3 through a communication cable 5c, wherein a means for producing a power for an ordinary hub using a power fed through said communication cable 5c so as to feed produced power to an ordinary hub 2; and a storage battery 806, which stores power while power-receiving, to be used as the power source for producing a power for said ordinary hub when a power failure, are provided in said line securement power supply unit 8.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: November 23, 2010
    Assignee: Japan Atomic Energy Agency
    Inventors: Yuzo Yamamoto, Kazunori Tobita, Toshio Sawahata, Hideyuki Higo, Mitsuo Ikeda
  • Publication number: 20100079000
    Abstract: In order to actualize a power feeding control apparatus and a charging system that are capable of efficiently charging plural storage batteries using a load-capacity controlled power source, the power feeding control apparatus 1 is configured so that a changeover control of the feeding of the alternating-current voltage to each charger will be performed monitoring the magnitude of the alternating current flowing in each of the plural chargers 4 to 6, therewith, the power feeding control apparatus performs the feeding changeover control comprising the steps of: feeding only to a predetermined one particular charger at the early stage of the start of charging, in which stage a large charging current flows into a storage battery; monitoring inflow current of the predetermined one particular charger; and switching power feeding to another charger to start feeding thereto when the inflow current reduces to the charging saturation current (a current still flowing even at the fully charged state).
    Type: Application
    Filed: June 30, 2009
    Publication date: April 1, 2010
    Inventors: Yuzo Yamamota, Kiichiro Uno, Hideyuki Higo, Mitsuo Ikeda
  • Patent number: 7586230
    Abstract: In a commutator of a rotary electric machine, each of commutator segments has a low-resistive layer made of a low-resistive material and a high-resistive layer made of a high-resistive material having a specific resistance higher than that of the low-resistive material. The low-resistive material contains a carbonic material and a binder. The high-resistive material contains a carbonic material, a binder and an inorganic substance such as boron nitride. A mixing ratio of the inorganic material to the high-resistive material is more than 20 wt %. Alternatively, a brush, which makes contact with the commutator segments, can have the high-resistive layer and the low-resistive layer.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: September 8, 2009
    Assignees: Denso Corporation, Tris, Inc.
    Inventors: Hirotake Hamamatsu, Youichi Murakami, Ryoichi Honbo, Kenzo Kiyose, Mitsuo Ikeda, Yoichi Sakaura, Shinya Nakagawa, Makoto Nishio