Patents by Inventor Mitsuru Hiroshima

Mitsuru Hiroshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170229366
    Abstract: In a plasma processing step that is used in the method of manufacturing the element chip for manufacturing a plurality of element chips by dividing a substrate having a plurality of element regions, the substrate is divided into the element chips by exposing the substrate to first plasma. Therefore, the element chips having a first surface, a second surface, and a side surface on which a plurality of convex portions are formed are held spaced from each other on a carrier. A protection film is formed on the side surface of the element chip by exposing the element chip to second plasma, at least convex portions formed on the side surface are covered by the protection film in the protection film formation, and creep-up of a conductive material to the side surface is suppressed in the mounting step.
    Type: Application
    Filed: January 18, 2017
    Publication date: August 10, 2017
    Inventors: ATSUSHI HARIKAI, SHOGO OKITA, NORIYUKI MATSUBARA, MITSURU HIROSHIMA, MITSUHIRO OKUNE
  • Publication number: 20170229365
    Abstract: In a plasma processing step that is used in the method of manufacturing the element chip for manufacturing a plurality of element chips by dividing a substrate having a plurality of element regions, the substrate is divided into element chips 10 by exposing the substrate to a first plasma. Therefore, element chips having a first surface, a second surface, and a side surface connecting the first surface and the second surface are held spaced from each other on a carrier. A protection film covering the element chip is formed only on the side surface and it is possible to suppress creep-up of a conductive material to the side surface in the mounting step by exposing the element chips to second plasma in which a mixed gas of fluorocarbon and helium is used as a raw material gas.
    Type: Application
    Filed: January 18, 2017
    Publication date: August 10, 2017
    Inventors: ATSUSHI HARIKAI, SHOGO OKITA, NORIYUKI MATSUBARA, MITSURU HIROSHIMA, MITSUHIRO OKUNE
  • Patent number: 9698073
    Abstract: In a plasma processing step in a method of manufacturing an element chip in which a plurality of element chips are manufactured by dividing a substrate, which has a plurality of element regions, the substrate is divided into element chips by exposing the substrate to first plasma. In a protection film forming step of forming a protection film covering a side surface and a second surface by exposing the element chips to second plasma of which raw material gas is mixed gas of carbon fluoride and helium, protection film forming conditions are set such that a thickness of a second protection film of the second surface is greater than a thickness of a first protection film of the side surface.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: July 4, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atsushi Harikai, Shogo Okita, Noriyuki Matsubara, Mitsuru Hiroshima, Mitsuhiro Okune
  • Patent number: 9653334
    Abstract: A plasma processing apparatus includes a processing chamber, a plasma source that generates plasma within the processing chamber, a transfer carrier that has a holding sheet and a frame, the holding sheet holding a substrate, and the frame being attached to the holding sheet so as to surround the substrate, a stage that is provided within the processing chamber and has a gas supply hole formed in a mounting area of the stage for mounting the transfer carrier thereon, an electrostatic chucking part that is provided within the stage and electrostatically attracts the transfer carrier, and a gas supply part that supplies gas through the gas supply hole of the stage to assist separation of the transfer carrier from the stage.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: May 16, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Noriyuki Matsubara, Atsushi Harikai, Mitsuru Hiroshima
  • Publication number: 20170098591
    Abstract: In a plasma processing step in a method of manufacturing an element chip in which a plurality of element chips are manufactured by dividing a substrate, which has a plurality of element regions, the substrate is divided into element chips by exposing the substrate to first plasma. In a protection film forming step of forming a protection film covering a side surface and a second surface by exposing the element chips to second plasma of which raw material gas is mixed gas of carbon fluoride and helium, protection film forming conditions are set such that a thickness of a second protection film of the second surface is greater than a thickness of a first protection film of the side surface.
    Type: Application
    Filed: September 14, 2016
    Publication date: April 6, 2017
    Inventors: ATSUSHI HARIKAI, SHOGO OKITA, NORIYUKI MATSUBARA, MITSURU HIROSHIMA, MITSUHIRO OKUNE
  • Publication number: 20170069536
    Abstract: Provided is a plasma treatment method including: placing a substrate carrier holding a substrate on a stage; adjusting a distance between a cover and the stage to a first distance in which the cover covers a frame without coming into contact with the substrate carrier; performing a plasma treatment on the substrate placed on the stage after the adjusting of the distance; carrying the substrate together with the substrate carrier out from a reaction chamber after the performing of the plasma treatment; and removing an adhered substance adhered to the cover by generating plasma in the inside of the reaction chamber after the carrying of the substrate, in which the distance between the cover and the stage in the removing of the adhered substance is a second distance greater than the first distance.
    Type: Application
    Filed: August 23, 2016
    Publication date: March 9, 2017
    Inventors: ATSUSHI HARIKAI, NORIYUKI MATSUBARA, HIDEO KANOU, MITSURU HIROSHIMA, SYOUZOU WATANABE, TOSHIHIRO WADA
  • Publication number: 20170069522
    Abstract: In a method of fabricating element chips, a method of forming a mask pattern, and a method of processing a substrate, a process sequence is set such that developing in which the exposure-ended protection film is patterned is performed, after grinding in which the substrate is thinned by grinding a second surface opposite to a first surface to which a photosensitive protection film is pasted. Thereby, it is possible to perform the grinding for thinning in a state where the protection film is stable without being patterned, and to prevent the substrate or the protection film on which a mask pattern of the substrate is formed from being damaged at the time of the grinding, even in a case where a thin substrate of a wafer shape becomes a target.
    Type: Application
    Filed: August 31, 2016
    Publication date: March 9, 2017
    Inventors: Mitsuru HIROSHIMA, Atsushi HARIKAI
  • Patent number: 9583355
    Abstract: The plasma processing apparatus is provided with a chamber 11, a plasma source 13 which generates plasma inside the chamber 11, a stage 16 which is provided inside the chamber 11 and places a carrier 5 thereon, a cover 31 which is arranged above the stage 16 to cover a holding sheet 6 and a frame 7 and has a window 33 which is formed on a central part thereof to penetrate the cover 31 in the thickness direction, and a drive mechanism 38 which changes the position of the cover 31 relative to the stage 16 between a first position which is away from the stage 16 and allows the carrier 5 to be placed on and removed from the stage 16 and a second position which allows the cover 31 to cover the holding sheet 6 and the frame 7 of the carrier 5 placed on the stage 16 and a substrate 2 held on the holding sheet 6 to be exposed through the window 33.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: February 28, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Nobuhiro Nishizaki, Atsushi Harikai, Tetsuhiro Iwai, Mitsuru Hiroshima
  • Patent number: 9431263
    Abstract: A plasma processing method to a substrate includes a first step of mounting a transfer carrier holding the substrate on a stage which is cooled and provided within a processing chamber; a second step of relatively moving the stage and a cover provided above the stage to cover a holding sheet and an annular frame of the transfer carrier with the substrate exposed from a window part formed at the cover, a third step of carrying out plasma processing on the substrate, a fourth step of cooling the cover, and a fifth step of unloading the transfer carrier holding the substrate from the processing chamber.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: August 30, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atsushi Harikai, Noriyuki Matsubara, Mitsuru Hiroshima
  • Publication number: 20160064188
    Abstract: A plasma processing apparatus that performs plasma processing to a substrate held on a transport carrier including a frame and a holding sheet that covers an opening of the frame includes: a transport mechanism that transports the transport carrier; a position measuring section that measures a position of the substrate to the frame; a plasma processing section that includes a plasma processing stage on which the transport carrier is loaded and a cover that covers the frame and a part of the holding sheet loaded on the plasma processing stage, and has a window section for exposing a part of the substrate; and a control section that controls the transport mechanism such that the transport carrier is loaded on the plasma processing stage to satisfy a positional relationship between the window section and the substrate based on the position information of the substrate to the frame.
    Type: Application
    Filed: August 5, 2015
    Publication date: March 3, 2016
    Inventors: Shogo OKITA, Hiromi ASAKURA, Syouzou WATANABE, Noriyuki MATSUBARA, Mitsuru HIROSHIMA, Toshihiro WADA
  • Publication number: 20150340203
    Abstract: A plasma processing apparatus includes a processing chamber, a plasma source that generates plasma within the processing chamber, a transfer carrier that has a holding sheet and a frame, the holding sheet holding a substrate, and the frame being attached to the holding sheet so as to surround the substrate, a stage that is provided within the processing chamber and has a gas supply hole formed in a mounting area of the stage for mounting the transfer carrier thereon, an electrostatic chucking part that is provided within the stage and electrostatically attracts the transfer carrier, and a gas supply part that supplies gas through the gas supply hole of the stage to assist separation of the transfer carrier from the stage.
    Type: Application
    Filed: May 19, 2015
    Publication date: November 26, 2015
    Inventors: Noriyuki MATSUBARA, Atsushi HARIKAI, Mitsuru HIROSHIMA
  • Publication number: 20150340208
    Abstract: A plasma processing method to a substrate includes a first step of mounting a transfer carrier holding the substrate on a stage which is cooled and provided within a processing chamber; a second step of relatively moving the stage and a cover provided above the stage to cover a holding sheet and an annular frame of the transfer carrier with the substrate exposed from a window part formed at the cover, a third step of carrying out plasma processing on the substrate, a fourth step of cooling the cover, and a fifth step of unloading the transfer carrier holding the substrate from the processing chamber.
    Type: Application
    Filed: May 22, 2015
    Publication date: November 26, 2015
    Inventors: Atsushi HARIKAI, Noriyuki MATSUBARA, Mitsuru HIROSHIMA
  • Patent number: 8906249
    Abstract: A plasma processing apparatus includes a beam-shaped spacer 7 which is placed at an upper opening of a chamber 3 opposed to a substrate 2 to support a dielectric plate 8. The dielectric plate 8 is supported by the beam-shaped spacer 7. In the beam-shaped spacer 7 are provided a plurality of process gas introducing ports 31, 36 which have a depression angle ?d and which are provided downward and directed toward the substrate 2, as well as a plurality of rare gas introducing ports 41 having a elevation angle ?e directed toward the dielectric plate 8. Improvement of processing rates such as etching rate as well as effective suppression of wear of the dielectric plate 8 can be achieved.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: December 9, 2014
    Assignee: Panasonic Corporation
    Inventors: Mitsuru Hiroshima, Hiromi Asakura
  • Publication number: 20140335696
    Abstract: The plasma processing apparatus is provided with a chamber 11, a plasma source 13 which generates plasma inside the chamber 11, a stage 16 which is provided inside the chamber 11 and places a carrier 5 thereon, a cover 31 which is arranged above the stage 16 to cover a holding sheet 6 and a frame 7 and has a window 33 which is formed on a central part thereof to penetrate the cover 31 in the thickness direction, and a drive mechanism 38 which changes the position of the cover 31 relative to the stage 16 between a first position which is away from the stage 16 and allows the carrier 5 to be placed on and removed from the stage 16 and a second position which allows the cover 31 to cover the holding sheet 6 and the frame 7 of the carrier 5 placed on the stage 16 and a substrate 2 held on the holding sheet 6 to be exposed through the window 33.
    Type: Application
    Filed: April 23, 2014
    Publication date: November 13, 2014
    Applicant: Panasonic Corporation
    Inventors: Nobuhiro NISHIZAKI, Atsushi HARIKAI, Tetsuhiro IWAI, Mitsuru HIROSHIMA
  • Publication number: 20140332497
    Abstract: The plasma processing apparatus is provided with a plasma source 13 which generates plasma inside a chamber 11, a stage 16 which is provided inside the chamber 11 and places a carrier 5 thereon, a cover 31 which is arranged above the stage 16 to cover a holding sheet 6 and a frame 7 and has a window 33 which is formed to penetrate the cover 31 in the thickness direction, and a drive mechanism 38 which changes the position of the cover 31 relative to the stage 16 between a first position and a second position. The second position does not allow the cover 31 to make contact with the holding sheet 6, the frame 7 and a substrate 2. The cover 31 includes at least a ceiling surface 36b which extends in parallel to the upper face of the frame 7 and an inclined surface 36c which is inclined to gradually come close to the upper face of the holding sheet 6 exposed at the inner diameter side of the frame 7.
    Type: Application
    Filed: April 23, 2014
    Publication date: November 13, 2014
    Applicant: Panasonic Corporation
    Inventors: Nobuhiro NISHIZAKI, Atsushi HARIKAI, Tetsuhiro IWAI, Mitsuru HIROSHIMA
  • Patent number: 8673166
    Abstract: In a plasma processing apparatus, thrust-up pins are elevated and a thrust-up force is detected when electrostatic attraction for a substrate by a substrate holding device is ceased after completion of plasma processing, the elevation of the thrust-up pins is ceased upon detection of a detection threshold, and a stepped elevating operation in which the elevation and stoppage of the thrust-up pins are repeated a plurality of times are thereafter commenced on condition that the detected thrust-up force falls to or below the detection threshold and that release of the substrate from a placement surface has not been completed. In the stepped elevating operation, operation timing of the thrust-up device is controlled so that the completion of the release of the substrate from the placement surface is detected when the thrust-up pins are stopped after being elevated and so that the stepped elevating operation is continued on condition that the release has not been completed.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: March 18, 2014
    Assignee: Panasonic Corporation
    Inventors: Shogo Okita, Hiromi Asakura, Syouzou Watanabe, Toshihiro Wada, Mitsuhiro Okune, Mitsuru Hiroshima
  • Patent number: 8563332
    Abstract: Provided is a wafer reclamation method for reclaiming a semiconductor wafer, on which a different material layer is formed, by removing the different material layer. The wafer reclamation method includes a physically removing step of physically removing the different material layer, a film forming step of forming a film on a surface of the semiconductor wafer from which the different material layer has been removed in the physically removing step, and a dry etching step of etching the semiconductor wafer by plasma together with the film formed in the film forming step.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: October 22, 2013
    Assignee: Panasonic Corporation
    Inventors: Shogo Okita, Gaku Sugahara, Hiroyuki Suzuki, Ryuzou Houchin, Mitsuru Hiroshima
  • Publication number: 20110111601
    Abstract: In a plasma processing apparatus, thrust-up pins are elevated and a thrust-up force is detected when electrostatic attraction for a substrate by a substrate holding device is ceased after completion of plasma processing, the elevation of the thrust-up pins is ceased upon detection of a detection threshold, and a stepped elevating operation in which the elevation and stoppage of the thrust-up pins are repeated a plurality of times are thereafter commenced on condition that the detected thrust-up force falls to or below the detection threshold and that release of the substrate from a placement surface has not been completed. In the stepped elevating operation, operation timing of the thrust-up device is controlled so that the completion of the release of the substrate from the placement surface is detected when the thrust-up pins are stopped after being elevated and so that the stepped elevating operation is continued on condition that the release has not been completed.
    Type: Application
    Filed: May 28, 2009
    Publication date: May 12, 2011
    Inventors: Shogo Okita, Hiromi Asakura, Syouzou Watanabe, Toshihiro Wada, Mitsuhiro Okune, Mitsuru Hiroshima
  • Publication number: 20100173431
    Abstract: Provided is a wafer reclamation method for reclaiming a semiconductor wafer, on which a different material layer is formed, by removing the different material layer. The wafer reclamation method includes a physically removing step of physically removing the different material layer, a film forming step of forming a film on a surface of the semiconductor wafer from which the different material layer has been removed in the physically removing step, and a dry etching step of etching the semiconductor wafer by plasma together with the film formed in the film forming step.
    Type: Application
    Filed: August 25, 2008
    Publication date: July 8, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Shogo Okita, Gaku Sugahara, Hiroyuki Suzuki, Ryuzou Houchin, Mitsuru Hiroshima
  • Publication number: 20100089870
    Abstract: A plasma processing apparatus includes a beam-shaped spacer 7 which is placed at an upper opening of a chamber 3 opposed to a substrate 2 to support a dielectric plate 8. The dielectric plate 8 is supported by the beam-shaped spacer 7. In the beam-shaped spacer 7 are provided a plurality of process gas introducing ports 31, 36 which have a depression angle ?d and which are provided downward and directed toward the substrate 2, as well as a plurality of rare gas introducing ports 41 having a elevation angle ?e directed toward the dielectric plate 8. Improvement of processing rates such as etching rate as well as effective suppression of wear of the dielectric plate 8 can be achieved.
    Type: Application
    Filed: March 19, 2008
    Publication date: April 15, 2010
    Inventors: Mitsuru Hiroshima, Hiromi Asakura