Patents by Inventor Miyako Nakagoe
Miyako Nakagoe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20050085099Abstract: To enable radiating an optimum energy beam depending upon the structure of a substrate (whether a metallic film is formed or not) when an amorphous semiconductor film is crystallized and uniformly crystallizing the overall film, first, a photoresist film and the area of an N+ doped amorphous silicon film on the photoresist film are selectively removed by a lift-off method. Hereby, the amorphous silicon film is thicker in an area except an area over a metallic film (a gate electrode) than in the area over the metallic film. In this state, a laser beam is radiated. The N+ doped amorphous silicon film and an amorphous silicon film are melted by radiating a laser beam and afterward, melted areas are crystallized by cooling them to room temperature.Type: ApplicationFiled: October 29, 2004Publication date: April 21, 2005Inventors: Dharam Pal Gosain, Jonathan Westwater, Miyako Nakagoe, Setsuo Usui
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Patent number: 6794673Abstract: An amorphous silicon thin film includes a plastic substrate as a base, and insulating layers are formed thereon each radiated with a pulse laser beam which removes volatile contaminants like a resist as a pretreatment. A protective layer including a gas barrier layer and a refractory buffer layer is formed on the substrate. Gas penetration from the substrate to the amorphous silicon film is thereby prevented. Conduction of heat produced by energy beam radiation to the substrate is prevented as well. it is possible to increase energy intensity of energy beam radiated for the polycrystallization of the amorphous silicon film to the optimal value for perfect polycrystallization.Type: GrantFiled: December 11, 2001Date of Patent: September 21, 2004Assignee: Sony CorporationInventors: Dharam Pal Gosain, Jonathan Westwater, Miyako Nakagoe, Setsuo Usui, Kazumasa Nomoto
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Patent number: 6645837Abstract: A polycrystalline silicon layer is formed on a substrate. An insulating layer and a gate electrode are formed on the polycrystalline silicon layer. Then, a channel region, a source region and a drain region are formed in a self-aligned manner by doping an impurity in the polycrystalline silicon layer using the gate electrode as a mask. Then, an energy absorption layer is formed so as to cover the entire substrate and a pulsed laser beam is irradiated from the energy absorption layer side. The energy of the pulsed laser beam is almost completely absorbed in the energy absorption layer and a heat treatment is indirectly performed on the underlying layers by radiating the heat. In other words, activation of the impurity and removal of defects in the insulating layer are performed at the same time without damaging the substrate by the heat.Type: GrantFiled: May 31, 2001Date of Patent: November 11, 2003Assignee: Sony CorporationInventors: Dharam Pal Gosain, Kazumasa Nomoto, Akio Machida, Miyako Nakagoe, Setsuo Usui
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Publication number: 20030207507Abstract: To enable radiating an optimum energy beam depending upon the structure of a substrate (whether a metallic film is formed or not) when an amorphous semiconductor film is crystallized and uniformly crystallizing the overall film, first, a photoresist film and the area of an N− doped amorphous silicon film on the photoresist film are selectively removed by a lift-off method. Hereby, the amorphous silicon film is thicker in an area except an area over a metallic film (a gate electrode) than in the area over the metallic film In this state, a laser beam is radiated. The N− doped amorphous silicon film and an amorphous silicon film are melted by radiating a laser beam and afterward, melted areas are crystallized by cooling them to room temperature.Type: ApplicationFiled: June 2, 2003Publication date: November 6, 2003Inventors: Dharam Pal Gosain, Jonathan Westwater, Miyako Nakagoe, Setsuo Usui
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Publication number: 20020068390Abstract: A method is provided for forming a semiconductor thin film which is free from damage to the film with radiation of a pulse laser beam with the optimum energy value for perfect polycrystallization. For forming an amorphous silicon thin film, a surface of a plastic substrate as a base and insulating layers are each radiated with a pulse laser beam for removing volatile contaminants like a resist as a pretreatment. Damage to the film caused by a gas emitted from the base substrate and the insulating layers resulting from volatile contaminants is thus prevented. A protective layer including a gas barrier layer and a refractory buffer layer is formed on the substrate. Gas penetration from the substrate to the amorphous silicon film is thereby prevented. Conduction of heat produced by energy beam radiation to the substrate is prevented as well.Type: ApplicationFiled: December 11, 2001Publication date: June 6, 2002Inventors: Dharam Pal Gosain, Jonathan Westwater, Miyako Nakagoe, Setsuo Usui, Kazumasa Nomoto
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Publication number: 20020048869Abstract: A method is provided for forming a semiconductor thin film which is free from damage to the film with radiation of a pulse laser beam with the optimum energy value for perfect polycrystallization. For forming an amorphous silicon thin film, a surface of a plastic substrate as a base and insulating layers are each radiated with a pulse laser beam for removing volatile contaminants like a resist as a pretreatment. Damage to the film caused by a gas emitted from the base substrate and the insulating layers resulting from volatile contaminants is thus prevented. A protective layer including a gas barrier layer and a refractory buffer layer is formed on the substrate. Gas penetration from the substrate to the amorphous silicon film is thereby prevented. Conduction of heat produced by energy beam radiation to the substrate is prevented as well.Type: ApplicationFiled: July 16, 1998Publication date: April 25, 2002Inventors: DHARAM PAL GOSAIN, JONATHAN WESTWATER, MIYAKO NAKAGOE, SETSUO USUI, KAZUMASA NOMOTO
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Patent number: 6376290Abstract: A method is provided for forming a semiconductor thin film which is free from damage to the film with radiation of a pulse laser beam with the optimum energy value for perfect polycrystallization. For forming an amorphous silicon thin film, a surface of a plastic substrate as a base and insulating layers are each radiated with a pulse laser beam for removing volatile contaminants like a resist as a pretreatment. Damage to the film caused by a gas emitted from the base substrate and the insulating layers resulting from volatile contaminants is thus prevented. A protective layer including a gas barrier layer and a refractory buffer layer is formed on the substrate. Gas penetration from the substrate to the amorphous silicon film is thereby prevented. Conduction of heat produced by energy beam radiation to the substrate is prevented as well.Type: GrantFiled: July 16, 1998Date of Patent: April 23, 2002Assignee: Sony CorporationInventors: Dharam Pal Gosain, Jonathan Westwater, Miyako Nakagoe, Setsuo Usui, Kazumasa Nomoto
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Publication number: 20020016027Abstract: A polycrystalline silicon layer is formed on a substrate. An insulating layer and a gate electrode are formed on the polycrystalline silicon layer. Then, a channel region, a source region and a drain region are formed in a self-aligned manner by doping an impurity in the polycrystalline silicon layer using the gate electrode as a mask. Then, an energy absorption layer is formed so as to cover the entire substrate and a pulsed laser beam is irradiated from the energy absorption layer side. The energy of the pulsed laser beam is almost completely absorbed in the energy absorption layer and a heat treatment is indirectly performed on the underlying layers by radiating the heat. In other words, activation of the impurity and removal of defects in the insulating layer are performed at the same time without damaging the substrate by the heat.Type: ApplicationFiled: May 31, 2001Publication date: February 7, 2002Inventors: Dharam Pal Gosain, Kazumasa Nomoto, Akio Machida, Miyako Nakagoe, Setsuo Usui
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Publication number: 20020000242Abstract: A method for manufacturing a thin-film semiconductor device configured to form the thin-film semiconductor device on a first substrate and thereafter transfer the thin-film semiconductor device from the first substrate to a second substrate, comprises the steps of: forming a porous layer containing a separation layer on the first substrate; forming the thin-film semiconductor device on the porous layer; and after bonding the second substrate different from the first substrate in contraction coefficient by cooling onto the thin-film semiconductor device, cooling the product by cooling means to produce a shear stress in the separation layer in the porous layer and to separate the thin-film semiconductor device from the first substrate along the separation layer.Type: ApplicationFiled: February 8, 2000Publication date: January 3, 2002Inventors: Takeshi Matushiita, Miyako Nakagoe, Jonathan Westwater, Misao Kusunoki, Kazushi Yamauchi
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Patent number: 6285055Abstract: While a storage region 15 has of many dispersed particulates (dots) (15a), the surface density of the particulates (15a) is set to be higher than that of structural holes (pin holes) produced in a tunnel insulating film (14a), or the number of the particulates (15a) in the storage region (15) is set to five or more. While a conduction region (13c) is formed by a polysilicon layer (13) having a surface roughness of 0.1 nm to 100 nm, the number of the particulates (15a) in the storage region (15) is set to be larger than the number of crystal grains in the conduction region (13c). Even when a defect such as a pin hole occurs in the tunnel insulating film (14a) and charges stored in a part of the particulates are leaked, the charges stored in the particulates formed in a region where no defect occurs are not leaked. Thus, information can be held for a long time.Type: GrantFiled: November 29, 1999Date of Patent: September 4, 2001Assignee: Sony CorporationInventors: Dharam Pal Gosain, Kazumasa Nomoto, Jonathan Westwater, Miyako Nakagoe, Setsuo Usui, Takashi Noguchi, Yoshifumi Mori
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Patent number: 6130143Abstract: While a silicon substrate is heated, gold is evaporated thereon at a thickness of 0.6 nm, whereby melted alloy droplets are formed on the substrate surface. Then, the silicon substrate is heated to 450.degree.-650.degree. C. in a silane gas atmosphere of less than 0.5 Torr. As a result, a silane gas decomposition reaction occurs with the melted alloy droplets serving as catalysts, whereby silicon wires grow on the substrate surface. Subsequently, the metal alloy droplets at the tips of the silicon wires are removed and surface portions of the silicon wires are oxidized. Resulting surface oxide films are thereafter removed. As a result, silicon quantum wires that are thinner by the thickness of the surface oxide films are obtained.Type: GrantFiled: August 18, 1999Date of Patent: October 10, 2000Assignee: Sony CorporationInventors: Jonathan Westwater, Dharam Pal Gosain, Miyako Nakagoe, Setsuo Usui
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Patent number: 6130142Abstract: While a silicon substrate is heated, gold is evaporated thereon at a thickness of 0.6 nm, whereby melted alloy droplets are formed on the substrate surface. Then, the silicon substrate is heated to 450.degree.-650.degree. C. in a silane gas atmosphere of less than 0.5 Torr. As a result, a silane gas decomposition reaction occurs with the melted alloy droplets serving as catalysts, whereby silicon wires grow on the substrate surface. Subsequently, the metal alloy droplets at the tips of the silicon wires are removed and surface portions of the silicon wires are oxidized. Resulting surface oxide films are thereafter removed. As a result, silicon quantum wires that are thinner by the thickness of the surface oxide films are obtained.Type: GrantFiled: August 18, 1999Date of Patent: October 10, 2000Assignee: Sony CorporationInventors: Jonathan Westwater, Dharam Pal Gosain, Miyako Nakagoe, Setsuo Usui
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Method of manufacturing a semiconductor device and a process of manufacturing a thin film transistor
Patent number: 6093586Abstract: To enable radiating an optimum energy beam depending upon the structure of a substrate (whether a metallic film is formed or not) when an amorphous semiconductor film is crystallized and uniformly crystallizing the overall film, first, a photoresist film and the area of an N.sup.+ doped amorphous silicon film on the photoresist film are selectively removed by a lift-off method. Hereby, the amorphous silicon film is thicker in an area except an area over a metallic film (a gate electrode) than in the area over the metallic film. In this state, a laser beam is radiated. The N.sup.+ doped amorphous silicon film and an amorphous silicon film are melted by radiating a laser beam and afterward, melted areas are crystallized by cooling them to room temperature.Type: GrantFiled: July 29, 1997Date of Patent: July 25, 2000Assignee: Sony CorporationInventors: Dharam Pal Gosain, Jonathan Westwater, Miyako Nakagoe, Setsuo Usui -
Patent number: 5976957Abstract: While a silicon substrate is heated, gold is evaporated thereon at a thickness of 0.6 nm, whereby melted alloy droplets are formed on the substrate surface. Then, the silicon substrate is heated to 450.degree.-650.degree. C. in a silane gas atmosphere of less than 0.5 Torr. As a result, a silane gas decomposition reaction occurs with the melted alloy droplets serving as catalysts, whereby silicon wires grow on the substrate surface. Subsequently, the metal alloy droplets at the tips of the silicon wires are removed and surface portions of the silicon wires are oxidized. Resulting surface oxide films are thereafter removed. As a result, silicon quantum wires that are thinner by the thickness of the surface oxide films are obtained.Type: GrantFiled: October 24, 1997Date of Patent: November 2, 1999Assignee: Sony CorporationInventors: Jonathan Westwater, Dharam Pal Gosain, Miyako Nakagoe, Setsuo Usui
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Patent number: 5953595Abstract: The manufacturing processes can be simplified and the reliability can be improved. A method of processing a thin film includes a first process of selectively forming a resist pattern on a ground surface, a second process of forming a thin film on the ground surface and a surface of the resist pattern, and a third process of removing the resist pattern to selectively remove the thin film deposited on the former, i.e., carrying out the lift-off, thereby the thin film process for a desired pattern being carried out.Type: GrantFiled: September 27, 1996Date of Patent: September 14, 1999Assignee: Sony CorporationInventors: Dharam Pal Gosain, Jonathan Westwater, Miyako Nakagoe, Setsuo Usui
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Patent number: 5858862Abstract: A process of producing quantum fine wires, it is called silicon nanowires, too, which allows silicon quantum fine wires to grow into desirable shapes. In this process, gold is deposited on a silicon substrate to a thickness of 5 nm or less, and the silicon substrate is heated at a temperature of 450.degree. C. to 650.degree. C. in an atmosphere containing silane gas at a pressure less than 0.5 Torr, whereby drops of a molten alloy of silicon and gold are formed on the surface of the silicon substrate and the silane gas is decomposed by the action of the molten alloy drops as catalyst, to allow silicon quantum fine wires to grow into such desirable shapes as to be uniform in diameter without any bending.Type: GrantFiled: March 24, 1997Date of Patent: January 12, 1999Assignee: Sony CorporationInventors: Jonathan Westwater, Dharam Pal Gosain, Miyako Nakagoe, Setsuo Usui