Patents by Inventor Mohanraj Prabhugoud

Mohanraj Prabhugoud has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12293956
    Abstract: An apparatus is described. The apparatus includes a packaged semiconductor device. The packaged semiconductor device having an integrated heat spreader, wherein, a boiling enhancement structure exists on the integrated heat spreader without a block mass residing between the boiling enhancement structure and the integrated heat spreader. The boiling enhancement structure has a structured non-planar surface to promote bubble nucleation in an immersion cooling system.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: May 6, 2025
    Assignee: Intel Corporation
    Inventors: Jin Yang, Jimmy Chuang, Xicai Jing, Yuan-Liang Li, Yuyang Xia, David Shia, Mohanraj Prabhugoud, Maria de la Luz Belmont, Oscar Farias Moguel, Andres Ramirez Macias, Javier Avalos Garcia, Jessica Gullbrand, Shaorong Zhou, Chia-Pin Chiu, Xiaojin Gu
  • Publication number: 20250102745
    Abstract: In one embodiment, a device includes a fiber array unit (FAU) coupled to a photonics integrated circuit (PIC) die. The PIC die includes a cavity defined at an edge of the PIC die, with outer edges of the cavity being formed at an angle less than 90 degrees with respect to a bottom surface of the cavity. The PIC die further includes first waveguides protruding into the cavity of the PIC die. The FAU includes a shelf portion extending from a body portion, and a plurality of second waveguides protruding from an outer edge of the shelf portion opposite the body portion. The FAU further includes alignment structures on outer edges of the shelf portion that are in contact with the angled edges of the cavity of the PIC die.
    Type: Application
    Filed: September 27, 2023
    Publication date: March 27, 2025
    Applicant: Intel Corporation
    Inventors: Mohanraj Prabhugoud, David Shia, Hari Mahalingam, John M. Heck, John Robert Macdonald, Duncan Peter Dore, Eric J. M. Moret, Nicholas D. Psaila, Sang Yup Kim, Shane Kevin Yerkes, Harel Frish
  • Publication number: 20250089192
    Abstract: Composite backplate architectures for backside power delivery and associated methods are disclosed. An example backplate includes a first layer including a first material, and a second layer attached to the first layer. The second layer includes a second material different from the first material. The example backplate further includes a bus bar attached to the first layer.
    Type: Application
    Filed: November 26, 2024
    Publication date: March 13, 2025
    Applicant: Intel Corporation
    Inventors: Phil Geng, Dongwang Chen, Fernando Gonzalez Lenero, Chuansheng Liu, Lejie Liu, Ralph V. Miele, Mohanraj Prabhugoud, Sanjoy Saha, David Shia, Jeffory L. Smalley, Ke Song, Meng Wang, Xiaoning Ye, Juan Zermeno Carriedo, Yipeng Zhong
  • Patent number: 12248344
    Abstract: Techniques for liquid cooling interfaces with rotatable connector assemblies are disclosed. In one embodiment, a collar contacts flanges on two components of a connector assembly, preventing them from separating. In another embodiment, a housing is positioned around a stem component. The stem component has a gap between a top part and a bottom part held apart by pillars, allowing water to flow to a tubing fitting connected to the housing. A retainer on top of the stem component holds the housing in place. In yet another embodiment, an internal retainer holds a housing component in place over a stem. Other embodiments are disclosed.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: March 11, 2025
    Assignee: Intel Corporation
    Inventors: Kristin L. Weldon, David Rodriguez, Jin Yang, David Shia, Jimmy Chuang, Mohanraj Prabhugoud, Mark Edmund Sprenger
  • Publication number: 20250071938
    Abstract: Examples described herein relate to a cold plate. An example apparatus includes a first layer with one or more channels to receive fluid. The example apparatus further includes a second layer that is more rigid than the first layer. The second layer is to be mounted to the first layer and separated from the first layer by a gasket to reduce corrosion of the second layer.
    Type: Application
    Filed: September 26, 2024
    Publication date: February 27, 2025
    Applicant: Intel Corporation
    Inventors: Jin YANG, David SHIA, Mohanraj PRABHUGOUD, Olaotan ELENITOBA-JOHNSON, Craig JAHNE, Phil GENG
  • Publication number: 20250004205
    Abstract: Multichannel optical assemblies for optical IO (input output) systems are provided. The optical assemblies comprise an optical isolator. In some examples the optical assemblies also comprise an array of GRIN lenses. In other examples, the optical assemblies also comprise micromirrors.
    Type: Application
    Filed: June 29, 2023
    Publication date: January 2, 2025
    Inventors: Dekang CHEN, Nicholas PSAILA, Zhichao ZHANG, Eric J.M. MORET, Wesley B. MORGAN, Srikant NEKKANTY, Sang Yup KIM, Mohanraj PRABHUGOUD, Chao TIAN
  • Publication number: 20250004225
    Abstract: Technologies for substrate features for a pluggable optical connectors in an integrated circuit package are disclosed. In the illustrative embodiment, a substrate includes a cavity cut through a substrate of the integrated circuit package. Sidewalls of the cavity establish coarse lateral alignment features for an optical plug. The optical plug and optical socket include additional alignment features to more precisely align optical fibers in the optical plug to an optical interposer mounted on the substrate. The cavity cut through the substrate may also include indents that can mate with protrusions of the optical plug to retain the optical plug. The optical interposer may be mounted on a recessed shelf in the substrate.
    Type: Application
    Filed: June 30, 2023
    Publication date: January 2, 2025
    Applicant: Intel Corporation
    Inventors: Mohanraj Prabhugoud, David Shia, Tarek A. Ibrahim, Yuxin Fang
  • Patent number: 12176643
    Abstract: Embodiments disclosed herein include sockets and electronic packages with socket architectures. In an embodiment, a socket comprises a housing with a first surface and a second surface. In an embodiment, a plurality of interconnect pins pass through the housing. In an embodiment, an alignment hole is provided through the housing. In an embodiment, an alignment post extending out from the first surface of the housing is also provided.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: December 24, 2024
    Assignee: Intel Corporation
    Inventors: Thomas Boyd, Feifei Cheng, Eric W. Buddrius, Mohanraj Prabhugoud
  • Patent number: 12133357
    Abstract: Examples described herein relate to a cold plate. In some examples, the cold plate includes a surface with fins and at least two channels, wherein a first channel is shaped with a first opening extending towards the surface, a second opening proximate and across a first fin attached to the surface, and a third opening from the surface and extending away from the surface. In some examples, when a fluid is provided to the first opening, the first opening directs the fluid towards the surface, the second opening directs the fluid across the first fin, and the third opening directs the fluid away from the surface. In some examples, the second opening comprises split openings around opposite sides of the first fin.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: October 29, 2024
    Assignee: Intel Corporation
    Inventors: Jin Yang, David Shia, Mohanraj Prabhugoud, Olaotan Elenitoba-Johnson, Craig Jahne, Phil Geng
  • Patent number: 12127363
    Abstract: Embodiments disclosed herein include sockets and electronic packages with socket architectures. In an embodiment, a socket comprises a housing with a first surface and a second surface. In an embodiment, a plurality of interconnect pins pass through the housing. In an embodiment, an alignment hole is provided through the housing. In an embodiment, an alignment post extending out from the first surface of the housing is also provided.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: October 22, 2024
    Assignee: Intel Corporation
    Inventors: Feifei Cheng, Thomas Boyd, Kuang Liu, Steven A. Klein, Daniel Neumann, Mohanraj Prabhugoud
  • Publication number: 20240179832
    Abstract: A multi-entry socket power delivery structure is attachable to a printed circuit board to provide improved delivery of one or more power supply signals to a socket. The power delivery structure provides an additional path for power supply signals to be delivered to a socket (in addition to the “power corridor” of the printed circuit board). The power delivery structure comprises one or more portions, with individual portions comprising a printed circuit board connection portion that attaches to the printed circuit board to receive a power supply signal generated by a voltage regulator, and a socket connection portion that attaches to the printed circuit board to deliver the power supply signal to the socket via the printed circuit board. The power delivery structure can be located in the recess of a reinforced backplate that provides structural integrity to a processor stack and associated thermal management solution loading mechanism.
    Type: Application
    Filed: February 7, 2024
    Publication date: May 30, 2024
    Inventors: Phil Geng, Xiaoning Ye, Yipeng Zhong, Meng Wang, Hongfei Yan, Chuansheng Liu, Lejie Liu, Mohanraj Prabhugoud, Fernando Gonzalez Lenero, Dongwang Chen, Sanjoy Saha, Ralph Miele, Baris Bicen, David Shia, Jeffory Smalley, Eric Erike
  • Publication number: 20240133945
    Abstract: A low level contact resistance (LLCR) testing apparatus comprises a test board, an interface board, and a patch board. The test board comprises a processor socket. The interface board connects to both the test board and the patch board. The patch board connects to a contact resistance tester. An LLCR system comprising the LLCR testing apparatus and a contact resistance tester can be portable. The test board can accommodate thermal management solutions of varying sizes and types. Different test board designs can accommodate different socket-processor configurations and the different test boards can be easily accommodated by an LLCR testing apparatus due to its modular design.
    Type: Application
    Filed: December 29, 2023
    Publication date: April 25, 2024
    Inventors: Mohanraj Prabhugoud, David Shia, Lejie Liu, Silver Alfonso Rodriguez Estrada, Min Pei, Ralph V. Miele, Caleb Million Tessema
  • Publication number: 20240094476
    Abstract: Technologies for pluggable optical connectors are disclosed. In the illustrative embodiment, an optical plug includes a ferrule with one or more optical fibers. The optical plug also includes a ferrule holder that holds the ferrule and a housing that encloses the ferrule and ferrule holder. The ferrule holder can move relative to the house, and the ferrule can move relative to the ferrule holder and the housing. As the optical plug is plugged into a socket, alignment features in the housing coarsely align the ferrule. Intermediate alignment features in the ferrule holder then engage, aligning the ferrule more precisely. As the optical plug is fully plugged in, fine alignment features in the ferrule engage, precisely aligning the ferrule and the optical fibers with the optical socket.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 21, 2024
    Applicant: Intel Corporation
    Inventors: Wesley B. Morgan, David Shia, Mohanraj Prabhugoud, Eric J. M. Moret, Pooya Tadayon
  • Publication number: 20240027697
    Abstract: Optical connectors with alignment features, and methods of forming the same, are disclosed herein. In one example, an optical ferrule includes holes to couple a fiber array to the optical ferrule, a mating protrusion to mate with an optical receptacle, and alignment features to align the fiber array with optical waveguides in the optical receptacle. The optical receptacle includes the optical waveguides, a mating cavity to mate with the mating protrusion on the optical ferrule, and alignment features to mate with the alignment features on the optical ferrule.
    Type: Application
    Filed: July 22, 2022
    Publication date: January 25, 2024
    Applicant: Intel Corporation
    Inventors: Wesley B. Morgan, Mohanraj Prabhugoud, David Shia, Eric J. M. Moret, Pooya Tadayon, Tarek A. Ibrahim
  • Publication number: 20230395460
    Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed for supports for internal hardware of electronic devices. An example support includes an integrated circuit (IC) carrier that includes a plurality of walls, supports carried by the walls to support an IC from below the IC, and a retention clip to secure the IC.
    Type: Application
    Filed: August 16, 2023
    Publication date: December 7, 2023
    Inventors: David Shia, Rick Canham, Eric W. Buddrius, Jeffory L. Smalley, John Beatty, Kenan Arik, Mohanraj Prabhugoud, Kirk Wheeler, Shelby Ferguson, Jorge Contreras Perez, Daniel Neumann, Ernesto Borboa Lizarraga
  • Patent number: 11683890
    Abstract: A reflowable grid array (RGA) interposer includes first connection pads on a first surface of a body and second connection pads on a second surface of the body. Heating elements within the body are adjacent to the second connection pads. First interconnects within the body connect some of the second connection pads to the first connection pads. Second interconnects within the body connect pairs of the second connection pads. A motherboard assembly includes first and second components (e.g., CPU with co-processor and/or memory) and the RGA interposer. The first connection pads are in contact with motherboard contacts. The second connection pads are in contact with the first and second components. The first component passes signals directly to the motherboard by the first interconnects. The second component passes signals directly to the first component by the second interconnects but does not pass signals directly to the motherboard by the first interconnects.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: June 20, 2023
    Assignee: Intel Corporation
    Inventors: Jonathan W. Thibado, Jeffory L. Smalley, John C. Gulick, Phi Thanh, Mohanraj Prabhugoud
  • Patent number: 11656247
    Abstract: A coaxial wire interconnect architecture and associated methods are described. In one example, the coaxial wire interconnect architecture is used in a test socket interconnect array. Flexible bends are formed in one or more of the coaxial wire interconnects to provide compliant connections to an electronic device during testing.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: May 23, 2023
    Assignee: Intel Corporation
    Inventors: Ronald Michael Kirby, Erkan Acar, Joe Walczyk, Youngseok Oh, Justin M Huttula, Mohanraj Prabhugoud
  • Patent number: 11621237
    Abstract: Embodiments include interposers for use in high speed applications. In an embodiment, the interposer comprises an interposer substrate, and an array of pads on a first surface of the interposer substrate. In an embodiment, a plurality of vias pass through the interposer substrate, where each via is electrically coupled to one of the pads in the array of pads. In an embodiment a plurality of heating elements are embedded in the interposer substrate. In an embodiment a first cable is over the first surface interposer substrate. In an embodiment, the first cable comprises an array of conductive lines along the first cable, where conductive lines proximate to a first end of the cable are electrically coupled to pads in the array of pads.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: April 4, 2023
    Assignee: Intel Corporation
    Inventors: Jonathan W. Thibado, Jeffory L. Smalley, John C. Gulick, Phi Thanh, Mohanraj Prabhugoud, Chong Zhao
  • Patent number: 11449111
    Abstract: A microprocessor loading mechanism, comprising a bolster plate surrounding an aperture, wherein the opening is to receive a microprocessor socket, one or more torsion bars coupled to the bolster plate, and a stud coupled to each of the one or more torsion bars, wherein each stud is to receive a nut to secure a microprocessor package to the microprocessor socket within the aperture and wherein each stud is secured to the bolster plate by each corresponding torsion bar.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: September 20, 2022
    Assignee: Intel Corporation
    Inventors: Eric W. Buddrius, Ralph V. Miele, Mohanraj Prabhugoud, David Shia, Jeffory L. Smalley
  • Publication number: 20220102889
    Abstract: Embodiments disclosed herein include sockets and electronic packages with socket architectures. In an embodiment, a socket comprises a housing with a first surface and a second surface. In an embodiment, a plurality of interconnect pins pass through the housing. In an embodiment, an alignment hole is provided through the housing. In an embodiment, an alignment post extending out from the first surface of the housing is also provided.
    Type: Application
    Filed: September 25, 2020
    Publication date: March 31, 2022
    Inventors: Thomas BOYD, Feifei CHENG, Eric W. BUDDRIUS, Mohanraj PRABHUGOUD