Abstract: A digital signal processor architecture particularly adapted for performing fast Fourier Transform algorithms efficiently. The architecture comprises dual, parallel multiply and accumulate units in which the output of the multiplier circuit portion of each MAC is cross-coupled to an input of the adder unit of the other MAC as well as to an input of the adder unit of the same MAC to which the multiplier belongs.

Abstract: A system and method, operable on a general purpose computer, for debugging software that is to control a digital signal processor ("DSP") and a general purpose computer employing either the system or the method. The present invention is employable with either a real DSP or an emulated DSP.

Abstract: A lock-up prevention circuit and method are used with a watchdog timer circuit. The lock-up prevention circuit includes a logic circuit for receiving a first signal for generating an enabling signal, and responds to a first predetermined bit stored in a control register for controlling a loading of an enabling signal to the control register. The watchdog timer circuit responds to the loading of the enabling signal to be enabled to respond to a second predetermined bit of the control register for controlling initiation of a timing cycle of the watchdog timer circuit. In response to a clock signal and a second predetermined bit of the control register, the logic circuit clocks the control register to load the enabling signal.

Abstract: A dual sense non-differencing peak detector locates a peak without introducing unwanted noise components, and also corrects for signal asymmetries. This is accomplished by identifying two sequential sets of two successive samples each. The first set includes samples that fall on each side of a threshold voltage on the rising edge of the signal. The second set includes samples that fall on each side of the threshold on the falling edge of the signal. For each of the two sets of samples, the point at which the signal substantially equals the threshold is found by interpolation. The two threshold points, for a symmetrical signal, fall equidistant from the peak, and hence the peak is easily located as being equidistant therebetween.