Abstract: An apparatus includes a coreless substrate with a through-silicon via (TSV) embedded die that is integral to the coreless substrate. The apparatus includes a subsequent die that is coupled to the TSV die and that is disposed above the coreless substrate.

Abstract: A coating for a microelectronic device comprises a polymer film (131) containing a filler material (232). The polymer film has a thermal conductivity greater than 3 W/m·K and a thickness (133) that does not exceed 10 micrometers. The polymer film may be combined with a dicing tape (310) to form a treatment (300) that simplifies a manufacturing process for a microelectronic package (100) and may be used in order to manage a thermal profile of the microelectronic device.

Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include attaching a patterned die backside film (DBF) on a backside of a die, wherein the patterned DBF comprises an opening surrounding at least one through silicon via (TSV) pad disposed on the backside of the die.

Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include attaching a patterned die backside film (DBF) on a backside of a die, wherein the patterned DBF comprises an opening surrounding at least one through silicon via (TSV) pad disposed on the backside of the die.

Abstract: A coating for a microelectronic device comprises a polymer film (131) containing a filler material (232). The polymer film has a thermal conductivity greater than 3 W/m·K and a thickness (133) that does not exceed 10 micrometers. The polymer film may be combined with a dicing tape (310) to form a treatment (300) that simplifies a manufacturing process for a microelectronic package (100) and may be used in order to manage a thermal profile of the microelectronic device.

Abstract: A treatment for a microelectronic device comprises a dicing tape (110) and a polymer composite film (120) having a pigment or other colorant added thereto and, in some embodiments, a pre-cure glass transition temperature greater than 50° Celsius. The film can comprise multiple layers, with one layer being tacky and the other layer non-tacky at a given temperature.

Abstract: A coating for a microelectronic device comprises a polymer film (131) containing a filler material (232). The polymer film has a thermal conductivity greater than 3 W/m·K and a thickness (133) that does not exceed 10 micrometers. The polymer film may be combined with a dicing tape (310) to form a treatment (300) that simplifies a manufacturing process for a microelectronic package (100) and may be used in order to manage a thermal profile of the microelectronic device.

Abstract: Disclosed herein is a polymeric composition comprising a polymeric composition comprising a first crosslinked network; and a second crosslinked network; wherein the first crosslinked network is crosslinked at a first stress and/or a first strain and the second crosslinked network is crosslinked at a second stress and/or a second strain; where the first stress and/or the first strain is different from the second stress and/or the second strain either in magnitude or direction. Disclosed herein is a method comprising subjecting a polymeric mass to a first stress and/or a first strain level; crosslinking the polymeric mass to form a first crosslinked network; subjecting the polymeric mass to a second stress and/or a second strain level; and crosslinking the polymeric mass to form a second crosslinked network; where the first stress and/or the first strain level is different from the second stress and/or the second strain level.

Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include attaching a patterned die backside film (DBF) on a backside of a die, wherein the patterned DBF comprises an opening surrounding at least one through silicon via (TSV) pad disposed on the backside of the die.

Abstract: An apparatus includes a coreless substrate with a through-silicon via (TSV) embedded die that is integral to the coreless substrate. The apparatus includes a subsequent die that is coupled to the TSV die and that is disposed above the coreless substrate.

Abstract: A treatment for a microelectronic device comprises a dicing tape (110) and a polymer composite film (120) having a pigment or other colorant added thereto and, in some embodiments, a pre-cure glass transition temperature greater than 50° Celsius. The film can comprise multiple layers, with one layer being tacky and the other layer non-tacky at a given temperature.

Abstract: A coating for a microelectronic device comprises a polymer film (131) containing a filler material (232). The polymer film has a thermal conductivity greater than 3 W/m·K and a thickness (133) that does not exceed 10 micrometers. The polymer film may be combined with a dicing tape (310) to form a treatment (300) that simplifies a manufacturing process for a microelectronic package (100) and may be used in order to manage a thermal profile of the microelectronic device.

Abstract: Disclosed herein is a polymeric composition comprising a polymeric composition comprising a first crosslinked network; and a second crosslinked network; wherein the first crosslinked network is crosslinked at a first stress and/or a first strain and the second crosslinked network is crosslinked at a second stress and/or a second strain; where the first stress and/or the first strain is different from the second stress and/or the second strain either in magnitude or direction. Disclosed herein is a method comprising subjecting a polymeric mass to a first stress and/or a first strain level; crosslinking the polymeric mass to form a first crosslinked network; subjecting the polymeric mass to a second stress and/or a second strain level; and crosslinking the polymeric mass to form a second crosslinked network; where the first stress and/or the first strain level is different from the second stress and/or the second strain level.