Patents by Inventor Mohsen Alavi

Mohsen Alavi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5969404
    Abstract: A fusible link device disposed on a semiconductor substrate for providing discretionary electrical connections. The fusible link device of the invention includes a silicide layer and a polysilicon layer formed on the silicide layer and has a first unprogrammed resistance.
    Type: Grant
    Filed: July 16, 1997
    Date of Patent: October 19, 1999
    Assignee: Intel Corporation
    Inventors: Mark T. Bohr, Mohsen Alavi
  • Patent number: 5844300
    Abstract: A monitoring device to monitor process induced charge employing a single layer of polysilicon forming a floating gate. The device comprises two capacitors, one for charging and the other for discharging a floating gate of an n-channel transistor. Embodiments which permit the monitoring of positive charge, negative charge and both positive and negative charge are described. The device is reusable and lends itself to in-line monitoring as opposed to some prior art devices used for end-of-line monitoring.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: December 1, 1998
    Assignee: Intel Corporation
    Inventors: Mohsen Alavi, Payman Aminzadeh, Robert A. Gasser, Sunit Tyagi, Gilroy J. Vandentop
  • Patent number: 5798552
    Abstract: A method and an apparatus for forming a transistor suitable for a high voltage circuit. In one embodiment, the transistor is formed without adding any steps to an existing state-of-the-art CMOS process. A well is implanted into a portion of a substrate such that the well has a higher doping concentration than the substrate. A first diffusion region is then implanted into the substrate such that at least a portion of the first diffusion is disposed within the well. In addition, a second diffusion is implanted into the substrate separated from the well such that the second diffusion region is disposed entirely outside the well. A channel region is disposed between the first and second regions and gate is disposed over the channel region to form the high voltage transistor. Since the second diffusion region is disposed entirely outside the well in the lower doped substrate, a higher junction breakdown voltage is realized.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: August 25, 1998
    Assignee: Intel Corporation
    Inventors: Mohsen Alavi, Tahir Ghani
  • Patent number: 5708291
    Abstract: A fusible link device disposed on a semiconductor substrate for providing discretionary electrical connections. The fusible link device of the invention includes a silicide layer and a polysilicon layer formed on the silicide layer and has a first un-programmed resistance. The silicide layer agglomerates to form an electrical discontinuity in response to a predetermined programming potential being applied across the silicide layer, such that the resistance of the fusible link device can be selectively increased to a second programmed resistance.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: January 13, 1998
    Assignee: Intel Corporation
    Inventors: Mark T. Bohr, Mohsen Alavi