Abstract: A computer-implemented method for monitoring temperature of a blade server to determine ambient temperature includes the steps of determining temperatures of each of any installed processing components, and determining a temperature of an administrator component. If there are no processing components installed in the computer chassis, the method reports the ambient temperature as the temperature of the administrator component, and if there are processing components installed in the computer chassis, the method reports the highest temperature value of a processing component which is lower than the temperature value of the administrator module as the ambient temperature.

Abstract: A computer-implemented method for cooling a modular computer system having multiple cooling devices and multiple heat-generating modules is disclosed. The method includes the steps of determining the number of cooling device installed in the system; determining the positions of the installed cooling devices; applying predefined cooling device placement rules and signaling an error condition if a cooling device is in an unacceptable location; determining locations of all installed heat-generating modules; and applying the predefined cooling device placement rules and signaling an error condition if an installed heat-generating module is in an unacceptable location.

Abstract: A system for displaying chassis component information includes a chassis and a plurality of server blades each coupled to the chassis. Each server blade comprises a respective liquid crystal display (LCD) positioned upon the server blade. The respective LCD is operable to display chassis component information.

Abstract: An on-board input and management device is disclosed. In an exemplary implementation, a method of managing a blade computing system may include monitoring current systems status in a blade computing system with an integrated management controller. The method may also include using the integrated management controller for user interaction to monitor and modify configuration of a plurality of modules in the blade computing system. In an exemplary embodiment, all of the modules in the blade computing system may be monitored and managed.

Abstract: A computer-implemented method for cooling a modular computer system having multiple cooling devices and multiple heat-generating modules is disclosed. The method includes the steps of determining the number of cooling device installed in the system; determining the positions of the installed cooling devices; applying predefined cooling device placement rules and signaling an error condition if a cooling device is in an unacceptable location; determining locations of all installed heat-generating modules; and applying the predefined cooling device placement rules and signaling an error condition if an installed heat-generating module is in an unacceptable location.

Abstract: A computer-implemented method for monitoring temperature of a blade server to determine ambient temperature includes the steps of determining temperatures of each of any installed processing components, and determining a temperature of an administrator component. If there are no processing components installed in the computer chassis, the method reports the ambient temperature as the temperature of the administrator component, and if there are processing components installed in the computer chassis, the method reports the highest temperature value of a processing component which is lower than the temperature value of the administrator module as the ambient temperature.

Abstract: A system for scanning data into a host from a peripheral location. A peripheral, such as a multifunction peripheral having printer and scanner functionality, is coupled to a host, such as a personal computer. The system includes a user interface at the peripheral that can be utilized in selecting a desired target, such as an application or file, at the host. The peripheral user interface also can be used to select a networked site, such as a networked file. Thus, a user can scan desired data at the peripheral to a remote application or file without providing input at the user interface of the host.

Abstract: A method and apparatus which sends an encrypted FAX document to a receiving party. The encrypted FAX is printed out by a receiving FAX with an unencrypted heading, indicating who the intended recipient of the received encrypted FAX is, and a body of the FAX in an encrypted format. Once the intended recipient receives the encrypted FAX document, the document can be scanned and decoded after the intended recipient provides a decode code. The decoded document can be printed by or viewed on a computer.

Abstract: A system and method for storing console information includes a first computing device having a first console and a first console interface operable to transmit first console information associated with the first console. A second computing device is coupled for communication with the first computing device. The second computing device may include a memory module operable to receive the first console information. In a particular embodiment, the memory module may be operable to store the first console information.

Abstract: A system and method for storing console information includes a plurality of computing devices, each computing device having a respective console, and a respective console interface. Each console interface may be operable to transmit console information associated with the respective console. A console server having a memory module may be coupled for communication with the plurality of computing devices. In a particular embodiment, the memory module may be operable to receive and store at least a portion of the console information.

Abstract: A system for seamless distributed job control between a multifunction peripheral and a host. A host, such as a personal computer, is linked with one or more multifunction peripherals. Each multifunction peripheral has at least scanning and printing capability. However, the peripherals do not require extensive memory or processing capability, because the processing and storage of data is accomplished by the host. A user potentially may operate the peripheral through a peripheral interface or through a user interface of the host.

Abstract: Two design variations which allow multiple processors to start up using a single ROM are disclosed. In each design, a single, primary processor is allowed to perform a complete POST while the remaining, secondary processors are directed in the course of their POST to perform a more limited initialization sequence. At power on, the primary processor begins a normal POST, while the secondary processors are held until a vector is placed into a redirection vector location. Each secondary processor is then subsequently started, using its own initialization code located at the address indicated by the redirection vector. The first technique is applicable to general multiprocessor systems because the implementation of this design can be run either from external software or from an addition to the operating system of the particular machine on which it is being used.

Abstract: An interconnectivity scheme for a PC Theatre system includes the use of compatible plug and display connectors on both the display and the host computer. Audio/video signals received by either the display or the computer may be processed by the computer and transmitted between these devices in a standardized signal format using the compatible connectors. The control scheme for facilitating master-slave control of the display by the computer includes the use of various standardized signals and formats as well to ensure compatibility between products manufactured by different companies.

Abstract: A computer system provides a communication link to a display monitor so as to control the display of not only computer signals but of other signals such as television signals. By providing this link the additional power of the computer can be used to provide a storage of preferred settings for the television/display monitor depending upon signal sources, time of day or the like. This provides a more versatile display. Further data contained within a received data stream such as from a web page or the like may inherently control functions of the television display.

Abstract: A method and apparatus for comparing the real time operation of two object code compatible processors to discover incompatibilities and provide fault-tolerance in a computer system. The two processors run the same code and compare their write operations in real time. Logic external to the processors arbitrates between them, granting only one processor access to the system bus at any one time. The first processor executes instructions until it reaches a write or I/O data read cycle, at which time control of the system bus passes to the second processor. The second processor executes the instructions previously executed by the first processor until it catches up to the cycle pending on the first processor. If this cycle is a write cycle, then error detection logic compares the signals pending on the two processors to flag inconsistencies.

Abstract: A technique for the automatic detection of certain characteristics of the print medium being used in a printer is disclosed. These characteristics may include, without limitation, the manufacturer, the finish, the quality, orientation, and the dimensions of the print medium. Each sheet of specialty print medium is marked at the point of manufacture or packaging with certain preassigned numeric or symbolic codes that uniquely identify the characteristics of the print medium. Sensors are added to each printer to automatically detect and decode the markings on the speciality print media. This information is used to automatically optimize the printer for the best print quality possible.

Abstract: Two design variations which allow multiple processors to start up using a single ROM are disclosed. In each design, a single, primary processor is allowed to perform a complete POST while the remaining, secondary processors are directed in the course of their POST to perform a more limited initialization sequence. At power on, the primary processor begins a normal POST, while the secondary processors are held until a vector is placed into a redirection vector location. Each secondary processor is then subsequently started, using its own initialization code located at the address indicated by the redirection vector. The first technique is applicable to general multiprocessor systems because the implementation of this design can be run either from external software or from an addition to the operating system of the particular machine on which it is being used.

Abstract: Two design variations which allow multiple processors to start up using a single ROM are disclosed. In each design, a single, primary processor is allowed to perform a complete POST while the remaining, secondary processors are directed in the course of their POST to perform a more limited initialization sequence. At power on, the primary processor begins a normal POST, while the secondary processors are held until a vector is placed into a redirection vector location. Each secondary processor is then subsequently started, using its own initialization code located at the address indicated by the redirection vector. The first technique is applicable to general multiprocessor systems because the implementation of this design can be run either from external software or from an addition to the operating system of the particular machine on which it is being used.

Abstract: Two design variations which allow multiple processors to start up using a single ROM are disclosed. In each design, a single, primary processor is allowed to perform a complete POST while the remaining, secondary processors are directed in the course of their POST to perform a more limited initialization sequence. At power on, the primary processor begins a normal POST, while the secondary processors are held until a vector is placed into a redirection vector location. Each secondary processor is then subsequently started, using its own initialization code located at the address indicated by the redirection vector. The first technique is applicable to general multiprocessor systems because the implementation of this design can be run either from external software or from an addition to the operating system of the particular machine on which it is being used.

Abstract: Two design variations which allow multiple processors to start up using a single ROM. In each design, a single, primary processor is allowed to perform a complete POST while the remaining, secondary processors are directed in the course of their POST to perform a more limited initialization sequence. At power on, the primary processor begins a normal POST, while the secondary processors are held until a vector is placed into a redirection vector location. Each secondary processor is then subsequently started, using its own initialization code located at the address indicated by the redirection vector. The first technique is applicable to general multiprocessor systems because the implementation of this design can be run either from external software or from an addition to the operating system of the particular machine on which it is being used.