Patents by Inventor Montgomery C. McGraw

Montgomery C. McGraw has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Two level system bus arbitration having lower priority multiprocessor arbitration and higher priority in a single processor and a plurality of bus masters arbitration
    Patent number: 5392436
    Abstract: A method and apparatus for arbitrating between multiple processors that can be incorporated into an arbitration scheme that is designed to include only a single processor. The method includes consolidating the individual bus requests of each processor into a single bus request supplied to the single processor arbitration scheme. When control of the bus is allocated to the single processor, the multiprocessor arbitration arbitrates among the processors who requested the bus. The bus protocol used includes a least recently used method for granting bus access to the multiple processors coupled with a means for giving one processor priority over the others for access to the bus. The protocol also includes protection from interruption for the respective processor in control of the bus for a preset period of time.
    Type: Grant
    Filed: May 26, 1994
    Date of Patent: February 21, 1995
    Assignee: Compaq Computer Corporation
    Inventors: Kenneth A. Jansen, Montgomery C. McGraw, David A. Miller, Paul R. Culley
  • Programmable logic system for filtering commands to a microprocessor
    Patent number: 5381530
    Abstract: A system utilizes one or more programmable logic arrays or gate arrays for regulating the commands available to a microprocessor, and intercepting certain of those commands according to predetermined criteria. The system selects and processes designated commands relating to the FORCE-A20 signal and CPU-RESET signal for a keyboard controller functionally attached to an INTEL 80286 or 80386 microprocessor. The system includes one or more programmable logic arrays or gate arrays for allowing all input commands to pass directly through to the keyboard controller except the command sequence relating to the FORCE-A20 signal or the CPU-RESET signal.
    Type: Grant
    Filed: June 30, 1993
    Date of Patent: January 10, 1995
    Assignee: Compaq Computer Corporation
    Inventors: John S. Thayer, Montgomery C. McGraw
  • Method and apparatus for configuration of computer system and circuit boards
    Patent number: 5263148
    Abstract: A method and apparatus for determining and selecting configuration options and settings of circuit boards used in a computer system is disclosed. The options and settings are placed in a file according to a given format, at which time the system determines if non-conflicting use of the common system resources is possible. If so, these option and setting parameters are used to configure the circuit boards.
    Type: Grant
    Filed: January 4, 1989
    Date of Patent: November 16, 1993
    Assignee: Compaq Computer Corporation
    Inventors: Curtis R. Jones, Jr., Robert S. Gready, Roberta A. Walton, Scott C. Farrand, Pamela H. Williams, Beatrice D. Pipes, Montgomery C. McGraw, Daryl D. George, Michael R. Griffin
  • Programmable logic system for filtering commands to a microprocessor
    Patent number: 5226122
    Abstract: A system utilizes one or more programmable logic arrays or gate arrays for regulating the commands available to a microprocessor, and intercepting certain of those commands according to predetermined citeria. The system selects and processes designated commands relating to the FORCE-A20 signal and CPU-RESET signal for a keyboard controller functionally attached to an INTEL 80286 or 80386 microprocessor. The system includes one or more programmable logic arrays or gate arrays for allowing all input commands to pass directly through to the keyboard controller except the command sequence relating to the FORCE-A20 signal or the CPU-RESET signal.
    Type: Grant
    Filed: August 21, 1987
    Date of Patent: July 6, 1993
    Assignee: Compaq Computer Corp.
    Inventors: John S. Thayer, Montgomery C. McGraw
  • Delaying arbitration of bus access in digital computers
    Patent number: 5168568
    Abstract: A bus arbitration protocol and accompanying bus arbitration logic for multiple-processor computer systems in which each processing module has a local cache. Several bus arbitration policies are enforced on contending devices which effectively introduce delay states into the arbitration behavior exhibited by each device. The bus arbitration protocol employs a distributed method of arbitration control involving an essentially fixed prioritization of arbitrating devices.
    Type: Grant
    Filed: February 6, 1989
    Date of Patent: December 1, 1992
    Assignee: Compaq Computer Corporation
    Inventors: John S. Thayer, Paul R. Culley, Montgomery C. McGraw