Patents by Inventor Moo Seong Kim

Moo Seong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12256489
    Abstract: A circuit board according to an embodiment comprises: an insulation layer; a circuit pattern disposed on the upper surface or under the lower surface of the insulation layer; and a buffer layer disposed on at least one surface of the upper surface and the lower surface of the insulation layer, wherein the buffer layer includes carbon, nitrogen, and oxygen, the ratio of the nitrogen to the carbon ((carbon/nitrogen)*100) is 5 to 15, and the ratio of the oxygen to the carbon ((carbon/oxygen)*100) is 15 to 30.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: March 18, 2025
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Yong Suk Kim, Jeong Han Kim, Moo Seong Kim
  • Patent number: 12228837
    Abstract: An electrophoretic particle according to an embodiment contains carbon black, and the electrophoretic particle comprises: a core portion; and a shell portion disposed to surround the outer surface of the core portion, wherein a protrusion portion is formed on the surface of the core portion, the core portion has a chromaticity index of 2 or less, the core portion has a light absorption rate of 90% to 99%, and the particle diameter of the electrophoretic particles is 50 nm to 800 nm.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: February 18, 2025
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jin Gyeong Park, Byung Sook Kim, Moo Seong Kim, Jeung Ook Park
  • Publication number: 20250040032
    Abstract: A circuit board according to an embodiment includes a first substrate layer; and a second substrate layer disposed on the first substrate layer and including a cavity, wherein the cavity of the second substrate layer includes a first part disposed adjacent to an upper surface of the second substrate layer and having a first inclination such that a width gradually decreases toward a lower surface of the second substrate layer; and a second part disposed below the first part adjacent to the lower surface of the second substrate layer and having a second inclination such that a width gradually decreases toward the lower surface of the second substrate layer, and the first inclination of the first part relative to a bottom surface of the cavity is greater than the second inclination of the second part relative to the bottom surface of the cavity, and a vertical length of the first part is different from a vertical length of the second part.
    Type: Application
    Filed: August 10, 2022
    Publication date: January 30, 2025
    Inventors: Jong Bae SHIN, Moo Seong KIM, Soo Min LEE, Jae Hun JEONG
  • Publication number: 20240324102
    Abstract: A circuit board according to an embodiment includes an insulating layer, a first circuit pattern layer disposed on the insulating layer; a second circuit pattern layer disposed below the insulating layer; and a via passing through the insulating layer and connecting the first circuit pattern layer and the second circuit pattern layer, wherein the via has a first width at an upper surface and a second width less than the first width at a first region between the upper surface and a lower surface, wherein the first region is a region with a minimum width among all regions of the via, and wherein the second width satisfies a range of 70% to 99% of the first width.
    Type: Application
    Filed: July 8, 2022
    Publication date: September 26, 2024
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Byeong Kyun CHOI, Moo Seong KIM, Woo Seop SIM
  • Publication number: 20240298410
    Abstract: A circuit board according to an embodiment includes an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes a copper foil layer disposed on the insulating layer, a first plating layer disposed on the copper foil layer, and a second plating layer disposed on the first plating layer, and wherein the copper foil layer has a thickness in a range of 2 ?m to 5 ?m.
    Type: Application
    Filed: May 14, 2024
    Publication date: September 5, 2024
    Inventors: Min Young HWANG, Byeong Kyun Choi, Jin Seok Lee, Moo Seong Kim
  • Patent number: 12048095
    Abstract: A circuit board according to one embodiment comprises a first insulation layer, a circuit pattern on the first insulation layer, and a second insulation layer on the circuit pattern, wherein a heat transfer member is arranged inside the first insulation layer and/or the second insulation layer, and the heat transfer member is arranged while coming in contact with a side surface of the insulation layer.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: July 23, 2024
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Min Young Hwang, Moo Seong Kim, Byeong Kyun Choi
  • Patent number: 12016128
    Abstract: A circuit board according to an embodiment includes an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes a copper foil layer disposed on the insulating layer, a first plating layer disposed on the copper foil layer, and a second plating layer disposed on the first plating layer, and wherein the copper foil layer has a thickness in a range of 2 ?m to 5 ?m.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: June 18, 2024
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Min Young Hwang, Byeong Kyun Choi, Jin Seok Lee, Moo Seong Kim
  • Publication number: 20240120243
    Abstract: A circuit board according to an embodiment includes a first insulating layer; a second insulating layer disposed on the first insulating layer and including a cavity; and a plurality of pads disposed on the first insulating layer and having top surfaces exposed through the cavity; wherein the cavity of the second insulating layer includes: a bottom surface positioned higher than a top surface of the first insulating layer; and an inner wall extending from the bottom surface, wherein the inner wall is perpendicular to top or bottom surface of the second insulating layer, wherein the bottom surface of the cavity includes: a first bottom surface positioned lower than a top surface of the pad and positioned outside an arrangement region of the plurality of pads; and a second bottom surface positioned lower than the top surface of the pad and positioned inside the arrangement region of the plurality of pads, and wherein a height of the first bottom surface is different from a height of the second bottom surface.
    Type: Application
    Filed: April 26, 2021
    Publication date: April 11, 2024
    Inventors: Jong Bae SHIN, Moo Seong KIM, Soo Min LEE, Jae Hun JEONG
  • Publication number: 20240043654
    Abstract: A resin composition for a semiconductor package according to an embodiment includes a resin composition that is a composite of a resin and a filler disposed in the resin, wherein the filler includes at least one concave portion provided on a surface, wherein a content of the filler has a range of 10 vol. % to 40 vol % of a total volume of the resin composition, and wherein a porosity corresponds to a volume occupied by the concave portion in a total volume of the filler and has a range of 20% to 35%.
    Type: Application
    Filed: August 17, 2021
    Publication date: February 8, 2024
    Inventors: Byeong Kyun CHOI, Min Young HWANG, Moo Seong KIM, Jin Seok LEE
  • Publication number: 20230300977
    Abstract: A circuit board according to an embodiment includes: an insulating layer including first to third regions; an outer layer circuit pattern disposed on an upper surface of the first to third regions of the insulating layer; and a solder resist including a first part disposed on the first region of the insulating layer, a second part disposed on the second region, and a third part disposed on the third region, wherein the outer layer circuit pattern includes: a first trace disposed on an upper surface of the first region of the insulating layer; and a second trace disposed on an upper surface of the third region of the insulating layer; wherein a height of the first trace is different from a height of the second trace; and an upper surface of the first part of the solder resist is positioned lower than an upper surface of the first trace.
    Type: Application
    Filed: June 11, 2021
    Publication date: September 21, 2023
    Inventors: Se Woong NA, Jung Eun HAN, Moo Seong KIM
  • Publication number: 20230240008
    Abstract: A resin coated copper according to an embodiment includes: an insulating layer including a resin and a filler dispersed in the resin; and a copper foil layer disposed on the insulating layer, wherein the insulating layer has a plurality of pores formed on a surface in contact with the copper foil layer, and the plurality of pores have a width of 200 nm to 350 nm.
    Type: Application
    Filed: June 17, 2021
    Publication date: July 27, 2023
    Inventors: Jeong Han KIM, Yong Suk KIM, Moo Seong KIM
  • Publication number: 20230240005
    Abstract: A circuit board according to an embodiment comprises: an insulation layer; a circuit pattern disposed on the upper surface or under the lower surface of the insulation layer; and a buffer layer disposed on at least one surface of the upper surface and the lower surface of the insulation layer, wherein the buffer layer includes carbon, nitrogen, and oxygen, the ratio of the nitrogen to the carbon ((carbon/nitrogen)*100) is 5 to 15, and the ratio of the oxygen to the carbon ((carbon/oxygen)*100) is 15 to 30.
    Type: Application
    Filed: June 10, 2021
    Publication date: July 27, 2023
    Inventors: Yong Suk KIM, Jeong Han KIM, Moo Seong KIM
  • Publication number: 20220373852
    Abstract: An electrophoretic particle according to an embodiment contains carbon black, and the electrophoretic particle comprises: a core portion; and a shell portion disposed to surround the outer surface of the core portion, wherein a protrusion portion is formed on the surface of the core portion, the core portion has a chromaticity index of 2 or less, the core portion has a light absorption rate of 90% to 99%, and the particle diameter of the electrophoretic particles is 50 nm to 800 nm.
    Type: Application
    Filed: September 14, 2020
    Publication date: November 24, 2022
    Inventors: Jin Gyeong PARK, Byung Sook KIM, Moo Seong KIM, Jeung Ook PARK
  • Patent number: 11464117
    Abstract: A printed circuit board according to one embodiment of the present invention comprises an insulation board and a plurality of metal electrodes disposed on the insulation board, wherein: the plurality of metal electrodes include a first electrode and a second electrode; the first electrode includes a first surface parallel to an upper surface of the insulation board, a second surface facing the first surface, a first side surface disposed between the first surface and the second surface, and a second side surface facing the first side surface; a part of the first side surface and a part of the second side surface protrude toward the outside of the first electrode in the direction parallel to the upper surface of the insulation board; the first side surface protrudes farther in an area adjacent to the first surface than in an area adjacent to the second surface; and the second side surface protrudes farther in the area adjacent to the second surface than in the area adjacent to the first surface.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: October 4, 2022
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Hee Young Chung, Jae Man Park, Moo Seong Kim
  • Publication number: 20220151068
    Abstract: A circuit board according to one embodiment comprises a first insulation layer, a circuit pattern on the first insulation layer, and a second insulation layer on the circuit pattern, wherein a heat transfer member is arranged inside the first insulation layer and/or the second insulation layer, and the heat transfer member is arranged while coming in contact with a side surface of the insulation layer.
    Type: Application
    Filed: February 10, 2020
    Publication date: May 12, 2022
    Inventors: Min Young HWANG, Moo Seong KIM, Byeong Kyun CHOI
  • Publication number: 20220071016
    Abstract: A circuit board according to an embodiment includes an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes a copper foil layer disposed on the insulating layer, a first plating layer disposed on the copper foil layer, and a second plating layer disposed on the first plating layer, and wherein the copper foil layer has a thickness in a range of 2 ?m to 5 ?m.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 3, 2022
    Inventors: Min Young HWANG, Byeong Kyun Choi, Jin Seok Lee, Moo Seong Kim
  • Publication number: 20200236789
    Abstract: A printed circuit board according to one embodiment of the present invention comprises an insulation board and a plurality of metal electrodes disposed on the insulation board, wherein: the plurality of metal electrodes include a first electrode and a second electrode; the first electrode includes a first surface parallel to an upper surface of the insulation board, a second surface facing the first surface, a first side surface disposed between the first surface and the second surface, and a second side surface facing the first side surface; a part of the first side surface and a part of the second side surface protrude toward the outside of the first electrode in the direction parallel to the upper surface of the insulation board; the first side surface protrudes farther in an area adjacent to the first surface than in an area adjacent to the second surface; and the second side surface protrudes farther in the area adjacent to the second surface than in the area adjacent to the first surface.
    Type: Application
    Filed: September 18, 2018
    Publication date: July 23, 2020
    Inventors: Hee Young CHUNG, Jae Man PARK, Moo Seong KIM
  • Patent number: 9745667
    Abstract: A method of fabricating a wafer according to the embodiment comprises the steps of growing an wafer on a surface of the wafer in a growth temperature; and cooling the wafer after the wafer has been grown, wherein a stepwise cooling is performed when cooling the wafer.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: August 29, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Seok Min Kang, Moo Seong Kim
  • Patent number: 9657394
    Abstract: Disclosed are a hot plate and a method of manufacturing the same. The method includes the steps of preparing a first barrier layer, laminating a first heat transfer layer on the first barrier layer, and laminating a second barrier layer on the first heat transfer layer. The first barrier layer or the second barrier layer includes a plurality of first sub-nano-barrier layers and a plurality of second sub-nano-barrier layers. The hot plate includes a first barrier layer, a first heat transfer layer on the first barrier layer, and a second barrier layer on the first heat transfer layer. The first barrier layer or the second barrier layer includes a plurality of first sub-nano-barrier layers and a plurality of second sub-nano-barrier layers.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: May 23, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Ick Chan Kim, Moo Seong Kim
  • Patent number: 9525030
    Abstract: A semiconductor device according to the embodiment comprises a base substrate; patterns on the base substrate; and an epitaxial layer on the base substrate, wherein the epitaxial layer is formed on a surface of the substrate exposed among the patterns. A method for growing a semiconductor crystal comprises the steps of cleaning a silicon carbide substrate; forming patterns on the silicon carbide substrate; and forming an epitaxial layer on the silicon carbide substrate.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: December 20, 2016
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Min Young Hwang, Seok Min Kang, Moo Seong Kim, Yeong Deuk Jo