Patents by Inventor Moo-Sung Kim

Moo-Sung Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11035039
    Abstract: Described herein are compositions, silicon nitride films and methods for forming silicon nitride films using at least on cyclodisilazane precursor. In one aspect, there is provided a method of forming a silicon nitride film comprising the steps of: providing a substrate in a reactor; introducing into the reactor an at least one cyclodisilazane comprising a hydrocarbon leaving group and two Si—H groups wherein the at least one cyclodisilazane reacts on at least a portion of the surface of the substrate to provide a chemisorbed layer; purging the reactor with a purge gas; introducing a plasma comprising nitrogen and an inert gas into the reactor to react with at least a portion of the chemisorbed layer and provide at least one reactive site wherein the plasma is generated at a power density ranging from about 0.01 to about 1.5 W/cm2.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: June 15, 2021
    Assignee: VERSUM MATERIALS US, LLC
    Inventors: Xinjian Lei, Moo-Sung Kim, Manchao Xiao
  • Patent number: 11017853
    Abstract: A memory device and an operating method of the memory device, the memory device including a memory cell array including a plurality of memory cells respectively arranged at points at which a plurality of word lines and a plurality of bit lines cross; and a control logic circuit configured to precharge a selected word line connected to a selected memory cell and precharge a selected bit line connected to the selected memory cell in a read operation, wherein the control logic circuit is further configured to precharge a first unselected word line among unselected word lines to a second voltage when the selected word line is precharged to a first voltage, a level of the first voltage is lower than a level of a third voltage applied to an unselected bit line when the selected word line is precharged to the first voltage, and a level of the second voltage is higher than the level of the third voltage.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: May 25, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Ryul Kim, Moo-Sung Kim
  • Patent number: 10985010
    Abstract: A composition and method for using the composition in the fabrication of an electronic device are disclosed. Compounds, compositions and methods for depositing a high quality silicon nitride or carbon doped silicon nitride.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: April 20, 2021
    Assignee: Versum Materials US, LLC
    Inventors: Haripin Chandra, Xinjian Lei, Moo-Sung Kim
  • Publication number: 20210012837
    Abstract: A memory device includes a memory cell array including a plurality of memory cells arranged at points where a plurality of word lines and a plurality of bit lines intersect; a sense amplifier configured to amplify, in a read operation mode of the memory device, a voltage difference value between a voltage of a selected word line connected to a selected memory cell of the plurality of memory cells and a reference voltage; and a leakage current compensation circuit connected to a selected word line path between the selected memory cell and the sense amplifier and configured to compensate for a total leakage current generated by unselected memory cells connected to the selected word line in the read operation mode.
    Type: Application
    Filed: September 28, 2020
    Publication date: January 14, 2021
    Inventors: VENKATARAMANA GANGASANI, MOO-SUNG KIM, TAE-HUI NA, JUN-HO SHIN
  • Patent number: 10867672
    Abstract: In some example embodiments, a program pulse is applied to a resistive memory cell and a plurality of post pulses are applied to the resistive memory cell at a time point after a relaxation time from a time point when application of the program pulse is finished, the plurality of post pulses having voltage levels that increase sequentially. Programming speed and/or performance of the resistive memory device may be enhanced by accelerating resistance drift of the resistive memory cell using the plurality of post pulses having the voltage levels that increase sequentially.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: December 15, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Sung Cho, Moo-Sung Kim, Seung-You Baek, Jong-Min Baek, Bong-Kil Jung
  • Publication number: 20200365401
    Abstract: Described herein are boron-containing precursor compounds, and compositions and methods comprising same, for forming boron-containing films. In one aspect, the film is deposited from at least one precursor having the following Formula I or II described herein.
    Type: Application
    Filed: July 31, 2020
    Publication date: November 19, 2020
    Applicant: Versum Materials US, LLC
    Inventors: Xinjian Lei, Moo-Sung Kim
  • Patent number: 10825517
    Abstract: A memory device includes a memory cell array including a plurality of memory cells arranged at points where a plurality of word lines and a plurality of bit lines intersect; a sense amplifier configured to amplify, in a read operation mode of the memory device, a voltage difference value between a voltage of a selected word line connected to a selected memory cell of the plurality of memory cells and a reference voltage; and a leakage current compensation circuit connected to a selected word line path between the selected memory cell and the sense amplifier and configured to compensate for a total leakage current generated by unselected memory cells connected to the selected word line in the read operation mode.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: November 3, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Venkataramana Gangasani, Moo-Sung Kim, Tae-Hui Na, Jun-Ho Shin
  • Patent number: 10763103
    Abstract: Described herein are boron-containing precursor compounds, and compositions and methods comprising same, for forming boron-containing films. In one aspect, the film is deposited from at least one precursor having the following Formula I or II described herein.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: September 1, 2020
    Assignee: Versum Materials US, LLC
    Inventors: Xinjian Lei, Moo-Sung Kim
  • Patent number: 10745808
    Abstract: Described herein are methods for forming a Group 13 metal or metalloid nitride film. In one aspect, there is provided a method of forming an aluminum nitride film comprising the steps of: providing a substrate in a reactor; introducing into the reactor an at least one aluminum precursor which reacts on at least a portion of the surface of the substrate to provide a chemisorbed layer; purging the reactor with a purge gas; introducing a plasma comprising non-hydrogen containing nitrogen plasma into the reactor to react with at least a portion of the chemisorbed layer and provide at least one reactive site wherein the plasma is generated at a power density ranging from about 0.01 to about 1.5 W/cm2; and optionally purge the reactor with an inert gas; and wherein the steps are repeated until a desired thickness of the aluminum nitride film is obtained.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: August 18, 2020
    Assignee: Versum Materials US, LLC
    Inventors: Xinjian Lei, Moo-Sung Kim, Sergei Vladimirovich Ivanov
  • Publication number: 20200211646
    Abstract: In some example embodiments, a program pulse is applied to a resistive memory cell and a plurality of post pulses are applied to the resistive memory cell at a time point after a relaxation time from a time point when application of the program pulse is finished, the plurality of post pulses having voltage levels that increase sequentially. Programming speed and/or performance of the resistive memory device may be enhanced by accelerating resistance drift of the resistive memory cell using the plurality of post pulses having the voltage levels that increase sequentially.
    Type: Application
    Filed: July 3, 2019
    Publication date: July 2, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yong-Sung CHO, Moo-Sung KIM, Seung-You BAEK, Jong-Min BAEK, Bong-Kil JUNG
  • Publication number: 20200203155
    Abstract: A composition and method for using the composition in the fabrication of an electronic device are disclosed. Compounds, compositions and methods for depositing a low dielectric constant (<4.0) and high oxygen ash resistance silicon-containing film such as, without limitation, a carbon doped silicon oxide, are disclosed.
    Type: Application
    Filed: January 22, 2020
    Publication date: June 25, 2020
    Applicant: Versum Materials US, LLC
    Inventors: Haripin Chandra, Xinjian Lei, Anupama Mallikarjunan, Moo-Sung Kim
  • Publication number: 20200168273
    Abstract: A memory device and an operating method thereof are provided. The memory device includes: a memory cell array including a plurality of memory cells respectively arranged at points at which a plurality of word lines and a plurality of bit lines cross; and a control logic circuit configured to precharge a select word line connected to a selected memory cell and precharge a select bit line connected to the selected memory cell in a read operation, wherein the control logic circuit is further configured to precharge a first unselect word line among unselect word lines to a second voltage when the select word line is precharged to a first voltage, a level of the first voltage is lower than a level of a third voltage applied to an unselect bit line when the select word line is precharged to the first voltage, and a level of the second voltage is higher than the level of the third voltage.
    Type: Application
    Filed: November 21, 2019
    Publication date: May 28, 2020
    Inventors: JONG-RYUL KIM, MOO-SUNG KIM
  • Publication number: 20200075312
    Abstract: A composition and method for using the composition in the fabrication of an electronic device are disclosed. Compounds, compositions and methods for depositing a high quality silicon nitride or carbon doped silicon nitride.
    Type: Application
    Filed: August 27, 2019
    Publication date: March 5, 2020
    Applicant: Versum Materials US, LLC
    Inventors: Haripin Chandra, Xinjian Lei, Moo-Sung Kim
  • Publication number: 20200071819
    Abstract: A composition and method for using the composition in the fabrication of an electronic device are disclosed. Compounds, compositions and methods for depositing a low dielectric constant (<5.0) and high oxygen ash resistance silicon-containing film such as, without limitation, a carbon doped silicon oxide, are disclosed.
    Type: Application
    Filed: August 27, 2019
    Publication date: March 5, 2020
    Applicant: Versum Materials US, LLC
    Inventors: Xinjian Lei, Moo-Sung Kim, Haripin Chandra
  • Patent number: 10556166
    Abstract: An automatic batting training apparatus includes: a bottom part; a hopper assembly disposed on one side of the bottom part to sequentially discharge a plurality of balls stored therein; and a driving assembly disposed on the other side of the bottom part and including a transfer module adapted to transfer the balls discharged from the hopper assembly in a vertical direction and an ascending/descending module having a tee stand disposed movable upward and downward in such a manner as to allow the balls received from the transfer module to be seated one by one onto top thereof to perform tee batting.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: February 11, 2020
    Inventor: Moo Sung Kim
  • Publication number: 20190382430
    Abstract: Described herein are cobalt compounds, processes for making cobalt compounds, cobalt compounds used as precursors for depositing cobalt-containing films (e.g., cobalt, cobalt oxide, cobalt nitride, cobalt silicide etc.); and cobalt films. Examples of cobalt precursor compounds are bis(diazadiene)cobalt compounds. Examples of surfaces for deposition of metal-containing films include, but are not limited to, metals, metal oxides, metal nitrides, and metal silicates; silicon, silicon oxide and silicon nitride. Alkylated diazadiene ligands are used to form cobalt complexes which are used for selective deposition on certain surfaces and/or superior film properties such as uniformity, continuity, and low resistance.
    Type: Application
    Filed: June 3, 2019
    Publication date: December 19, 2019
    Applicant: Versum Materials US, LLC
    Inventors: Alan C. Cooper, Sergei V. Ivanov, Christopher David Hopkins, Moo-Sung Kim
  • Publication number: 20190377632
    Abstract: Provided is a bit error rate equalizing method of a memory device. The memory device selectively performs an error correction code (ECC) interleaving operation according to resistance distribution characteristics of memory cells, when writing a codeword including information data and a parity bit of the information data to a memory cell array. In the ECC interleaving operation according to one example, an ECC sector including information data is divided into a first ECC sub-sector and a second ECC sub-sector, the first ECC sub-sector is written to memory cells of a first memory area having a high bit error rate (BER), and the second ECC sub-sector is written to memory cells of a second memory area having a low BER.
    Type: Application
    Filed: March 20, 2019
    Publication date: December 12, 2019
    Inventors: Eun-chu Oh, Moo-sung Kim, Young-sik Kim, Yong-jun Lee, Jeong-ho Lee
  • Publication number: 20190378567
    Abstract: A memory device includes a memory cell array including a plurality of memory cells arranged at points where a plurality of word lines and a plurality of bit lines intersect; a sense amplifier configured to amplify, in a read operation mode of the memory device, a voltage difference value between a voltage of a selected word line connected to a selected memory cell of the plurality of memory cells and a reference voltage; and a leakage current compensation circuit connected to a selected word line path between the selected memory cell and the sense amplifier and configured to compensate for a total leakage current generated by unselected memory cells connected to the selected word line in the read operation mode.
    Type: Application
    Filed: June 4, 2019
    Publication date: December 12, 2019
    Inventors: VENKATARAMANA GANGASANI, MOO-SUNG KIM, TAE-HUI NA, JUN-HO SHIN
  • Patent number: 10490289
    Abstract: A voltage generator of a nonvolatile memory device includes a charging circuit, a current mirror circuit, a discharging circuit and an output circuit. The charging circuit amplifies a difference between a reference voltage and a feedback voltage to generate a first current. The current mirror circuit is connected to the charging circuit and generates a second current based on the first current. The discharging circuit is connected to the current mirror circuit to draw the second current, and discharges the output voltage to a target level by adjusting discharging amount of the second current based on a sensing voltage which reflects a change of the feedback voltage. The output circuit is connected to the current mirror circuit, and provides the output voltage based on the first current and the second current to a first word-line connected to an output node.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: November 26, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Gyo-Soo Choo, Ji-Hyun Park, Chi-Weon Yoon, Moo-Sung Kim
  • Publication number: 20190271075
    Abstract: Described herein are methods and compositions for forming a silicon-containing film or material such as without limitation a silicon oxide, silicon nitride, silicon oxynitride, a carbon-doped silicon nitride, or a carbon-doped silicon oxide film in a semiconductor deposition process, such as without limitation, a plasma enhanced atomic layer deposition of silicon-containing film.
    Type: Application
    Filed: April 18, 2019
    Publication date: September 5, 2019
    Applicant: Versum Materials US, LLC
    Inventors: Xinjian Lei, Moo-Sung Kim, Matthew R. MacDonald, Manchao Xiao