Patents by Inventor Moshe Gerstenhaber
Moshe Gerstenhaber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9276531Abstract: Apparatus and methods for amplifier input protection are provided. In certain implementations, an amplifier input protection circuit includes a first JFET electrically connected between a first input and a first output, and a second JFET electrically connected between a second input and a second output. Additionally, a first clamp is electrically connected to the first output, and a second clamp is electrically connected to the second output. A first current mirror mirrors a current through the first clamp, and provides the mirrored current to a third JFET electrically connected between the first JFET's source and gate. Additionally, a second current mirror that mirrors a current through the second clamp, and provides the mirrored current to a fourth JFET that is electrically connected between a source and gate of the second JFET. Configuring the protection circuit in this manner can provide the benefits of both low noise and low fault current.Type: GrantFiled: April 25, 2014Date of Patent: March 1, 2016Assignee: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, Rayal Johnson
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Patent number: 9252725Abstract: An amplifier includes a bootstrap circuit for improving a linearity of the amplifier and a feed-forward circuit for modifying a voltage of the bootstrap circuit in response to a change in an input signal. Modifying the voltage using the feed-forward circuit prevents a phase-inversion condition of the amplifier.Type: GrantFiled: October 11, 2012Date of Patent: February 2, 2016Assignee: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, Derek Bowers, Oljeta Bida Qirko, Chau C Tran
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Publication number: 20150311872Abstract: Apparatus and methods for amplifier input protection are provided. In certain implementations, an amplifier input protection circuit includes a first JFET electrically connected between a first input and a first output, and a second JFET electrically connected between a second input and a second output. Additionally, a first clamp is electrically connected to the first output, and a second clamp is electrically connected to the second output. A first current mirror mirrors a current through the first clamp, and provides the mirrored current to a third JFET electrically connected between the first JFET's source and gate. Additionally, a second current mirror that mirrors a current through the second clamp, and provides the mirrored current to a fourth JFET that is electrically connected between a source and gate of the second JFET. Configuring the protection circuit in this manner can provide the benefits of both low noise and low fault current.Type: ApplicationFiled: April 25, 2014Publication date: October 29, 2015Applicant: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, Rayal Johnson
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Patent number: 8970301Abstract: Low power low noise input bias current compensation for an amplifier input stage is provided by recycling the tail current of the differential pair transistors. A local amplifier regulates the tail current and buffers the base current of the tail current transistor, which is mirrored back to the input transistors to provide input bias current compensation.Type: GrantFiled: May 20, 2013Date of Patent: March 3, 2015Assignee: Analog Devices, Inc.Inventors: Rayal Johnson, Moshe Gerstenhaber
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Patent number: 8907725Abstract: Apparatus and methods for reducing load-induced non-linearity in amplifiers are provided. In certain implementations, an amplifier includes a current mirror, a buffer circuit, and an output stage. The buffer circuit can have a relatively high current gain and a voltage gain about equal to 1. The buffer circuit can amplify a mirrored current generated by the current mirror and provide the amplified mirrored current to the output stage, thereby helping to balance or equalize currents in the current mirror and avoiding the impact of load-induced offset error.Type: GrantFiled: September 24, 2012Date of Patent: December 9, 2014Assignee: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, Rayal Johnson
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Publication number: 20140340149Abstract: Low power low noise input bias current compensation for an amplifier input stage is provided by recycling the tail current of the differential pair transistors. A local amplifier regulates the tail current and buffers the base current of the tail current transistor, which is mirrored back to the input transistors to provide input bias current compensation.Type: ApplicationFiled: May 20, 2013Publication date: November 20, 2014Applicant: Analog Devices, Inc.Inventors: Rayal Johnson, Moshe Gerstenhaber
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Patent number: 8872549Abstract: A circuit includes multiple input sub-circuits coupled to a common output node. Each input sub-circuit includes a transconductance cell. A diode is coupled between the output of the transconductance cell and a common output node. A feedback circuit is coupled between the common output node and a second input of the transconductance cell. A voltage follower is coupled between the common output node and a reference voltage, with an input coupled to the output of the transconductance cell.Type: GrantFiled: February 19, 2013Date of Patent: October 28, 2014Assignee: Analog Devices, Inc.Inventors: Sandro Herrera, Moshe Gerstenhaber
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Patent number: 8816773Abstract: Apparatus and methods are disclosed related to trimming an input offset current of an amplifier. One such apparatus can include auxiliary bipolar transistors connected in parallel with bases of respective bipolar transistors of an input stage of an amplifier. The auxiliary bipolar transistors can be biased such that the base currents of the auxiliary bipolar transistors compensate for a mismatch in base currents of the bipolar transistors of the input stage of an amplifier. The offset current at an input of an amplifier can be reduced independent of an offset voltage at the input of the amplifier.Type: GrantFiled: October 4, 2012Date of Patent: August 26, 2014Assignee: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, Rayal Johnson
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Publication number: 20140232435Abstract: A circuit includes multiple input sub-circuits coupled to a common output node. Each input sub-circuit includes a transconductance cell. A diode is coupled between the output of the transconductance cell and a common output node. A feedback circuit is coupled between the common output node and a second input of the transconductance cell. A voltage follower is coupled between the common output node and a reference voltage, with an input coupled to the output of the transconductance cell.Type: ApplicationFiled: February 19, 2013Publication date: August 21, 2014Applicant: Analog Devices, Inc.Inventors: Sandro HERRERA, Moshe GERSTENHABER
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Publication number: 20140104000Abstract: An amplifier includes a bootstrap circuit for improving a linearity of the amplifier and a feed-forward circuit for modifying a voltage of the bootstrap circuit in response to a change in an input signal. Modifying the voltage using the feed-forward circuit prevents a phase-inversion condition of the amplifier.Type: ApplicationFiled: October 11, 2012Publication date: April 17, 2014Applicant: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, Derek Frederick Bowers, Oljeta Bida Qirko, Chau C. Tran
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Publication number: 20140097896Abstract: Apparatus and methods are disclosed related to trimming an input offset current of an amplifier. One such apparatus can include auxiliary bipolar transistors connected in parallel with bases of respective bipolar transistors of an input stage of an amplifier. The auxiliary bipolar transistors can be biased such that the base currents of the auxiliary bipolar transistors compensate for a mismatch in base currents of the bipolar transistors of the input stage of an amplifier. The offset current at an input of an amplifier can be reduced independent of an offset voltage at the input of the amplifier.Type: ApplicationFiled: October 4, 2012Publication date: April 10, 2014Applicant: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, Rayal Johnson
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Publication number: 20140085005Abstract: Apparatus and methods for reducing load-induced non-linearity in amplifiers are provided. In certain implementations, an amplifier includes a current mirror, a buffer circuit, and an output stage. The buffer circuit can have a relatively high current gain and a voltage gain about equal to 1. The buffer circuit can amplify a mirrored current generated by the current mirror and provide the amplified mirrored current to the output stage, thereby helping to balance or equalize currents in the current mirror and avoiding the impact of load-induced offset error.Type: ApplicationFiled: September 24, 2012Publication date: March 27, 2014Applicant: ANALOG DEVICES, INC.Inventors: Moshe Gerstenhaber, Rayal Johnson
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Patent number: 8536923Abstract: A system and method for reducing gain error and distortion in an operational amplifier due to errors in the second or integrator stage. A correction circuit may replicate an error current and insert the current into the signal stream to preempt the induction of an error at the amplifier's input. A capacitor may sample the error voltage at the input of the integrator stage of the amplifier and generate a replica of the error current in the integration capacitor to feed it into the input of the integrator stage. This eliminates any nonlinearity errors created by error currents in the compensation or integration capacitor at the second or integrator stage of the two-stage amplifier. Feeding the error current to the integrator stage may be facilitated with a unity gain buffer and a current mirror.Type: GrantFiled: July 21, 2011Date of Patent: September 17, 2013Assignee: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, Sandro Herrera, Chau Cuong Tran
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Publication number: 20130021098Abstract: A system and method for reducing gain error and distortion in an operational amplifier due to errors in the second or integrator stage. A correction circuit may replicate an error current and insert the current into the signal stream to preempt the induction of an error at the amplifier's input. A capacitor may sample the error voltage at the input of the integrator stage of the amplifier and generate a replica of the error current in the integration capacitor to feed it into the input of the integrator stage. This eliminates any nonlinearity errors created by error currents in the compensation or integration capacitor at the second or integrator stage of the two-stage amplifier. Feeding the error current to the integrator stage may be facilitated with a unity gain buffer and a current mirror.Type: ApplicationFiled: July 21, 2011Publication date: January 24, 2013Applicant: ANALOG DEVICES, INC.Inventors: Moshe GERSTENHABER, Sandro HERRERA, Chau Cuong TRAN
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Patent number: 7679442Abstract: An output distortion circuit includes a first transistor arrangement receiving a nonlinear current associated with a nonlinear differential error signal. The first transistor arrangement produces a reflected base current that is applied to one side of a differential input pair. A second transistor arrangement eliminates the nonlinear differential error signal by producing a replicated base current that replicates the reflected base current. The replicated base current is applied to an opposite side of the differential input pair thus the output distortion cancellation circuit creating a deflection of approximately equal magnitude to the reflected base current so as to eliminate the nonlinear differential error signal.Type: GrantFiled: April 15, 2008Date of Patent: March 16, 2010Assignee: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, James Bundock
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Patent number: 7656009Abstract: An electric discharge device includes a bipolar transistor configuration comprising a base, an emitter, and a collector. At least one pinched resistor is formed in a region comprising both the base and emitter so as to produce a pinched resistive area that develops a voltage once the bipolar transistor experiences junction breakdown.Type: GrantFiled: April 9, 2007Date of Patent: February 2, 2010Assignee: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, Padraig Cooney
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Publication number: 20090256634Abstract: An output distortion circuit includes a first transistor arrangement receiving a nonlinear current associated with a nonlinear differential error signal. The first transistor arrangement produces a reflected base current that is applied to one side of a differential input pair. A second transistor arrangement eliminates the nonlinear differential error signal by producing a replicated base current that replicates the reflected base current. The replicated base current is applied to an opposite side of the differential input pair thus the output distortion cancellation circuit creating a deflection of approximately equal magnitude to the reflected base current so as to eliminate the nonlinear differential error signal.Type: ApplicationFiled: April 15, 2008Publication date: October 15, 2009Inventors: Moshe Gerstenhaber, James Bundock
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Patent number: 7545215Abstract: A circuit for removing non-linearity produced when an amplifier includes a load that results in non-linear current levels is provided. The circuit includes a first transistor element being coupled to one of the differential inputs associated with the amplifier. A second transistor element is coupled to another of the differential inputs associated with the amplifier. The second transistor element is coupled to the current associated with the load. Current passing the collectors of the first and second transistors elements are arranged to be always equal so as to eliminate in the circuit the changes between the base currents of the second transistor element and first transistor element caused by the current associated with the load.Type: GrantFiled: February 5, 2007Date of Patent: June 9, 2009Assignee: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, Padraig Cooney
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Patent number: 7436052Abstract: A repatterned integrated circuit chip package which balances and/or reduces the package capacitance associated with the gain resistor terminals to reduce the degradation of common mode rejection with frequency.Type: GrantFiled: February 28, 2005Date of Patent: October 14, 2008Assignee: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, Chau C. Tran
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Publication number: 20080246115Abstract: An electric discharge device includes a bipolar transistor configuration comprising a base, an emitter, and a collector. At least one pinched resistor is formed in a region comprising both the base and emitter so as to produce a pinched resistive area that develops a voltage once the bipolar transistor experiences junction breakdown.Type: ApplicationFiled: April 9, 2007Publication date: October 9, 2008Inventors: Moshe Gerstenhaber, Padraig Cooney