Patents by Inventor Moshe Maor

Moshe Maor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190369975
    Abstract: Apparatus, systems, and methods for a generic firmware-based kernel library mechanism are disclosed. An example apparatus includes a compiler to compile kernels into an executable and linkable format, an image generator to generate library images from executable and linkable format locations, a reducer to retrieve a library image, the library image retrieved starting from a first section of an existing library, the retrieved library image to be used as a platform for developing a new kernel library, a selector to select kernels to include in the new kernel library, one or more libraries organized into a defined number of kernel banks, the kernels combined based on intended application development, and a linker to link a library start function pointer to the library start function, the library start function positioned within the library image, the pointer incorporated in a first section of the library image.
    Type: Application
    Filed: August 14, 2019
    Publication date: December 5, 2019
    Inventor: Moshe Maor
  • Publication number: 20190370631
    Abstract: An example apparatus to perform a convolution on an input tensor includes a parameters generator to: generate a horizontal hardware execution parameter for a horizontal dimension of the input tensor based on a kernel parameter and a layer parameter; and generate a vertical hardware execution parameter for a vertical dimension of the input tensor based on the kernel parameter and the layer parameter; an accelerator interface to configure a hardware accelerator circuitry based on the horizontal and vertical hardware execution parameters; a horizontal Iterator controller to determine when the hardware accelerator circuitry completes the first horizontal iteration of the convolution; and a vertical Iterator controller to determine when the hardware accelerator circuitry completes the first vertical iteration of the convolution.
    Type: Application
    Filed: August 14, 2019
    Publication date: December 5, 2019
    Inventors: Yaniv Fais, Moshe Maor
  • Publication number: 20190361702
    Abstract: Methods and apparatus to implement efficient communications between components of computing systems are disclosed. An example apparatus includes a message generator to: add a first value associated with a first field of a message to a shift register based on a first push operation, the message including multiple fields, at least two of the fields having different bit widths; and add a second value associated with a second field of the message to the shift register based on a second push operation, the second value to be adjacent the first value in the shift register in accordance with a structure of the message. The example apparatus further includes a communications interface to transmit content stored in the shift register to a hardware device via a bus having a width corresponding to a width of the shift register, the content including the message.
    Type: Application
    Filed: August 13, 2019
    Publication date: November 28, 2019
    Inventors: Moshe Maor, Yaniv Fais
  • Publication number: 20190313762
    Abstract: A lice comb (10) comprising a housing (12) having a planar lower wall portion (14), an upper wall portion (16) and a side wall portion (18). A comb unit (20) comprising a blade (22) having a plurality of teeth (24) is moveable from a retracted position, in which the blade (22) is parallel to the lower wall portion (14), and an extended position, in which the blade (22) extends at an angle away from the lower wall portion (14). A fan unit is provided within the housing (12) such that the fan unit operates to draw air inwardly through an opening (30) in the lower wall portion (14) adjacent the comb unit (20). When the blade (20) is in the extended position, the housing (12) may be moved to draw the teeth (24) through hair such that lice captured by the teeth (24) are drawn in through the opening (30).
    Type: Application
    Filed: April 9, 2019
    Publication date: October 17, 2019
    Inventors: Moshe Maor, Edward Khoury
  • Patent number: 10342312
    Abstract: A lice removal device (10) comprising a main housing (12) including a first aperture (15) at a first end (14) thereof and a second aperture (17) at a second end (16) thereof. A fan unit (18) is provided within the main housing (12) to draw air in through the first aperture (15) and expel air outwardly through the second aperture (17) A comb unit (43) is securable to the first end of the main housing (12), the comb unit (34) comprising a comb housing (36) and a blade unit (38). The blade unit (38) includes a first side member (46) having a plurality of teeth (44) extending outwardly therefrom and a second side member (48) located adjacent and parallel to the first side member (46) to define an elongate opening (50) such that air is drawn across a first side of the teeth (44) and into the elongate opening (50).
    Type: Grant
    Filed: November 27, 2014
    Date of Patent: July 9, 2019
    Inventor: Moshe Maor
  • Publication number: 20190150584
    Abstract: A lice comb (10) comprising a main housing (12) including a first aperture (15) at a first end (14) thereof and a second aperture (17) at a second end (16) thereof. A fan unit (18) draw airs in through the first aperture (15) and expels air outwardly through the second aperture (17). A comb module (38) is rotatably secured to a comb support unit (34) adjacent a first end of the main housing (12). The comb module (38) comprises a comb body (46) and a tine module (48) having a plurality of teeth (44). The comb body (46) includes a channel (52) extending from a first longitudinal side adjacent the tine module (48) to a second longitudinal side thereof and a tine slot (54) is located adjacent the first end of the channel (52) to receive the tine module (48) such that air drawn in through the channel (52) passes across a first surface of the teeth (44).
    Type: Application
    Filed: June 19, 2017
    Publication date: May 23, 2019
    Inventor: Moshe MAOR
  • Publication number: 20190102671
    Abstract: A convolutional neural network (CNN) accelerator, including: a CNN circuit for performing a multiple-layer CNN computation, wherein the multiple layers are to receive an input feature according to an input feature map (IFM) and a weight matrix per output feature, wherein an output of a first layer provides an input for a next layer; and a mapping circuit to access a three-dimensional input matrix stored as a Z-major matrix; wherein the CNN circuit is to perform an inner-product direct convolution on the Z-major matrix, wherein the direct convolution lacks a lowering operation.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Applicant: Intel Corporation
    Inventors: Ehud Cohen, Moshe Maor, Ashutosh Parkhi, Michael Behar, Yaniv Fais
  • Publication number: 20190004980
    Abstract: A processor device is provided with hardware-implemented logic to receive an instruction including a pointer identifier and a pointer change value, the pointer identifier including a pointer address field encoded with an address of a line of memory corresponding to a location of a pointer of a particular one of the one or more cyclic buffers, one or more cushion bits, and a buffer identifier field encoded with a buffer identifier assigned to the particular cyclic buffer. The logic further enables the processor to identify that the instruction is to apply to the particular cyclic buffer based on the buffer identifier, determine that the pointer change value causes a wraparound of the pointer in the particular cyclic buffer, and fix location of the pointer in the particular cyclic buffer based on the wraparound.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Inventor: Moshe Maor
  • Patent number: 10070156
    Abstract: Methods, systems, and computer readable media can be operable to facilitate an analysis and control of video quality of experience (VQoE) of services delivered to one or more client devices. A content version segment may be selected for delivery to a client device based upon an estimation of the video quality experienced by the client device and the bandwidth available for delivering content to the client device. Video quality estimation may be based upon information associated with the encoding of a media stream coupled with one or more parameters of the client device receiving the media stream. Video quality estimation for one or more client devices may be aggregated and displayed to a service operator and/or may be used to inform content selection decisions in an adaptive bit-rate delivery method.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: September 4, 2018
    Assignee: ARRIS Enterprises LLC
    Inventors: Zvika Horev, Moshe Maor, Chris Busch, Uzi Cohen
  • Patent number: 9898286
    Abstract: A processor includes a decode unit to decode a packed finite impulse response (FIR) filter instruction that indicates one or more source packed data operands, a plurality of FIR filter coefficients, and a destination storage location. The source operand(s) include a first number of data elements and a second number of additional data elements. The second number is one less than a number of FIR filter taps. An execution unit, in response to the packed FIR filter instruction being decoded, is to store a result packed data operand. The result packed data operand includes the first number of FIR filtered data elements that each is to be based on a combination of products of the plurality of FIR filter coefficients and a different corresponding set of data elements from the one or more source packed data operands, which is equal in number to the number of FIR filter taps.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: February 20, 2018
    Assignee: Intel Corporation
    Inventors: Edwin Jan Van Dalen, Martinus C. Wezelenburg, Steven Roos, Edward T. Grochowski, Moshe Maor
  • Publication number: 20170258197
    Abstract: A lice removal device (10) comprising a main housing (12) including a first aperture (15) at a first end (14) thereof and a second aperture (17) at a second end (16) thereof. A fan unit (18) is provided within the main housing (12) to draw air in through the first aperture (15) and expel air outwardly through the second aperture (17) A comb unit (43) is securable to the first end of the main housing (12), the comb unit (34) comprising a comb housing (36) and a blade unit (38). The blade unit (38) includes a first side member (46) having a plurality of teeth (44) extending outwardly therefrom and a second side member (48) located adjacent and parallel to the first side member (46) to define an elongate opening (50) such that air is drawn across a first side of the teeth (44) and into the elongate opening (50).
    Type: Application
    Filed: November 27, 2014
    Publication date: September 14, 2017
    Inventor: Moshe MAOR
  • Patent number: 9705916
    Abstract: Systems and methods may provide for establishing an out-of-band (OOB) channel between a local wireless interface and a remote backend receiver, and receiving information from a peripheral device via the local wireless interface. Additionally, the information may be sent to the backend receiver via the OOB channel, wherein the OOB channel bypasses a local operating system. In one example, a secure Bluetooth stack is used to receive the information from the peripheral device.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: July 11, 2017
    Assignee: Intel Corporation
    Inventors: Omer Ben-Shalom, Alex Nayshtut, Moshe Maor
  • Publication number: 20160328233
    Abstract: A processor includes a decode unit to decode a packed finite impulse response (FIR) filter instruction that indicates one or more source packed data operands, a plurality of FIR filter coefficients, and a destination storage location. The source operand(s) include a first number of data elements and a second number of additional data elements. The second number is one less than a number of FIR filter taps. An execution unit, in response to the packed FIR filter instruction being decoded, is to store a result packed data operand. The result packed data operand includes the first number of FIR filtered data elements that each is to be based on a combination of products of the plurality of FIR filter coefficients and a different corresponding set of data elements from the one or more source packed data operands, which is equal in number to the number of FIR filter taps.
    Type: Application
    Filed: May 5, 2015
    Publication date: November 10, 2016
    Applicant: INTEL CORPORATION
    Inventors: Edwin Jan Van Dalen, Martinus C. Wezelenburg, Steven Roos, Edward T. Grochowski, Moshe Maor
  • Patent number: 9465946
    Abstract: Embodiments of apparatus, computer-implemented methods, systems, devices, and computer-readable media are described herein for identifying and encrypting a subset of a plurality of instructions, for execution in a more secure execution environment. In various embodiments, the subset may include a single entry point and a single exit point. In various embodiments, one or more instructions of the plurality of instructions that precede or follow the subset may be executed in a first execution environment with a first security level. In various embodiments, the subset may be executed in a second execution environment with a second security level that is more secure than the first security level.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: October 11, 2016
    Assignee: Intel Corporation
    Inventors: Sergei Goffman, Alex Berenzon, Oron Lenz, Tevi Devor, Bo Zhang, Yoram Zahavi, Moshe Maor
  • Publication number: 20160088322
    Abstract: Methods, systems, and computer readable media can be operable to facilitate an analysis and control of video quality of experience (VQoE) of services delivered to one or more client devices. A content version segment may be selected for delivery to a client device based upon an estimation of the video quality experienced by the client device and the bandwidth available for delivering content to the client device. Video quality estimation may be based upon information associated with the encoding of a media stream coupled with one or more parameters of the client device receiving the media stream. Video quality estimation for one or more client devices may be aggregated and displayed to a service operator and/or may be used to inform content selection decisions in an adaptive bit-rate delivery method.
    Type: Application
    Filed: September 22, 2015
    Publication date: March 24, 2016
    Inventors: Zvika Horev, Moshe Maor, Chris Busch, Uzi Cohen
  • Patent number: 9158902
    Abstract: This disclosure is directed to software modification that may be used to prevent software piracy and prevent unauthorized modification of applications. In some embodiments, a software vendor may modify software prior to distribution to a user. The software vendor may extract cutouts from an application to create a modified application. The modified application and the cutouts may be downloaded by a user device. The user device may run the application using the modified application and by executing the cutouts in a secure execution environment that conceals the underlying code in the cutouts.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: October 13, 2015
    Assignee: Intel Corporation
    Inventors: Moshe Maor, Shay Gueron
  • Patent number: 9076019
    Abstract: A method and apparatus to provide cryptographic integrity checks and replay protection to protect against hardware attacks on system memory is provided. A mode of operation for block ciphers enhances the standard XTS-AES mode of operation to perform memory encryption by extending a tweak to include a “time stamp” indicator. A tree-based replay protection scheme uses standard XTS-AES to encrypt contents of a cache line in the system memory. A Message-Authentication Code (MAC) for the cache line is encrypted using enhanced XTS-AES and a “time stamp” indicator associated with the cache line. The “time stamp indicator” is stored in a processor.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: July 7, 2015
    Assignee: Intel Corporation
    Inventors: Shay Gueron, Uday Savagaonkar, Francis X. McKeen, Carlos V. Rozas, David M. Durham, Jacob Doweck, Ofir Mulla, Ittai Anati, Zvika Greenfield, Moshe Maor
  • Publication number: 20140223197
    Abstract: A method and apparatus to provide cryptographic integrity checks and replay protection to protect against hardware attacks on system memory is provided. A mode of operation for block ciphers enhances the standard XTS-AES mode of operation to perform memory encryption by extending a tweak to include a “time stamp” indicator. A tree-based replay protection scheme uses standard XTS-AES to encrypt contents of a cache line in the system memory. A Message-Authentication Code (MAC) for the cache line is encrypted using enhanced XTS-AES and a “time stamp” indicator associated with the cache line. The “time stamp indicator” is stored in a processor.
    Type: Application
    Filed: June 29, 2011
    Publication date: August 7, 2014
    Inventors: Shay Gueron, Uday Savagaonkar, Francis X. McKeen, Carlos V. Rozas, David M. Durham, Jacob Doweck, Ofir Mulla, Ittai Anati, Zvika Greenfield, Moshe Maor
  • Patent number: 8799428
    Abstract: In one embodiment, a networked device includes a main platform having a processor, a memory and a basic input/output system (BIOS), and a management subsystem coupled to the main platform to provision the main platform irrespective of the presence of an operating system on the main platform.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: August 5, 2014
    Assignee: Intel Corporation
    Inventors: Howard Herbert, Moshe Maor
  • Patent number: D858877
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: September 3, 2019
    Inventors: Moshe Maor, Edward Joseph Khoury