Abstract: In some embodiments data input to an input device is encrypted before it is received by any software. Other embodiments are described and claimed.

Abstract: In some embodiments a controller controls an input device, receives input information from the input device, excludes a host processor from controlling the input device, and secures the input information received from the input device so that the input information is not received by the host processor or by any software running on the host processor. Other embodiments are described and claimed.

Abstract: In some embodiments data input to an input device is encrypted before it is received by any software, and information is stored securely so that the information is not accessible to any software. Other embodiments are described and claimed.

Abstract: In some embodiments a controller establishes a secured connection between a remote computer and a user input device and/or a user output device of a computer. Information is securely transmitted in both directions between the remote computer and the user input device and/or user output device in a manner such that a user of the user input device and/or the user output device securely interacts with the remote computer in a manner that cannot be maliciously interfered with by software running on the computer. Other embodiments are described and claimed.

Abstract: A computer system is disclosed. The computer system includes a storage device, a device controller and a chipset. The device controller includes lock registers having values that correspond to the ranges of locked sectors of the storage device. The lock registers verify if a storage device access request is targeted for ranges of sectors of the storage device that are locked. The chipset includes an embedded controller to authenticate the storage device access request and to manage configuration of the storage device.

Abstract: In one embodiment, a networked device includes a main platform having a processor, a memory and a basic input/output system (BIOS), and a management subsystem coupled to the main platform to provision the main platform irrespective of the presence of an operating system on the main platform.

Abstract: A method according to one embodiment may include: receiving a first encrypted signal at a server of a computing network, the first encrypted signal comprising firmware encrypted by a first encryption algorithm having a first complexity level; sending a second encrypted signal over the computing network to at least one managed client in response to the first encrypted signal, the second encrypted signal comprising the firmware encrypted by a second encryption algorithm having a second complexity level, wherein said first complexity level is greater than said second complexity level; and updating existing firmware of the at least one managed client in response to receipt of the second signal at the at least one managed client. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

Abstract: In one embodiment, a method includes receiving a decommission command from a management console, determining that the decommission command is authentic, and disabling the manageability functions of a management subsystem on a managed device.

Abstract: Apparatus and systems, as well as methods and articles, may operate to update an executable image associated with a network client basic input-output system (BIOS) from a remote network location during a time when a state of an operating system associated with the network client comprises one of active, inactive, accessible, inaccessible, present, corrupt, and missing.

Abstract: Techniques to limit accesses to hardware component devices by external devices or external software programs. A filter device may be used to filter requests to access core logic of a hardware component device based on access rules. Access rules can limit access to the core logic based on phases of the hardware component device, the requested operation of the core logic, or the target area in the core logic.

Abstract: Techniques to limit the control of component hardware devices in a computer system by external devices or external software programs.

Abstract: A first logical memory address identifies a first logical memory location that is outside of a logical buffer space. The first logical memory address is received and is translated into a second logical memory address that identifies a second logical memory location that is within the logical buffer space.

Abstract: A first logical memory address identifies a first logical memory location that is outside of a logical buffer space. The first logical memory address is received and is translated into a second logical memory address that identifies a second logical memory location that is within the logical buffer space.