Patents by Inventor Motomu Hashizume
Motomu Hashizume has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7961418Abstract: Resistivity sense bias circuits are described herein. An example resistivity sense bias circuit for use with a magnetoresistive read head includes a current biasing portion configured to provide a bias current across the magnetoresistive read head thereby establishing a bias voltage across the magnetoresistive read head, a resistivity sensing portion coupled to the current biasing portion and configured to sense a change in the bias current based on a resistivity change of the magnetoresistive read head, and a voltage source to provide the bias voltage and to adjust the bias voltage in response to the resistivity change of the magnetoresistive read head.Type: GrantFiled: May 11, 2007Date of Patent: June 14, 2011Assignee: Texas Instruments IncorporatedInventors: Naoko Takemoto, Motomu Hashizume
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Patent number: 7715136Abstract: A disk drive controller including a preamplifier and a controller is disclosed, in which communications between the controller and the preamplifier are carried out over at least some shared terminals and conductors. A first pair of differential lines is provided to communicate data, sensed at read/write heads of the disk drive, from the preamplifier to the controller, and a second pair of differential lines communicates data to be written to the disk drive from the controller to the preamplifier. Control signals are communicated over a serial interface between the controller and preamplifier, over the first pair of differential lines, so that serial communication can be carried out simultaneously with the writing of data from the controller to the preamplifier. Alternatively, the control signals are communicated over the second pair of differential lines, simultaneously with the reading of data from the preamplifier to the controller.Type: GrantFiled: April 9, 2007Date of Patent: May 11, 2010Assignee: Texas Instruments IncorporatedInventor: Motomu Hashizume
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Patent number: 7639442Abstract: Methods and apparatus to perform hard-disk drive head proximity detection in a preamplifier are described. One example method of detecting head position in a hard-disk drive includes obtaining a read signal from a head reading information from a disk; determining a signal envelope of the read signal; comparing the signal envelope to a first threshold to produce a first comparison; filtering the signal envelope; comparing the filtered signal envelope to a second threshold to produce a second comparison; combining the first comparison and the second comparison; and determining if the combination of the first comparison and the second comparison indicates head position oscillation.Type: GrantFiled: August 31, 2007Date of Patent: December 29, 2009Assignee: Texas Instruments IncorporatedInventors: Motomu Hashizume, Hiroyuki Mukai, Naoko Jinguji, Toru Takeuchi
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Publication number: 20090154002Abstract: Methods and apparatus to control head expansion in multi-head hard-disk drives are disclosed. An example control system for use in a multi-head hard-disk drive includes a first sensor to provide a first feedback signal indicating a status of a first head; a second sensor to provide a second feedback signal indicating a status of a second head; and a shared calculation unit to selectively receive one of the first and second feedback signals for a feedback process to control an expansion of the first and second heads.Type: ApplicationFiled: June 26, 2008Publication date: June 18, 2009Inventors: Toru Takeuchi, Motomu Hashizume, Hiroyuki Mukai
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Publication number: 20090034112Abstract: Methods and apparatus to vary the input impedance of a hard disk read preamplifier are disclosed. A disclosed method amplifies a read signal from a hard disk read head based on the impedance presented by the read head and changes the impedance presented to the read head based on the gain factor.Type: ApplicationFiled: July 31, 2007Publication date: February 5, 2009Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Motomu Hashizume
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Publication number: 20080278859Abstract: Resistivity sense bias circuits are described herein. An example resistivity sense bias circuit for use with a magnetoresistive read head includes a current biasing portion configured to provide a bias current across the magnetoresistive read head thereby establishing a bias voltage across the magnetoresistive read head, a resistivity sensing portion coupled to the current biasing portion and configured to sense a change in the bias current based on a resistivity change of the magnetoresistive read head, and a voltage source to provide the bias voltage and to adjust the bias voltage in response to the resistivity change of the magnetoresistive read head.Type: ApplicationFiled: May 11, 2007Publication date: November 13, 2008Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Naoko Takemoto, Motomu Hashizume
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Publication number: 20080204922Abstract: Methods and apparatus to monitor hard-disk drive head position are described.Type: ApplicationFiled: February 28, 2007Publication date: August 28, 2008Inventors: Motomu Hashizume, Hiroyuki Mukai, Yukihisa Hirotsugu, Hidetaka Kuroiwa, Naoko Jinguji
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Publication number: 20080204914Abstract: A write driver (11) for a disk drive system is disclosed. The write driver (11) includes a normal H-bridge drive circuit (30) and a boost H-bridge drive circuit (32). The normal and boost H-bridge drive circuits (30, 32) are both biased from a Vcc power supply; however, system ground (GND) biases the normal H-bridge drive circuit (30), while a Vee power supply voltage, which is negative relative to system ground (GND), biases the boost H-bridge drive circuit (32). Diodes (46Y, 46X) are provided in the pull-down paths of the normal H-bridge drive circuit (30). During the boost portion of the write cycle, both of the normal and boost H-bridge drive circuits (30, 32) are on, and the pull-down current from the write head (HD) is conducted to the Vee power supply voltage. After the boost portion of the cycle, and thus after the desired overshoot current has been applied, only the normal H-bridge drive circuit (30) drives the steady-state write current, which is conducted to system ground (GND).Type: ApplicationFiled: February 27, 2007Publication date: August 28, 2008Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Motomu Hashizume
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Patent number: 7362530Abstract: An amplifier apparatus for use with a sensor includes: (a) a first and a second amplifying circuit segment coupled with the sensor and cooperating to effect substantially balanced handling of signals received from the sensor; the first amplifying circuit segment includes a first transistor device; the second amplifying circuit segment includes a second transistor device; (b) a countercurrent unit coupled with the first and second amplifying circuit segments for receiving a first indicator signal from the first transistor device and a second indicator signal from the second transistor device; the first indicator signal represents a first parameter in the first transistor device; the second indicator signal represents a second parameter in the second transistor device; the countercurrent unit provides feedback signals to at least one of the first transistor and second transistor devices to reduce input impedance of the apparatus.Type: GrantFiled: November 6, 2004Date of Patent: April 22, 2008Assignee: Texas Instruments IncorporatedInventor: Motomu Hashizume
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Publication number: 20070236819Abstract: A disk drive controller including a preamplifier and a controller is disclosed, in which communications between the controller and the preamplifier are carried out over at least some shared terminals and conductors. A first pair of differential lines is provided to communicate data, sensed at read/write heads of the disk drive, from the preamplifier to the controller, and a second pair of differential lines communicates data to be written to the disk drive from the controller to the preamplifier. Control signals are communicated over a serial interface between the controller and preamplifier, over the first pair of differential lines, so that serial communication can be carried out simultaneously with the writing of data from the controller to the preamplifier. Alternatively, the control signals are communicated over the second pair of differential lines, simultaneously with the reading of data from the preamplifier to the controller.Type: ApplicationFiled: April 9, 2007Publication date: October 11, 2007Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Motomu Hashizume
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Patent number: 7251091Abstract: The present invention provides a current-sense bias circuit for use with a magnetoresistive head. In one embodiment, the current-sense bias circuit includes a voltage biasing portion configured to provide a bias voltage across the magnetoresistive head thereby establishing a bias current through the magnetoresistive head. Additionally, the current-sense bias circuit also includes a current sensing portion coupled to the voltage biasing portion and configured to sense a change in the bias current based on a resistivity change of the magnetoresistive head.Type: GrantFiled: December 30, 2003Date of Patent: July 31, 2007Assignee: Texas Instruments IncorporatedInventors: Toru Takeuchi, Motomu Hashizume
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Publication number: 20070153413Abstract: A system and method of the companion chip monitoring the active head chip over the conventional 4 wire structure, including when the active head chip goes into a sleep state. Advantageously, the companion chip remains operational and detects changes of the voltage on the DX and DY line, even when the active head chip determines a fault and goes into a sleep state. Further, the companion chip can determine which fault was detected by the active head chip using a read back function, such as analyzing an internal register of the active head chip.Type: ApplicationFiled: December 30, 2005Publication date: July 5, 2007Inventors: Hiromichi Kuwano, Motomu Hashizume, Naoko Jinguji
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Publication number: 20070153410Abstract: A write head degaussing circuit and methodology configured to end the degaussing signal a selectable percentage short of the tapered degaussing waveform, starting the degaussing of the write head current Iw at a percentage less than Iw, removing any overshoot of the degaussing signal, and any combination of the above.Type: ApplicationFiled: December 30, 2005Publication date: July 5, 2007Inventors: Motomu Hashizume, Takashi Hirosawa
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Patent number: 7184232Abstract: An apparatus for driving a write head in response to a data signal includes: (a) a first drive unit coupled with the write head; (b) a second drive unit coupled with the write head; and (c) a control unit coupled with the first and second drive units. The control unit receives the data signal and generates control signals to the first drive and second drive units in response to the data signal. The control signals control the first drive unit to apply a first drive signal to a first write head side in a first signal polarity and control the second drive unit to apply a second drive signal to the a second write head side in a second signal polarity opposite to the first signal polarity when the data signal effects a signal excursion. The first drive signal and the second drive signal are equal in magnitude time coincident.Type: GrantFiled: September 18, 2003Date of Patent: February 27, 2007Assignee: Texas Instruments IncorporatedInventors: Motomu Hashizume, Jinguji Naoko, Indumini Ranmuthu, Neel Seshan
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Patent number: 7113359Abstract: Disclosed are methods and circuits for impedance-controlled write drivers using matched impedance control circuits coupled in parallel with a magnetic write head.Type: GrantFiled: December 9, 2003Date of Patent: September 26, 2006Assignee: Texas Instruments IncorporatedInventors: Motomu Hashizume, Naoko Jinguji
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Publication number: 20050259344Abstract: Disclosed are methods and circuits (10) for biasing magnetoresistive elements (14). The methods and circuits (10) of the invention provide high output impedance current sources using an MR element (14) and a constant-voltage biasing loop (16) combined with a common-mode feedback loop (18). The common-mode feedback loop (18) is configured to maintain the potential of the MR element (14) at approximately zero Volts. Disclosed embodiments of the invention use complementary current mirrors (Q20, Q22) to substantially eliminate current differentials in the common-mode feedback loop (18) in order to hold the MR head potential at approximately zero Volts. Also disclosed are methods and circuits (10) in which a reference current source (28) is provided in a common-mode feedback subcircuit (18). Preferred embodiments of the invention are described in which bipolar transistors (Q), for example MOSFETs or JFETs, are used in circuits for performing method steps.Type: ApplicationFiled: August 26, 2003Publication date: November 24, 2005Inventors: Motomu Hashizume, Naoko Jinguji
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Publication number: 20050195512Abstract: An amplifier apparatus for use with a sensor includes: (a) a first and a second amplifying circuit segment coupled with the sensor and cooperating to effect substantially balanced handling of signals received from the sensor; the first amplifying circuit segment includes a first transistor device; the second amplifying circuit segment includes a second transistor device; (b) a countercurrent unit coupled with the first and second amplifying circuit segments for receiving a first indicator signal from the first transistor device and a second indicator signal from the second transistor device; the first indicator signal represents a first parameter in the first transistor device; the second indicator signal represents a second parameter in the second transistor device; the countercurrent unit provides feedback signals to at least one of the first transistor and second transistor devices to reduce input impedance of the apparatus.Type: ApplicationFiled: November 6, 2004Publication date: September 8, 2005Inventor: Motomu Hashizume
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Publication number: 20050141119Abstract: The present invention provides a current-sense bias circuit for use with a magnetoresistive head. In one embodiment, the current-sense bias circuit includes a voltage biasing portion configured to provide a bias voltage across the magnetoresistive head thereby establishing a bias current through the magnetoresistive head. Additionally, the current-sense bias circuit also includes a current sensing portion coupled to the voltage biasing portion and configured to sense a change in the bias current based on a resistivity change of the magnetoresistive head.Type: ApplicationFiled: December 30, 2003Publication date: June 30, 2005Applicant: Texas Instruments IncorporatedInventors: Toru Takeuchi, Motomu Hashizume
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Publication number: 20050122613Abstract: Disclosed are methods and circuits for impedance-controlled write drivers using matched impedance control circuits coupled in parallel with a magnetic write head.Type: ApplicationFiled: December 9, 2003Publication date: June 9, 2005Inventors: Motomu Hashizume, Naoko Jinguji
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Publication number: 20050073340Abstract: An apparatus for driving a write head in response to a data signal includes: (a) a first drive unit coupled with the write head; (b) a second drive unit coupled with the write head; and (c) a control unit coupled with the first and second drive units. The control unit receives the data signal and generates control signals to the first drive and second drive units in response to the data signal. The control signals control the first drive unit to apply a first drive signal to a first write head side in a first signal polarity and control the second drive unit to apply a second drive signal to the a second write head side in a second signal polarity opposite to the first signal polarity when the data signal effects a signal excursion. The first drive signal and the second drive signal are equal in magnitude time coincident.Type: ApplicationFiled: September 18, 2003Publication date: April 7, 2005Inventors: Motomu Hashizume, Jinguji Naoko, Indumini Ranmuthu, Neel Seshan