Abstract: An object of the present invention is to provide a semiconductor device having a buried metal wiring structure and a contact structure passing through a film having hydrogen barrier function for electrically connecting respective wiring layers each other and further having a hydrogen diffusing passage allowing hydrogen to reach an interior of the semiconductor device so that an annealing can be performed effectively by using a forming gas and a fabrication method thereof. The hydrogen diffusing passage is provided by providing an opening in a portion of a layer other than a portion thereof immediately below the metal wiring and allows hydrogen to pass the opening to lower layers.

Abstract: In a multilayer wiring structure, a plurality of wiring layers (9, 11, 13) are formed on an inorganic lowermost insulating film (2) formed on a silicon substrate (1), and organic interlayer insulating films (14, 15, 16, 17, 18) are interposed between the respective adjacent wiring layers. Via metal (8, 10, 12) are formed in the inorganic lowermost insulating film (2) and the organic interlayer insulating films (15, 17), and openings having the shape corresponding to an electrode pad are formed in the organic interlayer insulating films (14, 15, 16, 17, 18), and these openings are filled with metal material to form metal film patterns (3, 4, 6, 5, 7), whereby the electrode pad is constructed as the laminate body of the metal film patterns (3, 4, 6, 5, 7).

Abstract: To make electric current concentration and electric field concentration hardly take place in junction parts even in case of performing miniaturization and to achieve triggering at low voltage. An ESD protection apparatus is installed between an input terminal 6 of a semiconductor integrated circuit chip and a CMOS transistor 100 and includes a trigger element 310 comprising diodes 311, 312 which are broken down by overvoltage applied to the input terminal 6 and an ESD protection element 210 including longitudinal bipolar transistors 211, 212 for discharging the accumulated electric charge of the input terminal 6 by being electrically communicated owing to the breakdown of the diodes 311, 312.

Abstract: In a multilayer wiring structure, a plurality of wiring layers (9, 11, 13) are formed on an inorganic lowermost insulating film (2) formed on a silicon substrate (1), and organic interlayer insulating films (14, 15, 16, 17, 18) are interposed between the respective adjacent wiring layers. Via metal (8, 10, 12) are formed in the inorganic lowermost insulating film (2) and the organic interlayer insulating films (15, 17), and openings having the shape corresponding to an electrode pad are formed in the organic interlayer insulating films (14, 15, 16, 17, 18), and these openings are filled with metal material to form metal film patterns (3, 4, 6, 5, 7), whereby the electrode pad is constructed as the laminate body of the metal film patterns (3, 4, 6, 5, 7).