Patents by Inventor Muhammad Amin Saleem
Muhammad Amin Saleem has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230282656Abstract: An image sensor comprising an image sensor layer having a plurality of image sensor layer contact pads; and a plurality of photo-sensitive elements, each being coupled to a respective image sensor layer contact pad; and a capacitor layer having: a plurality of first capacitor contact structures, each being constituted by a capacitor layer top contact pad bonded to a respective image sensor layer contact pad of the image sensor layer; a plurality of second capacitor contact structures; and a plurality of capacitors, embedded in a first dielectric material, each capacitor including at least one electrically conductive vertical nanostructure electrically conductively connected to one of a respective first capacitor contact structure and a respective second capacitor contact structure, and conductively separated from the other one of the respective first capacitor contact structure and the respective second capacitor contact structure by a layer of a second dielectric material.Type: ApplicationFiled: June 15, 2021Publication date: September 7, 2023Inventors: M Shafiqul Kabir, Vincent Desmaris, Anders Johansson, Ola Tiverman, Karl Lundahl, Rickard Andersson, Muhammad Amin Saleem, Maria Bylund, Victor Marknäs
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Publication number: 20230147809Abstract: A MIM energy storage device comprising a bottom electrode; a plurality of electrically conductive vertical nanostructures; a bottom conduction-controlling layer conformally coating each nanostructure in the plurality of electrically conductive vertical nanostructures; and a layered stack of alternating conduction-controlling layers and electrode layers conformally coating the bottom conduction-controlling layer, the layered stack including at least a first odd-numbered electrode layer at a bottom of the layered stack, a first odd-numbered conduction-controlling layer directly on the first odd-numbered electrode layer, and a first even-numbered electrode layer directly on the first odd-numbered conduction-controlling layer. Each even-numbered electrode layer in the layered stack is electrically conductively connected to the bottom electrode; and each odd-numbered electrode layer in the layered stack is electrically conductively connected to any other odd-numbered electrode layer in the layered stack.Type: ApplicationFiled: April 13, 2021Publication date: May 11, 2023Inventors: M Shafiqul Kabir, Vincent Desmaris, Anders Johansson, Ola Tiverman, Karl Lundahl, Rickard Andersson, Muhammad Amin Saleem, Maria Bylund, Victor Marknäs
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Publication number: 20230075019Abstract: An electronic system comprising a substrate with a substrate conductor pattern including substrate pads; a semiconductor component with active circuitry, and component pads coupled to the active circuitry of the semiconductor component and connected to the substrate pads of the substrate; a power source interface for receiving power from a power source; and a power distribution network for distributing power from the power source interface to the active circuitry of the semiconductor component. The power distribution network includes a first capacitor realized by conductive structures comprised in the semiconductor component, the first capacitor being coupled to a first component pad and a second component pad of the semiconductor component; a second capacitor arranged between the substrate and the semiconductor component, the second capacitor being coupled to the first component pad and the second component pad of the component package; and a power grid portion of the substrate conductor pattern.Type: ApplicationFiled: January 28, 2021Publication date: March 9, 2023Inventors: M Shafiqul Kabir, Vincent Desmaris, Anders Johansson, Ola Tiverman, Karl Lundahl, Rickard Andersson, Muhammad Amin Saleem, Maria Bylund, Victor Marknäs
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Patent number: 11348890Abstract: An assembly platform for arrangement as an interposer device between an integrated circuit and a substrate to interconnect the integrated circuit and the substrate through the assembly platform, the assembly platform comprising: an assembly substrate; a plurality of conducting vias extending through the assembly substrate; at least one nanostructure connection bump on a first side of the assembly substrate, the nanostructure connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate, wherein each of the nanostructure connection bumps comprises: a plurality of elongated conductive nanostructures vertically grown on the first side of the assembly substrate, wherein the plurality of elongated nanostructures are embedded in a metal for the connection with at least one of the integrated circuit and the substrate, at least one connection bump on a second side of the assembly substrate, the second side beingType: GrantFiled: October 22, 2020Date of Patent: May 31, 2022Assignee: SMOLTEK ABInventors: M Shafiqul Kabir, Anders Johansson, Vincent Desmaris, Muhammad Amin Saleem
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Publication number: 20220013305Abstract: A discrete metal-insulator-metal (MIM) energy storage component, the energy storage component comprising: a MIM-arrangement comprising: a first electrode layer; a plurality of conductive nanostructures grown from the first electrode layer; a conduction controlling material covering each nanostructure in the plurality of conductive nanostructures and the first electrode layer uncovered by the conductive nanostructures; and a second electrode layer covering the conduction controlling material; a first connecting structure for external electrical connection of the capacitor component; a second connecting structure for external electrical connection of the capacitor component; and an electrically insulating encapsulation material at least partly embedding the MIM-arrangement.Type: ApplicationFiled: October 7, 2019Publication date: January 13, 2022Inventors: Vincent Desmaris, Rickard Andersson, Muhammad Amin Saleem, Maria Bylund, Anders Johansson, Fredrik Liljeberg, Ola Tiverman, M Shafiqul Kabir
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Publication number: 20220005777Abstract: A semiconductor assembly, comprising: a first semiconductor die including processing circuitry and pads, said first semiconductor die having a first surface and a second surface opposite the first surface; a second semiconductor die including memory circuitry and pads, said second semiconductor die being arranged on one of the first surface and the second surface of said first semiconductor die, and pads of said second semiconductor die being coupled to pads of said first semiconductor die; and at least a first capacitor having terminals, said first capacitor being arranged on one of the first surface and the second surface of said first semiconductor die and the terminals of said capacitor being coupled to pads of said first semiconductor die.Type: ApplicationFiled: November 20, 2019Publication date: January 6, 2022Inventors: M Shafiqul Kabir, Vincent Desmaris, Rickard Andersson, Muhammad Amin Saleem, Maria Bylund, Anders Johansson, Fredrik Liljeberg, Ola Tiverman
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Patent number: 10991652Abstract: An interposer device comprising a first conductor pattern on a first side defining a portion of the interposer device to be covered by a first electrical circuit element; and a second conductor pattern on a second side to be connected to a second electrical circuit element. The second conductor pattern is electrically coupled to the first conductor pattern. The interposer device further comprises a plurality of nanostructure energy storage devices arranged within the portion of the interposer device to be covered by the first electrical circuit element. Each of the nanostructure energy storage devices comprises at least a first plurality of conductive nanostructures; a conduction controlling material embedding the nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material.Type: GrantFiled: September 3, 2020Date of Patent: April 27, 2021Assignee: SMOLTEK ABInventors: M Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Rickard Andersson, Vincent Desmaris
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Publication number: 20210043594Abstract: An assembly platform for arrangement as an interposer device between an integrated circuit and a substrate to interconnect the integrated circuit and the substrate through the assembly platform, the assembly platform comprising: an assembly substrate; a plurality of conducting vias extending through the assembly substrate; at least one nanostructure connection bump on a first side of the assembly substrate, the nanostructure connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate, wherein each of the nanostructure connection bumps comprises: a plurality of elongated conductive nanostructures vertically grown on the first side of the assembly substrate, wherein the plurality of elongated nanostructures are embedded in a metal for the connection with at least one of the integrated circuit and the substrate, at least one connection bump on a second side of the assembly substrate, the second side beingType: ApplicationFiled: October 22, 2020Publication date: February 11, 2021Inventors: M Shafiqul Kabir, Anders Johansson, Vincent Desmaris, Muhammad Amin Saleem
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Publication number: 20200402904Abstract: An interposer device comprising a first conductor pattern on a first side defining a portion of the interposer device to be covered by a first electrical circuit element; and a second conductor pattern on a second side to be connected to a second electrical circuit element. The second conductor pattern is electrically coupled to the first conductor pattern. The interposer device further comprises a plurality of nanostructure energy storage devices arranged within the portion of the interposer device to be covered by the first electrical circuit element. Each of the nanostructure energy storage devices comprises at least a first plurality of conductive nanostructures; a conduction controlling material embedding the nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material.Type: ApplicationFiled: September 3, 2020Publication date: December 24, 2020Inventors: M. Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Rickard Andersson, Vincent Desmaris
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Publication number: 20200365502Abstract: A nanostructure energy storage device comprising: a first electrode provided on an electrically insulating surface portion of a substrate; a plurality of conductive nanostructures provided on the first electrode; a conduction controlling material conformally coating each nanostructure in the plurality of conductive nanostructures; and a second electrode covering the conduction controlling material, wherein the first electrode and the second electrode are configured to allow electrical connection of the nanostructure energy storage device to an integrated circuit.Type: ApplicationFiled: August 6, 2020Publication date: November 19, 2020Inventors: M Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Peter Enoksson, Vincent Desmaris, Rickard Andersson
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Patent number: 10840203Abstract: An assembly platform for arrangement as an interposer device between an integrated circuit and a substrate to interconnect the integrated circuit and the substrate through the assembly platform, the assembly platform comprising: an assembly substrate; a plurality of conducting vias extending through the assembly substrate; at least one nanostructure connection bump on a first side of the assembly substrate, the nanostructure connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate, wherein each of the nanostructure connection bumps comprises: a plurality of elongated conductive nanostructures vertically grown on the first side of the assembly substrate, wherein the plurality of elongated nanostructures are embedded in a metal for the connection with at least one of the integrated circuit and the substrate, at least one connection bump on a second side of the assembly substrate, the second side beingType: GrantFiled: May 3, 2017Date of Patent: November 17, 2020Assignee: SMOLTEK ABInventors: M Shafiqul Kabir, Anders Johansson, Vincent Desmaris, Muhammad Amin Saleem
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Patent number: 10770390Abstract: An interposer device comprising a first conductor pattern on a first side defining a portion of the interposer device to be covered by a first electrical circuit element; and a second conductor pattern on a second side to be connected to a second electrical circuit element. The second conductor pattern is electrically coupled to the first conductor pattern. The interposer device further comprises a plurality of nanostructure energy storage devices arranged within the portion of the interposer device to be covered by the first electrical circuit element. Each of the nanostructure energy storage devices comprises at least a first plurality of conductive nanostructures; a conduction controlling material embedding the nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material.Type: GrantFiled: August 23, 2018Date of Patent: September 8, 2020Assignee: SMOLTEK ABInventors: M Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Rickard Andersson, Vincent Desmaris
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Patent number: 10741485Abstract: A nanostructure energy storage device comprising: at least a first plurality of conductive nanostructures provided on an electrically insulating surface portion of a substrate; a conduction controlling material embedding each nanostructure in said first plurality of conductive nanostructures; a first electrode connected to each nanostructure in said first plurality of nanostructures; and a second electrode separated from each nanostructure in said first plurality of nanostructures by said conduction controlling material, wherein said first electrode and said second electrode are configured to allow electrical connection of said nanostructure energy storage device to an integrated circuit.Type: GrantFiled: August 26, 2019Date of Patent: August 11, 2020Assignee: SMOLTEK ABInventors: M Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Peter Enoksson, Vincent Desmaris, Rickard Andersson
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Publication number: 20200091065Abstract: An interposer device comprising a first conductor pattern on a first side defining a portion of the interposer device to be covered by a first electrical circuit element; and a second conductor pattern on a second side to be connected to a second electrical circuit element. The second conductor pattern is electrically coupled to the first conductor pattern. The interposer device further comprises a plurality of nanostructure energy storage devices arranged within the portion of the interposer device to be covered by the first electrical circuit element. Each of the nanostructure energy storage devices comprises at least a first plurality of conductive nanostructures; a conduction controlling material embedding the nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material.Type: ApplicationFiled: August 23, 2018Publication date: March 19, 2020Inventors: M. Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Rickard Andersson, Vincent Desmaris
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Publication number: 20190385943Abstract: A nanostructure energy storage device comprising: at least a first plurality of conductive nanostructures provided on an electrically insulating surface portion of a substrate; a conduction controlling material embedding each nanostructure in said first plurality of conductive nanostructures; a first electrode connected to each nanostructure in said first plurality of nanostructures; and a second electrode separated from each nanostructure in said first plurality of nanostructures by said conduction controlling material, wherein said first electrode and said second electrode are configured to allow electrical connection of said nanostructure energy storage device to an integrated circuit.Type: ApplicationFiled: August 26, 2019Publication date: December 19, 2019Inventors: M. Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Peter Enoksson, Vincent Desmaris, Rickard Andersson
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Patent number: 10438880Abstract: An interposer device comprising an interposer substrate; a plurality of conducting vias extending through the interposer substrate; a conductor pattern on the interposer substrate, and a nanostructure energy storage device. The nanostructure energy storage device comprises at least a first plurality of conductive nanostructures formed on the interposer substrate; a conduction controlling material embedding each nanostructure in the first plurality of conductive nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material, wherein the first electrode and the second electrode are configured to allow electrical connection of the nanostructure energy storage device to the integrated circuit.Type: GrantFiled: February 24, 2017Date of Patent: October 8, 2019Assignee: SMOLTEK ABInventors: M Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Peter Enoksson, Vincent Desmaris, Rickard Andersson
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Publication number: 20190267345Abstract: An assembly platform for arrangement as an interposer device between an integrated circuit and a substrate to interconnect the integrated circuit and the substrate through the assembly platform, the assembly platform comprising: an assembly substrate; a plurality of conducting vias extending through the assembly substrate; at least one nanostructure connection bump on a first side of the assembly substrate, the nanostructure connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate, wherein each of the nanostructure connection bumps comprises: a plurality of elongated conductive nanostructures vertically grown on the first side of the assembly substrate, wherein the plurality of elongated nanostructures are embedded in a metal for the connection with at least one of the integrated circuit and the substrate, at least one connection bump on a second side of the assembly substrate, the second side beingType: ApplicationFiled: May 3, 2017Publication date: August 29, 2019Inventors: M Shafiqul Kabir, Anders Johansson, Vincent Desmaris, Muhammad Amin Saleem
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Publication number: 20190051591Abstract: An interposer device comprising an interposer substrate; a plurality of conducting vias extending through the interposer substrate; a conductor pattern on the interposer substrate, and a nanostructure energy storage device. The nanostructure energy storage device comprises at least a first plurality of conductive nanostructures formed on the interposer substrate; a conduction controlling material embedding each nanostructure in the first plurality of conductive nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material, wherein the first electrode and the second electrode are configured to allow electrical connection of the nanostructure energy storage device to the integrated circuit.Type: ApplicationFiled: February 24, 2017Publication date: February 14, 2019Inventors: M Shafiqul Kabir, Anders Johansson, Muhammad Amin Saleem, Peter Enoksson, Vincent Desmaris, Rickard Andersson
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Publication number: 20180155824Abstract: A method for making one or more nanostructures is disclosed. The method includes depositing a catalyst layer on the substrate; depositing an insulator layer on the catalyst layer; providing a continuous patterned conducting helplayer on the insulator layer; creating via holes through the insulator layer from the conducting helplayer to the catalyst layer; growing the one or more nanostructures on the catalyst layer through the via holes; and selectively removing the conducting helplayer after growing the one or more nanostructure.Type: ApplicationFiled: November 2, 2017Publication date: June 7, 2018Inventors: Jonas S. T. Berg, Vincent Desmaris, Mohammad Shafiqul Kabir, Muhammad Amin Saleem, David Brud
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Publication number: 20150318085Abstract: A method for making one or more nanostructures is disclosed, the method comprising: depositing a conducting layer on an upper surface of a substrate; depositing a patterned layer of catalyst on the conducting layer; growing the one or more nanostructures on the layer of catalyst; and selectively removing the conducting layer between and around the one or more nanostructures. A device is also disclosed, comprising a substrate, wherein the substrate comprises one or more exposed metal islands separated by one or more insulating areas; a conducting helplayer disposed on the substrate covering at least some of the one or more exposed metal islands or insulating areas; a catalyst layer disposed on the conducting helplayer; and one or more nanostructures disposed on the catalyst layer.Type: ApplicationFiled: July 9, 2015Publication date: November 5, 2015Inventors: Jonas S. T. Berg, Vincent Desmaris, Mohammad Shafiqul Kabir, Muhammad Amin Saleem, David Brud