Patents by Inventor Muhammad Umar

Muhammad Umar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11157284
    Abstract: An apparatus is described, comprising processing circuitry to speculatively execute an earlier instruction and a later instruction by generating a prediction of an outcome of the earlier instruction and a prediction of an outcome of the later instruction, wherein the prediction of the outcome of the earlier instruction causes a first control flow path to be executed. The apparatus also comprises storage circuitry to store the outcome of the later instruction in response to the later instruction completing, and flush circuitry to generate a flush in response to the prediction of the outcome of the earlier instruction being incorrect. Permission circuitry permits the generating of the prediction by the processing circuitry.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: October 26, 2021
    Assignee: Arm Limited
    Inventors: Yasuo Ishii, Muhammad Umar Farooq, Joseph Michael Pusdesris
  • Publication number: 20210271486
    Abstract: An apparatus has processing circuitry, and history storage circuitry to store local history records. Each local history record corresponds to a respective subset of instruction addresses and tracks a sequence of observed instruction behaviour observed for successive instances of instructions having addresses in that subset. Pointer storage circuitry to store a shared pointer shared between the local history records. The shared pointer indicates a common storage position reached in each local history record. Prediction circuitry determines predicted instruction behaviour for a given instruction address based on a selected portion of a selected local history record stored in the history storage circuitry. The prediction circuitry selects the selected local history record based on the given instruction address and selects the selected portion based on the shared pointer.
    Type: Application
    Filed: March 2, 2020
    Publication date: September 2, 2021
    Inventors: Yasuo ISHII, Joseph Michael PUSDESRIS, Muhammad Umar FAROOQ
  • Patent number: 11086629
    Abstract: Apparatus and a method of operating the same is disclosed. Instruction fetch circuitry is provided to fetch a block of instructions from memory and branch prediction circuitry to generate branch prediction indications for each branch instruction present in the block of instructions. The branch prediction circuitry is responsive to identification of a first conditional branch instruction in the block of instructions that is predicted to be taken to modify a branch prediction indication generated for the first conditional branch instruction to include a subsequent branch status indicator. When there is a subsequent branch instruction after the first conditional branch instruction in the block of instructions that is predicted to be taken the subsequent branch status indicator has a first value, and otherwise the subsequent branch status indicator has a second value. This supports improved handling of a misprediction as taken.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: August 10, 2021
    Assignee: ARM Limited
    Inventors: Yasuo Ishii, Muhammad Umar Farooq, Chris Abernathy
  • Patent number: 11029959
    Abstract: Branch prediction circuitry processes blocks of instructions and provides instruction fetch circuitry with indications of predicted next blocks of instructions to be retrieved from memory. Main branch target storage stores branch target predictions for branch instructions in the blocks of instructions. Secondary branch target storage caches the branch target predictions from the main branch target storage. Look-ups in the secondary branch target storage and the main branch target storage are performed in parallel. The main branch target storage is set-associative and an entry in the main branch target storage comprises multiple ways, wherein each way of the multiple ways stores a branch target prediction for one branch instruction.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: June 8, 2021
    Assignee: Arm Limited
    Inventors: Yasuo Ishii, Muhammad Umar Farooq, Chris Abernathy
  • Patent number: 10990403
    Abstract: An apparatus is described, comprising processing circuitry to speculatively execute an earlier instruction and a later instruction by generating a prediction of an outcome of the earlier instruction and a prediction of an outcome of the later instruction, wherein the prediction of the outcome of the earlier instruction causes a first control flow path to be executed. The apparatus also comprises storage circuitry to store the outcome of the later instruction in response to the later instruction completing, and flush circuitry to generate a flush in response to the prediction of the outcome of the earlier instruction being incorrect. When re-executing the later instruction in a second control flow path following the flush, the processing circuitry is adapted to generate the prediction of the outcome of the later instruction as the outcome stored in the storage circuitry during execution of the first control flow path.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: April 27, 2021
    Assignee: Arm Limited
    Inventors: Joseph Michael Pusdesris, Yasuo Ishii, Muhammad Umar Farooq
  • Patent number: 10963258
    Abstract: A data processing apparatus is provided that includes lookup circuitry to provide first prediction data in respect of a first block of instructions and second prediction data in respect of a second block of instructions. First processing circuitry provides a first control flow prediction in respect of the first block of instructions using the first prediction data and second processing circuitry provides a second control flow prediction in respect of the second block of instructions using the second prediction data. The first block of instructions and the second block of instructions collectively define a prediction block and the lookup circuitry uses a reference to the prediction block as at least part of an index to both the first prediction data and the second prediction data.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: March 30, 2021
    Assignee: Arm Limited
    Inventors: Yasuo Ishii, Muhammad Umar Farooq, Chris Abernathy
  • Patent number: 10901742
    Abstract: An apparatus and method are provided for making predictions for instruction flow changing instructions. The apparatus has a fetch queue that identifies a sequence of instructions to be fetched for execution by execution circuitry, and prediction circuitry for making predictions in respect of instruction flow changing instructions, and for controlling which instructions are identified in the fetch queue in dependence on the predictions. The prediction circuitry is arranged, during each prediction iteration, to make a prediction for a predict block comprising a sequence of M instruction addresses, in order to identify whether that predict block contains the instruction address for an instruction flow changing instruction that is predicted as taken.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: January 26, 2021
    Assignee: Arm Limited
    Inventors: Yasuo Ishii, Muhammad Umar Farooq
  • Publication number: 20210005975
    Abstract: An antenna system can include a dielectric substrate having a top surface and a bottom surface that is covered by a ground plane. Four identical antenna elements can be disposed on the bottom surface. Each antenna element can be formed by a pentagonal slot that is etched out of the ground plane. The four antenna elements are positioned symmetrically such that a layout of the four antenna elements has left-right symmetry and top-bottom symmetry. The dielectric substrate can be rectangular, and each pentagonal slot can have a side that is parallel with a longer edge of the dielectric substrate without a center of the pentagonal slots positioned between the side and the longer edge. The antenna system can further include a varactor diode for each of the four antenna elements. A capacitance of the varactor diode is loaded across the respective pentagonal slot.
    Type: Application
    Filed: July 2, 2019
    Publication date: January 7, 2021
    Applicant: King Fahd University of Petroleum and Minerals
    Inventors: Rifaqat Hussain, Muhammad Umar Khan, Mohammad Said Sharawi
  • Patent number: 10817298
    Abstract: An apparatus comprises a branch target buffer (BTB) to store predicted target addresses of branch instructions. In response to a fetch block address identifying a fetch block comprising two or more program instructions, the BTB performs a lookup to identify whether it stores one or more predicted target addresses for one or more branch instructions in the fetch block. When the BTB is identified in the lookup as storing predicted target addresses for more than one branch instruction in said fetch block, branch target selecting circuitry selects a next fetch block address from among the multiple predicted target addresses returned in the lookup. A shortcut path bypassing the branch target selecting circuitry is provided to forward a predicted target address identified in the lookup as the next fetch block address when a predetermined condition is satisfied.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: October 27, 2020
    Assignee: ARM Limited
    Inventors: Yasuo Ishii, Michael Filippo, Muhammad Umar Farooq
  • Patent number: 10801391
    Abstract: An isolator for suspending a vehicle component from a chassis is provided. The isolator has an elastomeric body defining first and second apertures therethrough. The isolator has a first support bracket extending through a first outer region of the body. A second support bracket extends through a second outer region of the body. The isolator has first and second flexible couplings, with each coupling connecting the first support to the second support. A method of forming the isolator is also provided.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: October 13, 2020
    Assignee: Ford Global Technologies, LLC
    Inventors: Mohammad Ali Moetakef, Muhammad Umar Farooq, Yasir Farhan
  • Publication number: 20200317946
    Abstract: A method for forming a nanocomposite coating on a substrate is described. The nanocomposite substrate comprises polyethylene, functionalized carbon nanotubes, and nanoclay. The method may use microparticles of UHMWPE with functionalized carbon nanotubes and clay nanoplatelets to form a powder mixture, which is then applied to a heated substrate to form the nanocomposite coating. The nanocomposite coating may have a Vickers hardness of 10.5-12.5 HV and a debonding strength of at least 25 N.
    Type: Application
    Filed: August 20, 2019
    Publication date: October 8, 2020
    Applicant: King Fahd University of Petroleum and Minerals
    Inventors: Mohammed Abdul SAMAD, Muhammad Umar AZAM
  • Publication number: 20200310811
    Abstract: An apparatus and method are provided for making predictions for instruction flow changing instructions. The apparatus has a fetch queue that identifies a sequence of instructions to be fetched for execution by execution circuitry, and prediction circuitry for making predictions in respect of instruction flow changing instructions, and for controlling which instructions are identified in the fetch queue in dependence on the predictions. The prediction circuitry has a target prediction storage used to identify target addresses for instruction flow changing instructions that are predicted as taken.
    Type: Application
    Filed: March 26, 2019
    Publication date: October 1, 2020
    Inventors: Yasuo ISHII, Muhammad Umar FAROOQ
  • Publication number: 20200310812
    Abstract: An apparatus and method are provided for making predictions for instruction flow changing instructions. The apparatus has a fetch queue that identifies a sequence of instructions to be fetched for execution by execution circuitry, and prediction circuitry for making predictions in respect of instruction flow changing instructions, and for controlling which instructions are identified in the fetch queue in dependence on the predictions. The prediction circuitry is arranged, during each prediction iteration, to make a prediction for a predict block comprising a sequence of M instruction addresses, in order to identify whether that predict block contains the instruction address for an instruction flow changing instruction that is predicted as taken.
    Type: Application
    Filed: March 26, 2019
    Publication date: October 1, 2020
    Inventors: Yasuo ISHII, Muhammad Umar FAROOQ
  • Patent number: 10738744
    Abstract: A variable noise attenuation element includes at least two tube sections that define an overall tube length that defines a first effective length and associated first peak frequency for noise attenuation, and a valve having a valve member. The valve joins the tube sections together and includes openings that permit communication between the tube sections when the valve is in an open configuration. The valve member operates to close the opening in response to a predetermined vacuum level within the tube sections to define a second tube effective length and associated second peak frequency for attenuation that is less than the overall length. A method of attenuating noise in a vehicle using a passive attenuation arrangement operates a valve disposed between two tube sections to change an effective length of the tube and associated peak frequencies for attenuation in response to an engine operating parameter.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: August 11, 2020
    Assignee: Ford Global Technologies, LLC
    Inventors: Jose Arteaga, Suman Mishra, Muhammad Umar Farooq
  • Publication number: 20200150967
    Abstract: Apparatus and a method of operating the same is disclosed. Instruction fetch circuitry is provided to fetch a block of instructions from memory and branch prediction circuitry to generate branch prediction indications for each branch instruction present in the block of instructions. The branch prediction circuitry is responsive to identification of a first conditional branch instruction in the block of instructions that is predicted to be taken to modify a branch prediction indication generated for the first conditional branch instruction to include a subsequent branch status indicator. When there is a subsequent branch instruction after the first conditional branch instruction in the block of instructions that is predicted to be taken the subsequent branch status indicator has a first value, and otherwise the subsequent branch status indicator has a second value. This supports improved handling of a misprediction as taken.
    Type: Application
    Filed: November 9, 2018
    Publication date: May 14, 2020
    Inventors: Yasuo ISHII, Muhammad Umar FAROOQ, Chris ABERNATHY
  • Publication number: 20200110615
    Abstract: A data processing apparatus is provided that includes global-history prediction circuitry that provides a prediction of an outcome of a given control flow instruction based on a result of execution of one or more previous control flow instructions. Correction circuitry provides a corrected prediction of the global-history prediction circuitry in respect of the given control flow instruction and cache circuitry, separate from the correction circuitry, stores the corrected prediction in respect of the given control flow instruction.
    Type: Application
    Filed: October 3, 2018
    Publication date: April 9, 2020
    Inventors: Yasuo ISHII, Muhammad Umar FAROOQ, Chris ABERNATHY
  • Publication number: 20200110611
    Abstract: A data processing apparatus is provided that includes lookup circuitry to provide first prediction data in respect of a first block of instructions and second prediction data in respect of a second block of instructions. First processing circuitry provides a first control flow prediction in respect of the first block of instructions using the first prediction data and second processing circuitry provides a second control flow prediction in respect of the second block of instructions using the second prediction data. The first block of instructions and the second block of instructions collectively define a prediction block and the lookup circuitry uses a reference to the prediction block as at least part of an index to both the first prediction data and the second prediction data.
    Type: Application
    Filed: October 9, 2018
    Publication date: April 9, 2020
    Inventors: Yasuo ISHII, Muhammad Umar FAROOQ, Chris ABERNATHY
  • Publication number: 20200073666
    Abstract: Branch prediction circuitry processes blocks of instructions and provides instruction fetch circuitry with indications of predicted next blocks of instructions to be retrieved from memory. Main branch target storage stores branch target predictions for branch instructions in the blocks of instructions. Secondary branch target storage caches the branch target predictions from the main branch target storage. Look-ups in the secondary branch target storage and the main branch target storage are performed in parallel. The main branch target storage is set-associative and an entry in the main branch target storage comprises multiple ways, wherein each way of the multiple ways stores a branch target prediction for one branch instruction.
    Type: Application
    Filed: September 4, 2018
    Publication date: March 5, 2020
    Inventors: Yasuo ISHII, Muhammad Umar FAROOQ, Chris ABERNATHY
  • Publication number: 20190309672
    Abstract: An isolator for suspending a vehicle component from a chassis is provided. The isolator has an elastomeric body defining first and second apertures therethrough. The isolator has a first support bracket extending through a first outer region of the body. A second support bracket extends through a second outer region of the body. The isolator has first and second flexible couplings, with each coupling connecting the first support to the second support. A method of forming the isolator is also provided.
    Type: Application
    Filed: April 4, 2018
    Publication date: October 10, 2019
    Inventors: Mohammad Ali MOETAKEF, Muhammad Umar FAROOQ, Yasir FARHAN
  • Patent number: 10359217
    Abstract: An intermittent operation based continuous absorption system (IOBCAS) which supports cooling effect during the daytime without the use of a solution pump is provided. The IOBCAS may utilize an isochoric process for pressurization of the system and the system may include a plurality of generator-absorber units that intermittently operate in succession to provide a continuous refrigeration cooling effect during the daytime. The system of the present disclosure enables the plurality of generator-absorber units to switch between a generation, absorption, and heat recovery mode of operation to provide cooling effect during the daytime which a higher coefficient of performance compared with conventional intermittent system.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: July 23, 2019
    Assignee: King Fahd University of Petroleum and Minerals
    Inventors: Syed Ahmed Mohammad Said, Muhammad Umar Siddiqui